NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA

Department of Electronics & Communication Engineering

Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

NOIDA INSTITUTE OF ENGINEERING & TECHNOLOGY

GREATER NOIDA

LAB MANUAL
Analog Circuits Lab
AEC-0452
Department of Electronics and Communication Engineering
(NAAC & NBA ACCREDITED)
Approved by
AICTE
&
Affiliated to Dr. A.P.J. Abdul Kalam Technical University Uttar
Pradesh, Lucknow

Department of Electronics and Communication Engineering Page 1

 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

VISION
To be an Institute of academic excellence in the field of education, with future plan of becoming a deemed
university, earn name and hence win faith of the society.

MISSION
To impart to its students a high-quality education, develop their skills, broaden their mental horizon and
nurture them into competent and talented professionals to meet the challenges of the new millennium.

VISION OF THE DEPARTMENT

To prepare the students for global competence, with core knowledge in Electronics and Communication
Engineering having the focus on research to meet the needs of industry and society.

MISSION OF THE DEPARTMENT

M1: To impart a robust teaching and learning process thriving on qualified, trained resources and state-of-the-art
infrastructure.
M2: To promote innovation and research culture by providing students with hands-on experience for solving real-
time problems and developing sustainable products and solutions.
M3: To imbibe ethical values, entrepreneurial zeal, and lifelong learning ability to develop future-ready
professionals.

PROGRAMME EDUCATIONAL OBJECTIVES

PEO 1: To excel as a professional at work place through continuous learning and ethically perform with
entrepreneurial mindset.
PEO 2: To be able to demonstrate high degree of analytical and design ability.
PEO 3: To effectively serve the society by solving the real-time problem and mentoring.

PROGRAMME OUTCOMES
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering fundamentals, and an
engineering specialization to the solution of complex engineering problems.

2. Problem analysis: Identify, formulate, review research literature, and analyze complex engineering problems
reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering
sciences.

3. Design/development of solutions: Design solutions for complex engineering problems and design system

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

components or processes that meet the specified needs with appropriate consideration for the public health and
safety, and the cultural, societal, and environmental considerations.

4. Conduct investigations of complex problems: Use research-based knowledge and research methods
including design of experiments, analysis and interpretation of data, and synthesis of the information to provide
valid conclusions.

5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern engineering and
IT tools including prediction and modeling to complex engineering activities with an understanding of the
limitations.

6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal, health,
safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering
practice.

7. Environment and sustainability: Understand the impact of the professional engineering solutions in societal
and environmental contexts, and demonstrate the knowledge of, and need for sustainable development.

8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the
engineering practice.

9. Individual and team work: Function effectively as an individual, and as a member or leader in diverse teams,
and in multidisciplinary settings.

10. Communication: Communicate effectively on complex engineering activities with the engineering community
and with society at large, such as, being able to comprehend and write effective reports and design
documentation, make effective presentations, and give and receive clear instructions.

11. Project management and finance: Demonstrate knowledge and understanding of the engineering and
management principles and apply these to one’s own work, as a member and leader in a team, to manage
projects and in multidisciplinary environments.

12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in independent and
life-long learning in the broadest context of technological change.

Program Specific Outcomes (PSOs)

PSO 1: To design and implement products using the cutting-edge software and hardware tools in
Electronics and communication engineering to satisfy the Industrial needs.
PSO 2: To analyse and develop solutions for the real time problems and to apply the knowledge for
innovative ideas and solutions in Telecommunications, Wireless Networking, Embedded
Systems, and VLSI.
PSO 3: To demonstrate the technical skills, professional competence, entrepreneurial attitude to become
competent professional for the society.

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

COURSE OUTCOMES

AEC0452.1 Understand the characteristics of transistors.

AEC0452.2 Design and analyze various configurations of amplifier circuits.
AEC0452.3 Design sinusoidal and non-sinusoidal oscillators.
AEC0452.4 Understand the functioning of OP-AMP and design OP-AMP based circuits.
AEC0452.5 Design ADC and DAC.

CO - PO: PSO MAPPING

POs
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PSO
COs
s
AEC
3 2 1 - 2 1 1 2 3 3 2 2 3 2 2
0452.1
AEC
3 3 2 - 3 1 1 2 3 3 2 2 3 2 2
0452.2
AEC0
3 3 2 - 2 1 1 2 3 3 2 2 3 2 2
452.3
AEC
3 3 2 - 3 1 1 3 3 3 2 2 3 2 2
0452.3
AEC
3 3 2 - 2 1 1 2 3 3 2 2 3 2 2
0452.5
Average 3 2.8 1.8 - 2.4 1 1 2.2 3 3 2 2 3 2 2

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Autonomous Syllabus

Analog Circuits Lab (AEC0452)

LIST OF EXPERIMENTS

1. Design single-stage (CE) and multistage (CE-CE) amplifiers using with Voltage Divider Bias for
10mV input ac signal and plot the Frequency Response curves using BC 547, Vcc=12V , Stability
factor (S)=10 and RL= 10 KΩ..
2. Design Voltage series/shunt Feedback amplifier with basic voltage gain 100 and feedback factor 0.1-
0.2 also analyze the effect of feedback on gain and bandwidth.
3. Design and analyze the output voltage V0 for OP-AMP (IC 741) as :
(i) Inverting and Non-inverting amplifier for input voltage 0.5V with input Resistance (Ri) of 10 KΩ
and feedback Resistance (Rf) of 100 KΩ.
(ii) Voltage follower circuits for input voltage 1V.
4. Design a differential amplifier with ±12V DC power supply and calculate Common mode gain,
differential mode gain, CMRR and slew-rate.
5. Design and analyze OP-AMP applications as a difference amplifier, integrator and differentiator
Circuits for 1 KHz input signal.
6. Design the following RC sinusoidal oscillators; Also verify the theoretical and practical Oscillating
frequency.
(i) RC phase shift oscillator, if its frequency of oscillation is 955 Hz and R1=R2=R3 =680KΩ.
(ii) Wien bridge oscillator uses R=4.7KΩ, C=0.01µF, and R F=2R1
7. Design the following LC oscillators; Also verify the theoretical and practical Oscillating frequency.
(i) For a Hartley oscillator, self inductance of the two coils are L1=100mH, L2=1mH and mutual
inductance between the two coils is 20µH. its output for a capacitor of value 20pF.
(ii) For a Colpitts oscillator in which feedback network consists of two capacitors of 100pF and 20 pF
with 100mH coil across these capacitors.
8. Design the following non-sinusoidal oscillators; Also verify the theoretical and practical Oscillating
frequency.
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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

(i) For the UJT oscillator with RE = 10 KΩ, η= 0.75, C=0.002µF.

(ii) An astable multivibrator with component values: R1 = 2 KΩ, R2 = 20 KΩ, C1 = 0.01 μF and C2
= 0.05 μF.
9. Simulation of single stage CE amplifier (designed in experiment1) using any available simulation
software and also find the Voltage gain, Input impedance, Output impedance, and bandwidth.
(TARGET, PSPICE-1etc.)
10. Design and simulate of 2nd order Active Low and High pass filter for cut-off frequency 1kHz and
pass band gain of 1.586, also draw the frequency response curve for each type.
11. Mini Project: Design a mini project using the applications of this Lab.

Experiments beyond Syllabus

1. Draw and study the Characteristics of Precision Rectifier.

2. Design and simulate of Active filters and draw the frequency response curve.

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

S.
No
EXPERIMENT Page No.

Design single-stage (CE) and multistage (CE-CE) amplifiers using with Voltage
1. Divider Bias for 10mV input ac signal and plot the Frequency Response curves
using BC 547, Vcc=12V , Stability factor (S)=10 and RL= 10 KΩ.
Design Voltage series/shunt Feedback amplifier with basic voltage gain 100 and
2.
feedback factor 0.1-0.2 also analyze the effect of feedback on gain and bandwidth.
Design and analyze the output voltage V0 for OP-AMP (IC 741) as :
(i) Inverting and Non-inverting amplifier for input voltage 0.5V with input
3.
Resistance (Ri) of 10 KΩ and feedback Resistance (Rf) of 100 KΩ.
(ii) Voltage follower circuits for input voltage 1V.
Design a differential amplifier with ±12V DC power supply and calculate
4.
Common mode gain, differential mode gain, CMRR and slew-rate.
Design and analyze OP-AMP applications as a difference amplifier, integrator
5
and differentiator Circuits for 1 KHz input signal.
Design the following RC sinusoidal oscillators; Also verify the theoretical and
practical Oscillating frequency.
6. (i) RC phase shift oscillator, if its frequency of oscillation is 955 Hz and
R1=R2=R3 =680KΩ.
(ii) Wien bridge oscillator uses R=4.7KΩ, C=0.01µF, and R F=2R1
Design the following LC oscillators; Also verify the theoretical and practical
Oscillating frequency.
(i) For a Hartley oscillator, self inductance of the two coils are L1=100mH,
7. L2=1mH and mutual inductance between the two coils is 20µH. its output
for a capacitor of value 20pF.
(ii) For a Colpitts oscillator in which feedback network consists of two
capacitors of 100pF and 20 pF with 100mH coil across these capacitors.
Design the following non-sinusoidal oscillators; Also verify the theoretical and
practical Oscillating frequency.
8. (i) For the UJT oscillator with RE = 10 KΩ, η= 0.75, C=0.002µF.
(ii) An astable multivibrator with component values: R1 = 2 KΩ, R2 = 20
KΩ, C1 = 0.01 μF and C2 = 0.05 μF.
Simulation of single stage CE amplifier (designed in experiment1) using any
9. available simulation software and also find the Voltage gain, Input impedance,
Output impedance, and bandwidth. (TARGET, PSPICE-1etc.)
Design and simulate of 2nd order Active Low and High pass filter for cut-off

10. frequency 1kHz and pass band gain of 1.586, also draw the frequency response
curve for each type.
Mini Project: Design a mini project using the applications of this Lab.
11.

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

EXPERIMENT NO. 1

AIM: Design single-stage (CE) and multistage (CE-CE) amplifiers using with Voltage Divider Bias for
10mV input ac signal and plot the Frequency Response curves using BC 547, Vcc=12V , Stability factor
(S)=10 and RL= 10 KΩ.

PRE EXPERIMENT QUESTIONS:

1. Explain the working of transistor in CE configuration?

2. Differentiate among CB, CC and CE configuration of transistor?
3. Why CE configuration is most widely used for voltage amplification?

REQUIREMENTS:

Equipments
S. No. Equipment Specification Quantity
1 Function Generator 5 MHz 1
2 CRO 20 MHz 1
3 Regulated Power Supply 0-30V 1
4 Multimeter 1

Components
S. No. Component Specification Quantity
1 DRB 5 Dial (0-50 KΩ) 1
2 Transistor BC 547 (NPN) 1
100KΩ, 3.9KΩ 10KΩ, 1 each
3 Resistors
1KΩ 2
4.7 µF 2
4 Capacitors
47 µF 1
5 Bread Board - 1
6 Connecting wires & CRO Probes - As many required

THEORY:
Common amplifier is most widely used BJT configuration as an amplifier; this arrangement provides a
phase shift of 180 degree. To design an amplifier first DC biasing is done to set the Q-point, then ac signal
is allowed to superimpose on DC signal. In this experiment voltage divider biasing is used as DC biasing.
Then input ac signal is allowed to superimpose on it. The output of this circuit will be gain of an amplifier
times the applied ac signal.

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

CIRCUIT DIAGRAM:

+V0

Fig. 1.1: CE amplifier circuit diagram using voltage divider biasing

PROCEDURE:

1) Identify the terminals of the transistor.

2) Check the transistor for proper working using multimeter.
3) Verify the values of passive components used in the circuit.
4) Give the connection in the bread board as per the given circuit diagram.
5) Disconnect the function generator. Vary the DRB (R2), so that VCE is half of VCC. (VCE = 0.5 VCC).
6) Now connect the signal generator in (sine waveform) and set the input voltage Vi = 20mv peak to
peak at 1 KHz frequency. Observe the output waveform on a CRO. It should be an undistorted sine
waveform, with amplification.
7) Vary the frequency in regular steps (from 100Hz to 3MHz) and note down the corresponding values
of the output voltage on CRO.
8) Calculate the voltage gain & the gain in decibels using the formula.
Voltage gain = Vo/Vin.
Voltage in dB = 20 log (Vo/Vin) dB.
9) Plot the frequency response curve on a semi log graph, values of gain in dB is plotted vertically, the
corresponding frequencies on x-axis.
10) From the graph note the frequencies (i.e.) lower cutoff frequency f1 and the upper cutoff frequency
f2. f1, f2 are type points where the gain is 0.707 (max. gain) in the linear scale. They are also the
points where the gain is 3db below the max. gain value in the log scale. Calculate the Bandwidth
given by Bandwidth = (f2-f1).

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

OBSERVATION TABLE:

Vin = __________

S.No Input Frequency Output Voltage (Vo) Gain in dB = 20log(Vo/Vin)

1 100Hz
.
. 2MHz

RESULT:

ANALYSIS AND CONCLUSIONS:

Students will plot frequency vs gain graph and graphically calculate the bandwidth and gain of the
amplifier.

POST EXPERIMENT QUESTIONS:

1. What is the need of coupling capacitor & bypass capacitor?

2. What is the use of emitter bypass resistor RE?
3. Compare the theoretical frequency response & input impedance with the practical one?

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Experiment No. 1(a)

AIM:
Multistage (CE-CE) amplifiers using with Voltage Divider Bias for 10mV input ac signal and plot the
Frequency Response curves using BC 547, Vcc=12V , Stability factor (S)=10 and RL= 10 KΩ.

Pre Experiment Questions:

1. What is the need of RC Coupling?
2. Calculate the theoretical gain of single stage BJT amplifier for low frequency, medium frequency & high
frequency range using appropriate model?
3. Compare different types of coupling?

Equipments Required:
S. No. Equipment Specification Quantity
1 Function Generator 0.3Hz to 3.3 MHz 1
2 CRO 20 MHz 1
3 Regulated Power Supply 0-30V 1
4 Multimeter 0-30V 1

Components Required:
S. No. Component Specification Quantity
1 DRB 5 Dial (0-50 KΩ) 1
2 Transistor SL100 (NPN) 1
100KΩ, 3.9KΩ, 10KΩ, 1 each
3 Resistors
1KΩ 2
4.7 µf 2
4 Capacitors
47 µf 1
5 Bread Board - 1
6 Connecting wires & CRO Probes - As many required

Theory:

 Meaning of Coupling, need for coupling.

 Types of Coupling.
 Advantage of RC coupling over other types.
 Significance of each component in the circuit.
 Low frequency model of the circuit.
 Comment on the frequency response curve.
 Input & output impedance.

Circuit Diagram of single stage RC coupled BJT Amplifier

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Fig. 1.2 Circuit for Single Stage RC Coupled using BJT Amplifier

Circuit Diagram of two Stage RC Coupled BJT Amplifier

Component Values: R1=R2= 3.3K Ω for first stage,

R1=R2= 100K Ω for second stage.
Rc= 4.7K Ω, Re= 220Ω, RL= 22k Ω, Cin=Cc= 100µf, Ce= 10µf.

Fig. 1.3: Two stage RC- Coupled Transistor Amplifier

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Procedure for single stage Amplifier

1. Identify the terminals of transistor.

2. Check for the proper working of the transistor.
3. Connect the circuit as per the given circuit diagrams.
4. Set the function generator at 1 KHz frequency.
5. Set the input voltage at 10mV, by using CRO.
6. Connect ground of the CRO probe to the circuit ground and use the positive of the probe to
7. Check the signals at input & output.
8. Vary the input frequency in regular steps.
9. Calculate the voltage gain as gain in DB =20 Log Vo/Vi.
10. Note down the Fl & Fh from the graph and calculate the BW=Fh-Fl.
11. Calculate the quality factor using
Q= √FhFl/Fh-Fl

Procedure for two stage Amplifier

1. Identify the terminals of the transistor.
2. Check the transistor for proper working using multimeter.
3. Verify the values of passive components used in the circuit.
4. Give the connection in the bread board as per the given circuit diagram.
5. Disconnect the function generator. Vary the DRB (R2), so that VCE is half of VCC. (VCE = 0.5 VCC).
6. Now connect the signal generator in (sine waveform) and set the input voltage Vi = 20mv peak to
peak at 1 KHz frequency. Observe the output waveform on a CRO. It should be an undistorted sine
waveform, with amplification.
7. Vary the frequency in regular steps (from 100Hz to 3MHz) and note down the corresponding values
of the output voltage on CRO.
8. Calculate the voltage gain & the gain in decibels using the formula.
9. Voltage gain = Vo/Vin.
10. Voltage in dB = 20 log (Vo/Vin) dB.
11. Plot the frequency response curve on a semi log graph, values of gain in dB is plotted vertically, the
corresponding frequencies on x-axis.
12. From the graph note the frequencies (i.e.) lower cutoff frequency f1 and the upper cutoff frequency f2.
f1, f2 are type points where the gain is 0.707 (max. gain) in the linear scale. They are also the points
where the gain is 3db below the max. gain value in the log scale. Calculate the Bandwidth given by
Bandwidth = (f2-f1).
13. Calculate the input impedance of the Amplifier by connecting a 1KΩ in series with function generator.
Measure the VR = V(g) – Vin and IR = VR/R and calculate the input impedance (Zin).
14. Measure the maximum value of input voltage for which there is no distortion in the input. Note down
the MSHC.

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Observation Table:

S.No Input Frequency Output Voltage (Vo) Gain in dB = 20log(Vo/Vin)

1 100Hz
.
. 2MHz

Result:

Conclusion: Theoretical value & practical value are very close to each other.

Design:
Repeat the experiment by replacing the transistor SL100 by BC140.

Post Experiment Questions:

1. What is the need of coupling capacitor & bypass capacitor?

2. What is the use of emitter bypass resistor RE?
3. Compare the theoretical frequency response & input impedance with the practical one?

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Experiment No.2
Aim: Design Voltage series/shunt Feedback amplifier with basic voltage gain 100 and feedback factor
0.1-0.2 also analyze the effect of feedback on gain and bandwidth.
Pre- Experiment Questions:
1. State the difference between current and voltage feedback.
2. List five characteristics of an amplifier, which are modified by the negative feedback
3. Explain why and when the feedback amplifier will oscillate.

Equipments Required

S. No. Equipment Specification Quantity

1 CRO 20 MHz 1
2 Function Generator 0.3Hz to 3.3 MHz 1
3 Regulated Power Supply 0-30V DC 1

Components Required

S. No. Component Specification Quantity

1 Transistors SL 100 2
320KΩ, 6.8KΩ, 220Ω , 100Ω,
2 Resistors As many as required
22KΩ, 1KΩ, 470Ω , 56KΩ, 10KΩ
3 Capacitors 1μF, 10μF, 0.1μF, 100μF As many as required
4 Bread Board - 1
5 Connecting wires & CRO Probes - As many as required

Theory
Feedback is a method in which a portion of the output is returned to the input in order to modify the
characteristics of the device. Feedback can applied to transistor amplifier circuits to modify their
performance characteristics such as gain, bandwidth, input and output impedance etc. An amplifier in
which feedback is incorporated known as feedback amplifier. Feedback can divide in two categories
depending upon the phase of the returned (feedback) signal with respect to the input signal. If the returned
signal is in phase with input signal, feedback is known as positive feedback. It increases the gain of the
amplifier but reduces the bandwidth and stability of the circuit. It used to produce oscillation. If the
feedback signal is out of phase with respect to the input signal, it is known as a negative feedback.
Negative feedback improves the performance of an amplifier but reduces the overall gain. It helps to
stabilize the gain, increases bandwidth: reduces distortions and assures the repeatability of the circuit
performance. There are number of ways by which a signal can be derived from output and can be returned
to input. Therefore feedback amplifiers can be classified in the following four groups depending upon the
interconnections of the basic amplifier and the input and output terminals of feedback network.
Circuit Diagram

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Fig. 2.1: Voltage shunt feedback circuit

Fig. 2.2: Voltage series feedback circuit

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Fig. 2.3: Current shunt feedback circuit

Fig. 2.4: Current series feedback circuit

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Procedure

1. Connect the circuit

2. Measure dc collector current Icl without input signal (if the value of Ic1 is not between 4 and 4.5mA,
change the value of RB.
3. After disconnecting 22kΩ, set the input voltage at 5 kHz, and then change the input voltage until the
output becomes 4 Vp-p. Then calculate the voltage gain.
4. Measure the output resistances.
5. Find frequency response by measuring voltage gain to different frequencies (30, 100, 200, 500, lk ,
10k, 30k etc). Determine upper and lower half power frequencies and bandwidth.
6. Connect a resistance Rf (feedback network) = 470Kohm between points A and B, and repeat steps 3
and 4. Determine bandwidth by measuring frequencies at which gain=0.707 times the gain at 5 kHz.
7. Replace resistance Rf =470Kohm by 1M and repeat steps 4 and 5. Determine bandwidth as in step 6.
8. Connect circuit as shown in Fig. 2.2, and repeat steps 2, 3, 4 and 5.
9. Connect a resistance Rf of 22KΩ between points A and B as shown in Fig.4.1 and repeat steps 3, 4
and 6.
10. Replace Rf =22 KΩ by 47 KΩ and repeat step 6.
11. Remove Rf and CE as shown in Fig.2.4 and repeat steps 3,4, and 5.
12. Connect the circuit as shown in the Fig.2.3, and repeat steps 2, 3, 4 and 6
13. Remove Rf and repeat step.3, 4 and 6.
14. Connect the circuit as shown in Fig. 2.3 and repeat steps 2, 3, 4 and 6
15. Remove Rf and Cf and repeat steps 3, 4 and 6.
Observation Table
S.No Input Frequency Output Voltage (Vo) Gain in dB = 20log(Vo/Vin)(without
Feedback)
1 100Hz
.
. 2MHz

S.No Input Frequency Output Voltage (Vo) Gain in dB = 20log(Vo/Vin)(with

Feedback)
1 100Hz
.
. 2MHz

Conclusion: Compare bandwidth for all the amplifier circuits.

Post-Experiment Questions

1. Mention the application of negative and positive feedback amplifiers.

2. What is the effect of negative feedback on Gain of an amplifier?
3. Discuss effect of negative feedback on bandwidth of amplifiers.

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EXPERIMENT No. 3

AIM: Design and analyze the output voltage V0 for OP-AMP (IC 741) as : (i) Inverting and Non-inverting
amplifier for input voltage 0.5V with input Resistance (Ri) of 10 KΩ and feedback Resistance (Rf) of 100
KΩ. (ii) Voltage follower circuits for input voltage 1V.

PRE EXPERIMENT QUESTIONS:

1. What are the ideal characteristics of OP Amp?

2. Differentiate between Inverting & Noninverting amplifier.

REQUIREMENTS:

Equipments
S. No. Name Specification Quantity
1 CRO 20MHz 1
2 Function Generator 5MHz 1
3 Regulated Power Supply (+15 to – 15) V 1
4 Voltmeter (0-30) V 1

Components
S. No. Name Specification Quantity
1 Resistors 10KΩ, 1KΩ 1
2 Op-Amp LM 741 1
3 Bread Board - 1
4 Connecting wires & CRO Probes - as required

THEORY:

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Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

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Result

ANALYSIS AND CONCLUSION:

POST EXPERIMENT QUESTIONS:

1. How voltage gain is calculated?

2. What is the mean of voltage follower?

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EXPERIMENT No. 4
AIM: Design a differential amplifier with ±12V DC power supply and calculate Common mode gain,
differential mode gain, CMRR and slew-rate.

PRE EXPERIMENT QUESTIONS:

1. What are the ideal characteristics of OP Amp?

3. Differentiate between common mode & differential mode gain.
4. What is CMRR?
5. Define slew rate. What is a physical significance?

REQUIREMENTS:

Equipments
S. No. Name Specification Quantity
1 CRO 20MHz 1
2 Function Generator 5MHz 1
3 Regulated Power Supply (+15 to – 15) V 1
4 Voltmeter (0-30) V 1

Components
S. No. Name Specification Quantity
1 Resistors 10KΩ, 1KΩ 1
2 Op-Amp LM 741 1
3 Bread Board - 1
4 Connecting wires & CRO Probes - as required

THEORY:
 Differential mode component

Vd = (V1-V2)

 Common mode component

Vcm = (V1+V2)/2

Fig 4.1 Differential mode circuit

Differential Mode Gain = Ad = VOUT/Vd

Common Mode Gain = Acm = VOUT/Vcm

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Fig 4.2: Common mode circuit diagram

Although a differential amplifier is supposed to amplify the differential component of the input signals,
the common component of the input signals (Average of both the inputs) will also appear at the output.
In practice, this common mode component will cause an error in the measurement of signals

To eliminate the effect of the common mode component, we choose the resistor values of R1 to R4 in such
a way that Acm is zero. Because of this imperfection, a figure of merit used to describe differential
amplifier is the Common Mode Rejection Ratio (CMRR), which is defined as

CMRR = 20 log (Ad/Acm)

For a perfect differential amplifier, the CMRR is equal to ∞, as Acm is zero.

In practice, a CMRR in excess of 80dB to 100dB will be needed for high accuracy measuring system

The slew rate of an op amp or any amplifier circuit is the rate

of change in the output voltage caused by a step change on the
input. It is measured as a voltage change in a given time
typically V / µs or V / ms.

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CIRCUIT DIAGRAM:

Slew rate: CMRR: Rf=10K, R1=R2=Rg=1K

Fig 4.3: Inverting circuit for slew rate

Fig 4.4: Inverting circuit for slew rate input and output wave form

PROCEDURE:

For Slew Rate

 Connections are made as per the Figure 4.3
 Give a square wave input of 1 Vpp, 1 KHz.
 Find the slew rate from the formula,
SR=ΔVo/Δt

For CMRR
 Connections are made as per the Figure 4.1 and 4.2.
 Give a sinusoidal wave input of 1 Vpp, 1 KHz.
 Note down the output from CRO.
 Determine the CMRR by following procedure.

Common Mode Gain = Ac =Vo/Vi

Differential mode gain = Ad =R2/R1

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CMRR = 20 log (Ad/Ac)

RESULT:

Common Mode Gain = Ac

Differential mode gain = Ad =
CMRR =
Slew Rate =

ANALYSIS AND CONCLUSION:

POST EXPERIMENT QUESTIONS:

3. How common mode gain is calculated?

4. What is the ideal value of CMRR?
5. What is the ideal value of slew rate?

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EXPERIMENT No. 5

AIM: Design and analyze OP-AMP applications as a difference amplifier, integrator and differentiator
Circuits for 1 KHz input signal.
PRE EXPERIMENT QUESTION:

 What is an Op-Amp? Why is it so widely used?

 What are the different characteristics of an Ideal Op-Amp?
 Write application of integrator & Differentiator.
 Discuss Different application of Op-Amp.

REQUIREMENTS:

Equipments

S. No. Equipment Specification Quantity

1 CRO 20 MHz 1
2 Function Generator 5 MHz 1
3 Regulated Power Supply (+15 – 0 – 15) V 1
4 Regulated Power Supply (0 - 30) V 2
5 Voltmeter (0-30) V 1

Components

S. No. Component Specification Quantity

1 Resistors 10KΩ,100 KΩ,1KΩ 3,4,1
2 Capacitor 0.1µf, 0.01µf.100pf 1
3 Op-Amp LM 741 1
4 Bread Board - 1
5 Connecting wires & CRO Probes - As many required

THEORY:

ADDER - In the summing amplifier circuit, the output voltage, (Vout) becomes proportional to the sum
of the input voltages, V1, V2, V3, etc.

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Fig 5.1Fig 6.1

SUBTRACTOR - The subtractor circuit, input signals can be scaled to the desired values by selecting
appropriate values for the resistors. The output voltage Vo is equal to the voltage applied to the non-
inverting terminal minus the voltage applied to the inverting terminal; hence the circuit is called a
subtractor.

Fig 5.2

INTEGRATOR- The Op-amp Integrator is an operational amplifier circuit that performs the
mathematical operation of Integration that is we can cause the output to respond to changes in the input

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voltage over time as the op-amp integrator produces an output voltage which is proportional to the integral
of the input voltage.

Fig 6.3
Fig 5.3

DIFFERENTIATOR- The operational amplifier circuit that performs the mathematical operation of
Differentiation that is it “produces a voltage output which is directly proportional to the input voltage’s
rate-of-change with respect to time”.

Fig 5.4

CIRCUIT DIAGRAM:

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Fig 5.5 Summer

Fig 5.6
Difference Amplifier

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Fig 5.7 Integrator

Fig 5.8 Differentiator

PROCEDURE:

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Adder & Subtractor

 Connect the circuit as per the given circuit diagram in Figure 8.5 and 8.6
 The positive of the power supply to the Op-Amp should be connected to pin no. 7, negative to pin
no. 4, and common to the circuit ground.
 Connect the D.C. Power supply (dual) at the input terminals V1 & V2 as shown in fig (no.1).
 Vary both the input voltages in regular steps.
 Measure the corresponding output voltage, using a multimeter.
 Tabulate the readings.
 Repeat the same procedure for the Subtractor circuit (fig no.2)

Integrator & Differentiator

 Assemble the circuit as shown in the Figure 8.7 and 8.8

 Set the function generator at 1 KHz frequency (square wave).
 Set the input voltage at ………..Volts, and verify it on the Ch-I of the CRO. Ensure that RC >>
T; where, T = 1/f and f is the frequency of the input signal.
 Connect the Ch-II of the CRO to the output of the circuit and observe the output (triangular)
waveform.
 Trace the output waveform and measure the frequency and output voltage (peak to peak).
 Plot the input & output waveforms on a graph paper, with input & output overlapped.

OBSERVATION TABLE:

Adder & Subtractor

Vout (Theoretically) Vout (Practically)

Integrator
Input Output
Waveform Time Period Frequency Waveform Time Period (ms) Frequency
Type and (ms) Type and
amplitude amplitude

Differentiator

Input Output
Waveform Time Period Frequency Waveform Time Period (ms) Frequency
Type and (ms) Type and
amplitude amplitude

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ANALYSIS AND CONCLUSION: Analyze the applications of the OP AMP. Derive the output for
various combinations of the inputs and also verify the results theoretically.

POST EXPERIMENT QUESTIONS:

1. Differentiate between Inverting and Non Inverting Op Amp configuration.

2. How capacitor changes the input waveforms?
3. Why RC of the circuit must be larger than the time period of the input waveform?

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EXPERIMENT NO. 6
AIM: Design the following RC sinusoidal oscillators; Also verify the theoretical and practical Oscillating
frequency. (i) RC phase shift oscillator, if its frequency of oscillation is 955 Hz and R1=R2=R3 =680KΩ.
(ii) Wien bridge oscillator uses R=4.7KΩ, C=0.01µF, and R F=2R1

PRE-EXPERIMENT QUESTIONS:
1. What do you understand by Barkhausen Criteria for sustained Oscillation?
2. How does an Oscillator operate without an input signal?
3. What is the difference between Sinusoidal and Non Sinusoidal Oscillator?
EQUIPMENT/COMPONENT REQUIREMENTS:
S. No. Equipment Specification Quantity
1. CRO 20MHz 1
2. Regulated Power Supply 0-30V 1
3. Operational Amplifier µA741, LM741 2
660 Ω, (1,2,10,15) KΩ,
4. Resistors As indicated in the
4.7 KΩ (Pot.)
circuit.
5. Capacitors 0.1 µf , 0.01µf
6. Bread Board - 2
Connecting wires & CRO
7. - As many required
Probes

THEORY: An oscillator is a circuit that produces periodic electric signals such as sine wave or square
wave. The application of oscillator includes sine wave generator, local oscillator for synchronous
receivers etc. An oscillator consists of an amplifier and a feedback network.
1. 'Active device' i.e. Op-Amp is used as an amplifier.
2. Passive components such as R-C or L-C combinations are used as feedback network.
To start the oscillation with the constant amplitude, positive feedback is not only the sufficient condition.
Oscillator circuit must satisfy the following two conditions known as Barkhausen conditions:
1. Magnitude of the loop gain (Av β) = 1,
Where, Av = Amplifier gain and β = Feedback gain.
2. Phase shift around the loop must be 360°or 0°.

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Figure 6.1 Basic Oscillator Block diagram

There are two types of RC oscillators:
1. PHASE SHIFT OSCILLATOR: In this type of oscillator the output of an amplifier must be 1800 out
of phase with input. A general circuit diagram of a phase shift oscillator is shown in Figure 8.2, where the
amplifier is an ideal one. A phase shift network (usually a resistor-capacitor network) is used to produce
an additional phase shift of 1800 at one particular frequency to develop the required positive feedback.

The phase shift oscillator is used to the range of frequencies for several hertz to several kilohertz and so
includes the range of audio frequencies. The frequency depends on the impedance elements in the phase
shift network. The phase shift oscillator circuit is not very suitable for generating variable frequency
because the resistors and capacitors must be simultaneously changed to obtain the required frequency
control over a wide range therefore it is used mostly in fixed frequency applications.

Vo

Figure 6.2 RC Phase Shift Oscillator

PROCEDURE:

1. Components /equipment are tested for their good working condition.

2. Connections are made as shown in the figure 8.2.
3. Feedback Resistor Rf is adjusted to get sustained oscillations.
4. Observe the output wave form on CRO and measure the frequency.
5. Verify the frequency with the desired value.

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SIMPLIFIED DESIGN:

2. WIEN BRIDGE OSCILLATOR:

Wien bridge oscillator is an audio frequency sine wave oscillator of high stability and simplicity. The
feedback signal in this circuit is connected to the non-inverting input terminal so that the op-amp is
working as a non-inverting amplifier. Therefore, the feedback network need not provide any phase shift.
The circuit can be viewed as a Wien bridge with a series combination of R1 and C1 in one arm and parallel
combination of R2 and C2 in the adjoining arm. Resistors R3 and R4 are connected in the remaining two
arms. The condition of zero phase shift around the circuit is achieved by balancing the bridge.
The series and parallel combination of RC network form a lead-lag circuit. At high frequencies, the
reactance of capacitor C1 and C2 approaches zero. This causes C1 and C2 appears short. Here, capacitor C2
shorts the resistor R2. Hence, the output voltage Vo will be zero since output is taken across R2 and C2
combination. So, at high frequencies, circuit acts as a 'lag circuit'. At low frequencies, both capacitors
act as open because capacitor offers very high reactance. Again, output voltage will be zero because the
input signal is dropped across the R1 and C1 combination. Here, the circuit acts like a 'lead circuit'. But
at one particular frequency between the two extremes, the output voltage reaches to the maximum value.
At this frequency only, resistance value becomes equal to capacitive reactance and gives maximum
output. Hence, this frequency is known as oscillating frequency (f).

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Figure 6.3 Circuit diagram of Wien Bridge Oscillator using Op-Amp

SIMPLIFIED DESIGN:

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PROCEDURE:

Test the Op-Amp by giving a sine wave at the inverting terminal, ground at the noninverting
terminal to obtain a square wave at the output.
Set up the circuit as shown in the figure 8.3.
Obtain the sine wave at the output. Check for the frequency obtained.

OUTPUT (TO BE OBTAINED):

RESULT: A Phase Shift Oscillator and Wien bridge Oscillator were studied and designed for a frequency
of 1 KHz and the output waveform is observed.

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EXPERIMENT NO 7

Design the following LC oscillators; Also verify the theoretical and practical Oscillating frequency.
(i) For a Hartley oscillator, self-inductance of the two coils are L1=100mH, L2=1mH and mutual
inductance between the two coils is 20µH. its output for a capacitor of value 20pF.
(ii) For a Colpitts oscillator in which feedback network consists of two capacitors of 100pF and 20 pF
with 100mH coil across these capacitors.

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EXPERIMENT NO 8

AIM: Design the following non-sinusoidal oscillators; Also verify the theoretical and practical
Oscillating frequency.
(i) For the UJT oscillator with RE = 10 KΩ, η= 0.75, C=0.002µF.
(ii) An astable multivibrator with component values: R1 = 2 KΩ, R2 = 20 KΩ, C1 = 0.01 μF and C2 =
0.05 μF.
APPARATUS REQUIRED: Bread Board, Power Supply, UJT (2N2646), CRO, Potentiometer,
Capacitor (between 0.01 to 1nf), and resistances (between 1k and 10k).

THEORY: UJT relaxation oscillator is a type of RC (resistor-capacitor) oscillator where the active
element is a UJT (uni-junction transistor). UJT is an excellent switch with switching times in the order of
Nano seconds. It has a negative resistance region in the characteristics and can be easily employed in
relaxation oscillators. The UJT relaxation oscillator is called so because the timing interval is set up by
the charging of a capacitor and the timing interval is ceased by the rapid discharge of the same capacitor.

Figurer 1Structure of UJT and Equivalent circuit diagram.

Figurer 8.1 Structure of UJT and Equivalent circuit diagram

PROCEDURE:

3. Connect the components on bread board according to the given circuit diagram.

Figurer 8.2 Circuit diagram for common Drain or Source Follower

2. Connect the both channel of CRO on VB1 and VB2 observe the waveform.

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3. Try to understand the working of this oscillator with the help of waveforms.

RESULT: Study of Non sinusoidal oscillator (Relaxation oscillator) has been done successfully.

PRECAUTIONS:

1. Don’t short circuit any pins of MOSFETs

2. Select the pin properly.
3. Don’t not exceed the current and voltages provided in the datasheet of the components.
4. Be careful with electricity.

DATASHEET OF 2n2646

Pin Diagram of 2

Pin Diagram of 2N2646 (Keep the pins upward)

EXPERIMENT NO. 9

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Simulation of Amplifier Circuit

AIM: Simulation of single stage CE amplifier (designed in experiment1) using any available simulation
software and also find the Voltage gain, Input impedance, Output impedance, and bandwidth. (TARGET,
PSPICE-1etc.)
PRE-EXPERIMENT QUESTIONS:
1. What is the importance of simulation software in electronic circuit design?
2. Name five different software tools along with their basic features used for electronic circuit simulation.
3. Find out different profile settings that can be used for electronic circuit simulation?

REQUIRED EQUIPMENT/COMPONENTS:

Desktop Computer with up to 1GB RAM, up to 3GHz processor’s speed and Windows XP or NT platform

SOFTWARE:
OrCAD 16.0 - OrCAD Capture CIS demo – By Cadence

CIRCUIT DIAGRAM:

Figure 9.1 Circuit schematic of CE amplifier

SIMULATION RESULT:

BJT Amplifier for AC Sweep 1 KHz to 100MHz

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100V
G
A
I
N

50V

0V
1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz 3.0MHz 10MHz 30MHz 100MHz
V(RL:2)
FREQUENCY

Max Output Voltage - 90.79707 V

Cutoff_Lowpass_3dB-𝑓𝐻 13.91028M
Cutoff_Highpass_3dB 𝑓𝐿 34.10052k
Bandwidth_Bandpass_3dB -> B.W. = ( 𝑓𝐻 − 𝑓𝐿 ) = 13.87618M

ANALYSIS:
1. Selecting a desired signal frequency from the frequency response curve observe the input and output
signal waveforms and comment.
2. Perform analysis to estimate nodal voltages and current values.

POST-EXPERIMENT QUESTIONS:
1. What is the value of voltage gain by formula and obtained through simulation? Compare them and
comment on the result.
2. Find out different tools that can be used for different levels of circuit design and implementation.
Name at least three such tools along with their usage level in VLSI design.
3. Explore different types of simulation profile settings available in the simulation software.

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EXPERIMENT NO 10

AIM: Design and simulate of 2nd order Active Low and High pass filter for cut-off frequency 1kHz
and pass band gain of 1.586, also draw the frequency response curve for each type.
Apparatus: Tina software

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Department of Electronics and Communication Engineering Page 49

 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Requirements: Tin a Software

Result

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Department of Electronics and Communication Engineering Page 51

 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

EXPERIMENT NO 11
AIM: Design and Study of Analog to Digital Converter.

APPARATUS REQUIRED: DAC809 with power supply cord, DMM and Connecting Cords

THEORY: Successive approximation ADC uses one or a few comparators, operated iteratively, to yield
high accuracy conversion with far fewer components than flash conversion. A/D converter using
successive approximation technique effectively performs a binary search in a digital analog look up table
and using a digital to analog converter (DAC) and comparator circuit. Successive approximation
converters also allow higher resolutions but tend to be slower since they usually require N cycles to
produce the answer. Successive approximation ADC operates at much slower conversion rates than flash
ADC. Sub ranging analog to digital converters provide an intermediate compromise between flash ADCs
and successive approximation ADCs.
Sub ranging analog to digital converters typically use a low resolution flash quantizer during a first or
coarse pass to convert the analog input signal into the most significant bits (MSB) of its digital value. A
digital to analog converter (DAC) then generates an analog version of the MSB word. The residue signal
is sent through one or more fine passes to produce the lower significant bits of the input signal. The lower
significant bits and the MSB word are then combined by digital error correcting circuitry to produce the
desired digital output word. A switched capacitor analog to digital converter (ADC) operated according
to successive approximation register technique comprises a plurality of weighted capacitors with
associated switches and a local DAC. The capacitors are charged by a voltage sample of an analog signal
to be converted. The voltage sample is compared with an analog signal generated by the local DAC.

CIRCUIT DIAGRAM:-

Figure 10.1 Successive approximation ADC

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 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

PROCEDURE:

1. Connect supply to the trainer.

2. Make the connections as shown in figure.
3. Switch ON the power supply.
4. Vary the DC potentiometer, measure voltage with DMM and observe the corresponding digital output
on LEDs.
5. Press yellow switch before measuring values. Fill the given table according to your observation.

OBSERVATION TABLE:

Analog
Voltage Digital Equivalent
(Volts) D7 D6 D5 D4 D3 D2 D1 D0

RESULTS:
According to applied input signal in form of DC level it provides the digital signals in 1 and 0 forms.

Department of Electronics and Communication Engineering Page 53

 NOIDA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GREATER NOIDA
Department of Electronics & Communication Engineering
Accredited by NBA and NAAC
Approved by AICTE and Affiliated to Dr. A.P.J. Abdul Kalam Tech. University, UP

Analog Circuits Lab (AEC – 0452), Lab Manual (ECE, IV Semester)

Department of Electronics and Communication Engineering Page 54