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ANALOGUE ELECTRONICS 1
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1.0 Semi – Conductor Devices
1.1 A thyristor is a semi-conductor device with few layers of Na and P type
material. They act as bistable switches, conducting when there gate receives a
current trigger. The switches continue to conduct until they are forward biased.
In other words, thyristor is a four – layer PNPN device, which has three PN
Junctions. It has two stable switching states namely the ON or conducting state in
between these two, as is in bipolar and field – effect transistors. The thyristors are
used specifically for high power switching applications such as control of a.c
power to the load, motor speed control, light dimmers, etc. Unlike BJ T’s and
operational amplifiers (OP – amp), which can also be used as switches, most
thyristors are not designed to be used as linear amplifying devices.
Types of Thyristors
The following are two main types of thyristors:
1. Unidirectional: The thyristors, which conduct in forward direction only, are
known as unidirectional thyristors. Example are silicon control rectifier
(SCR’s), light activated silicon controlled rectifiers (LASCR’s), and silicon
controlled switch (SCS).
2. Bidirectional: The thyristors, which can conduct in forward as well as in
reverse direction are known as bidirectional thyristors. The example of such
thyristors is a triode A.C switch (TRIAC).
The thyristors require a control signal to switch from the non-
conducting to the conducting state. The devices, which generate such signals,
are called triggering devices. Which includes Unijunction Transfer (UJT),
Diode A. C Switch (DIAC). Silicon Unilateral Switch (SUS), Silicon Bilateral
Switch (SBS), Silicon Asymmetrical Switch (SAS), Silicon Asymmetrical Silicon
Bilateral Switch (ASBS) and SIDAC.
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Fig. 1.1
1.2 Silicon Controlled Rectifier (SCR)
These days, the silicon controlled rectifier briefly written as (SCR) is one of
the most important semi-conductor device in the industrial or power electronics
field. It is used as a controlled switch to perform curvedly of functions such as
rectification, d.c to a.c. inversion and power control. It is an important element in
the control of electrical motor speed, electrical furnace heat, lighting are many
other uses.
A Silicon Controlled Rectifier (SCR) Consists of Four Semi-Conductors Layers
Forming a PNPN Structures as shown in fig. 1.1 (a). It has three PN junctions
namely: J1, J2 and J3. There are three terminals called anode (A), cathode (K) and
the gate (G). The anode (A) terminal is taken out from the P 1 – layer. The cathode
(K) terminal is taken out from the N 2 – Layer, and the gate (G) terminal from the
P2 – layer. The schematic symbol of SCR is shown in fig. 1.1 (b). It may be noted
that the symbol is quite similar to that of a diode. In fact, the SCR resembles the
diode electrically, since it conducts the current in one direction only, when
forward biased. However, the SCR’s different is from a diode because it has an
additional gate terminal. This gate is used to turn ‘OM’ the device.
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This is base erected by splitting the four – layer PNPN structure of fig. 1.1
(a) into two three – layer transistor structures as shown in fig. 1.3 (a) and then
considering the resulting circuit of fig. 1.3 (b).
Note that one transistor for fig. 1.3 is an NPN device while the other is a
PNP transistor.
For discussion purposes, the signal shown in fig, 1.4a will be applied to the
gate of the circuit of fig. 1.3b. During the interval O and t 1 Vgate = OV, the circuit of
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fig. 1.3b will appear as shown in figure 1.4b (Vgate = OV is equivalent to the gate
terminal being grounded as shown in the figure). For V BE2 – Vgate = OV, the base
current IB2 = 0 and 1C2 will be approximately ICO. The base current of Q1, IB = IC2 = ICO,
is too small to turn Q1 on. Both transistors are therefore in the “off” state,
resulting in a high impedance between the collector and emitter of each
transistor and the open – circuit representation for the controlled rectifier as
shown in fig. 1.4c.
At t = t1, a pulse of VG volt will appear at the SC 2 gate. The potential VG was
chosen sufficiently large to turn Q 2 on VBE2 = VG. The collector current of Q 2 will
then rise to a value sufficiently large to turn Q1 on IB1 = IC2 as Q1 turns OZ.
Fig. 1.5 “ON” State of the SCR
IC1 will increase, resulting in a corresponding increase in I B2. The increase is
base current for Q2 will result in a further increase in I C2. The npt result is a
regenerative increase in the collect current of each transistor. The resulting anode
– to – cathode resistance RSCR = V/IA is then small because IA is large, resulting in
the short – current – representation for the JC2 as indicated in fig. 1.36.
The regenerative action describes above results in JC 2S having typical turn –
on times of 0.110 1ms. However, high – power devices in r range 100 to 400 A
may have 10 to 25ms turn – on – times.
1.3 It is Evident from the Figure that the Collector of each Transistor is
connected to the base of other Transistor
Therefore, the collector current of transistor Q 1, is the base current of
transistor Q2, and the base current of transistor Q1 is the collector current of
transistor Q2; for this cct, we have an action of positive feedback or regeneration.
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It means that if there is a charge in current, at any point in the loop (formed by
transistors Q1 and Q2), it is amplified and returned to the starting point with the
same phase.
For example, if the base current of transistor Q 2 increases, the collector
current of transistor, Q2 will also increase. It causes more base current through
transistor Q1 due to which the collector current of transistor Q1 increases. This
action will continue till both the transistors are driven into saturation. In this case,
the SCR acts like a ON switch and it will pass the current from anode to cathode.
On the other hand, if the base current of transistor Q 2 decreases, the
collector current of transistor Q2 will also decrease. It causes the reduced base
current through transistor Q1 due to which the collector current of transistor Q 1
decreases. This action will continue till both transistors are driven into a cut-off. In
this case, the SCR acts like a OFF switch and have it will block the current from
anode to cathode.
4. As the value of gate current (I h) is increased above zero, the SCR turns ON at
lower breakdown voltages as indicated by the points marked A 1 and A11
respectively.
5. The region between points O and A is called forward blocking region. In this
region, the SCR is OFF and blocks the forward anode – to – cathode voltage.
This voltage is also known as forward blocking voltage.
6. The region lying between the points B and C is called forward conduction
region. In this region, the SCR is ON and conducts current.
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4. The region lying between the points D and R is called reverse avalanche
region. In this region, a large value of reverse current flows through the
device.
Fig. 1.4
1. As the applied anode – to – cathode voltage (V AR) is increased above zero, a
very little anode current flows through the device. Under this condition, the
SCR is OFF and it’s offered very high resistance (ideally open). It continues
till the voltage VAR reaches the forward break over voltage marked by point
A.
2. As the anode – to – cathode voltage exceeds the break over voltage, the SCR
turns ON and the anode – to – cathode voltage decreases quickly to a value
marked by point B. The value of break over voltage is about one volt. At this
stage, the current through the SCR increases rapidly to a large value which is
determined by the supply voltage and the value of the load resistance in the
cct.
3. The current corresponding to the point B is called holding current and is
designated by the symbol IH, it is the minimum value of anode current to
leave the SCR ON. If the anode current falls below the value of holding
current, the SCR turns OFF as shown by the broken limp OR.
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It gives the relationship between the anode current and the anode – to –
cathode voltage of SCR for different values of gate current. The SCR has two types
of V – I characteristic, namely forward characteristic and reverse characteristics.
The forward characteristics may be obtained by using the SCR circuit having
adjustable d.c supplies VAR and VGG as shown in fig. 1.6. The reverse characteristics
may be obtained by reversing the connections of both the d.c supplies.
An example is used to measure the value of anode current, while the
voltmeter is used to measure the anode - to – cathode voltage.
Forward Characteristic
The forward characteristic of SCR may be obtained by, first of all, adjust the
gate current to zero value by keeping the switch (S) open.
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1.5 How the Output Voltage and Current can be Controlled by verying the Firing
Angles of a SCR in a Controlled Rectifier
In a controlled rectifier SCR of a triac is uses instead of an ordinary PN
diode, such a device has three terminals, namely anode, cathode and gate. The
load current, in a controlled rectifier, flows only when a control signal is applied
at the gate terminal to twin ‘ON’ the rectifier.
Fig. 1.7 (a) shows the half – wave controlled rectifier circuit and fig. 1.7 (b)
shows the input voltage wave form and load current waveform. It may be noted
that the control signal is applied to turn on
the rectifier in such a way that the conduction starts at a specific point marked
A in fig. 1.7b. The point A (called fining point) corresponds to the angle , so that
the conduction is delayed by this much period. It is because of this delay that
the amount of load current has reduced in a controlled rectified as compared to
an ordinary rectifier.
It will be interesting to know that once the rectifier is turned; ‘ON’ it
remains in conduction for the ‘P’ positive half-cycle i.e. up to 180 0 (on πr
radians). Thus, the point A (at which the conduction starts) is determined by the
angle of delay in applying control signal to the rectifier cct. As the angle
increases, conduction is further delayed and the load current is also reduced.
It is evident from the above discussion, that load current in a controlled
rectifier may be controlled easily by selecting the firing point.
1.6 Applications of S.C.R
The SCR has a number of applications, but the following industrial
applications are important from the subject point of view:
1. Motor – speed control
2. Light – dimming control
3. Heater control
4. Phase control
5. Battery charger
6. Inverter
7. Rectifier power supplied
8. Relay control
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The diac is basically a two – terminal parallel – inverse combination of semi-
conductor layers that permits triggering in either direction. The characteristics of
the device is presented in fig. 1.9a, clearly demonstrate that there is a breakdown
voltage in either direction. This possibility of an ‘ON’ condition in either direction
can be used to its fullest advantage in a.c applications.
The basic arrang ement of the semi-conductor layers of the diac is shown in
fig. 1.9b, along with its symbol. Note that neither terminal is referred to as the
cathode.
TRIAC
The triac is fundamental a diac with a gate terminal for controlling the turn-on
conditions of the bilateral device in either direction. In other words, for either
direction the gate current can control the action o f the device in a manner very
similar to that demonstrated for SCR. The characteristics, however of the triac in
the first and second quadrant are different from those of the diac, as shown in fig.
10b. Note the holding current in each direction, not present in the characteristics
of the diac. The symbol of triac is given in fig. 1.10a.
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(a) Symbol of TRIAC (b) Characteristics of TRIAC
For each possible direction of conduction, there is a combination of semi-
conductor layers whose state will be controlled by the signal applied to the gate.
1.9 The Practical Application of DIAC and TRIAC
DIAC Application
a. DIAC is use in a proximity detector or switch.
b. Used as a triggering device for triac in phase control circuits such as light
dimming, heat control and motor speed control and motor speed control,
etc.
TRIAC Application
The triac has an important property that it can conduct current in either
forward or reverse direction, depending upon the polarity of the voltage across its
terminals. This property makes the triac very useful in a large number of industrial
applications such as:
1. Phase control
2. Motor speed control
3. Heater control
4. Light – dimming control
5. Static switch turn a.c power ON and OFF.
1.10 Thermistors
The word thermistor is an acronym for thermal resistor, i.e. a thermometer
– sensitive – resistor. It is to detect very small charges in temperature. Also its
terminal resistance is related to its body temperature. The veriation in
temperature is reflected through an appreciable variation of the resistance of the
device. Thermistors with both negative – temperature – coefficient (NTC) and a
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positive temperature – coefficient (PTC) are available. But NTC thermistors are
more common. The negative – temperature – coefficient means that the
resistance decreases with the increases in temperature.
And the positive – temperature – coefficient means that the resistance
increases with the increase in temperature.
The NTC thermistors are manufactured by sintering semi-conductor
ceramic materials prepared from mixtures of metallic oxides of cobalt, nickel,
manganese, etc. These materials have high negative temperature – coefficient.
The PTC thermistors are from doped barium titanate semi-conductings material.
The material has a very large charge in resistance for a small change in
temperature.
Thermistors are manufactured in the form of beads, probes, discs, washers
and rods as shown in fig. 1.10a.
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2.0 Field Effect and Unijunction Transistor
2.1 (i) In the UJT is a three – terminal device having the basic
construction of fig. 2.1. A slab of slightly doped (increased resistance
characteristic) n-type silicon material has two base contacts attached to
both onds or one surface and an aluminum rod alloyed to the opposite
surface. The P.n junction of the device is formed at the boundary of the
aluminum rod and the n-type silicon slab. The single P.n junction
accounts for the terminology unijunction. It was originally called a duo
(double) base due to the presence of two base contacts. Note in fig. 2.1
that the aluminum rod is alloyed to the silicon slab at a point closer to
the base 2 contact than the base 1 contact and that the base 2 terminal is
made positive with respect to the base 1 terminal by VBB volts. The
effects of each will become evident later.
The symbol for the unijunction transistor is provided in fig. 2.2. Note that
the emitter leg is drawn at an angle to this virtual line representing the slab of n-
type material. The arrow lead is pointing in the direction of conventional current
(hole) flow when the device is in forward biased, active or conducting state.
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Fig. 2.2 Symbol and Basic Biasing Arrangement for UJT
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may vary from 5kΩ to down to 50Ω for a corresponding change of I E from O to
50MA. The interbase resistance RBB is the resistance of the device between
terminals B1 and B2 when IE = 0. In equation form,
RBB = RB1 + RB2 /IE = 0 ……………………….. 2.1
RBB is typically within the range of 4 to 10 kΩ. The position of the aluminum rod of
fig. 2.1 will determine the relative position of R B1 and RB2 with IE = 0. The
magnitude of VRB, with IE = 0 is determined by the voltage – divider rule in the
following manner.
RB 1
V RB= .V = A V BB /I E=0
R B 1 + R B 2 BB
The better Greek letter ∩ (eta) is called the intrinsic stand or ratio of the device
and is defined by:
RB 1 ❑ = RB 1
∩=
R B 1 + RB 2 I E=0 RBB
…………………………. 2.2
For applied emitter potentials VB greater than VRB = ∩ VBB by the forward voltage
drop of the diode VB 0.35 and 0.70 v, the diode will fire. Assume the short – circuit
representation (on an ideal basis), and IE will begin to flow through RB1. In
equation form the emitter firing potential is given by
VP = VBB + VD ……………………..2.3
(i) V-J Static Characteristics of UJT
Fig. 2.4 shows the V-J characteristics of UJT. There are two important points
on the characteristics curve namely the peak – point and the voltage – point.
These points divide the curve into three important regions i.e., cut-off region,
negative resistance region and saturation region. These reasons are explain
below:
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1. Cut-off Region. The region, to left of peak – point, is called cut0off region. In
the region, the emitter voltage is below the peak voltage (V P) and the emitter
current is approximately zero.
The UJT is in its OFF position in this region.
2. Negative Resistance Region: The region, between the peak – point and the
valley – point, is called negative – resistance region. In this region, the emitter
voltage decreases from UP to VV and the emitter current increase from I P to IV.
The increase in emitter current is due to the decrease in resistance R B1. It is
because of this fact that this region is called negative – resistance region. It is
the most important region from the application point of view. For example,
when the UJT is operated as an oscillator. It works in the negative resistance
region.
3. Saturation Region: The region, beyond the valley point, is called saturated
region. In this region, the device is in its ON position. The emitter voltage (V E)
remains almost constant with the increasing emitter current.
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the device is not symmetrical, because symmetrical unit does not provide
optimum electrical characteristics for most of the applications.
Device Operation
The device has a unique characteristic that when it is triggered,, its
emitter current increases regeneratively until it is restricted by emitter power
supply. It exhibits a negative resistance characteristic and so it can be employed
by an oscillator.
The UJT is biased with a positive voltage between the two bases. This
causes a potential drop along the length of the device. When the emitter voltage
is driven approximately one diode voltage above the voltage at the point where P
diffusion (emitter) is, current will begin to flow from the emitter into base.
Because the base region is very lightly doped, the additional current (actually
changes in the base region) causes conductivity modulation which reduces the
resistance of the portion of the base between the emitter junction and the B 2
terminal. This reduction in resistance means that the emitter junction is more
forward biased, and so even more current is injected. Overall, the effect is a
negative resistance at the emitter terminal. This is what makes the UJT useful,
especially in simple oscillator circuits.
It is evident from the above discussion that, as the emitter voltage receives
the peak – point voltage, the diode conducts (i.e. it becomes forward biased) and
the emitter current begins to flow under this condition the UJT is said to be fired,
triggered or turned ON. At this instant, the holes from the P-type emitter region
are injected into the base region and are swept by the electric field towards the
base terminal B1. The presence of excess holes, slightly reduced the resistance rB1
which in turn reduces the intrinsic stand – off voltage (∩. V BB). The action is
conductivity modulation.
Example 1
Determine the peak – point voltage (Vp) value for the 244870 UJT shown in fig
below take VB = 0.74.
Solution
Given, VB = 0.7v, ∩ = 0.75 (msn) VBB = Rv
We known that peak – point voltage are the cet,
VP = ∩. VBB + BV
= (0.75 x 12) + 0.7 = 9.7v
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Example 2
A UJT used for triggering the silicon controlled rectifier has rB1 = 4kΩ and rB2 – 2.5
kΩ. Find (a) the value are intrinsic stand – off rating and (b) the peak – point
voltage, if VBB – 15v. Take the barrier potential as 0.7v.
Solution
Given, rB1 = 4kΩ r
B2 = 2.5kΩ VBB = 15v and VB = 0.7v
(a) Intrinsic stand – off ratio.
We know that intrinsic stand – off rat io
rB 1 4
∩= = =0.62
r B 1 +r B 2 412.5
(b) Peak – point voltage.
We know that the peak – point voltage,
VP = ∩. VBB + VB = (0.6 x 15) + 0.7u
= 10v
Example
The intrinsic stand – off ratio for a UJT is determined to be 0.6. A measurement of
its interbase resistance 7kΩ. What are the UJT’s static values in rB1 and rB2 ?
Solution
Given, ∩ = 0.6 and rBB = 7kΩ
We know that intrinsic stand – off ratio ∩
rB 1 rB 1
0.6= = =0.62
r BB 7
and the total resistance (RBB)
Therefore: = 0.6n = 4.2kΩ 7 = rB1 + rB2 = 4.2 + rB2
r
B2 = 7 - 4.2 = 2.8kΩ.
(i) Intrinsic Stand – Off Ratio
Consider the equivalent circuit of a unijunction transistor (UJT) with a
battery voltage VBB applied across its base terminals B1 and B2 as shown in fig. As
the emitter is open, the applied voltage, V BB, divides itself across resistance rB1 and
r
B2. The voltage across the resistance,
r B1 r B1
V 1= x V BB= x V BB
r B 1+r B 2 r BB
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rB 1
The resistance ratio is r is an important characteristic of unijunction transistor
BB
Eventually, the value of intrinsic stand – off ratio is between 0.5 and 0.8.
The voltage drop across the resistance rBI is called intrinsic stand – off voltage. It
reverse biases the emitter diode.
UJT Operation
Consider the equivalent current if a UJT with the voltage source V EE
(connected across the emitter and base terminal) and V BB (connected across the
base terminals B1 and B2) as shown in fig. Hence, the emitter diode Ɵ) is reverse
biased by a voltage drop across the resistance (whom value is equal to ∩. Thus,
the total reverse bias voltage across a diode is equal to the sum of ∩. V BB and VD.
As long as the applied emitter voltage is below the total reverse bias
voltage (i.e. ∩. VBB + VD) across the diode, it remains biased. And there is no
emitter current. However, as the applied emitter voltage reached (or exceeds) the
value equal to (∩. VBB + VD), the diode conducts and the emitter current flows. The
value of emitter voltage, which causes diode to conduct, is called peak – point
voltage.
Mathematically, the peak – point voltage
VP = ∩. VBB + VD)
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Although, there are important differences between the two types of devices,
there are also many similarities that will be painted out in section to follow.
The primary difference between the two types of transistors is the fact the
BJT transistor is a current - controlled device as depicted in fig. 2.5a, while the
JFET transistor is a voltage – controlled device as shown in fig. 2.46. In order
words, the current IC in fig. 2.5a is a direct function of the level of I B. For the FET,
the current I will be a function of the voltage V GS applied to the input circuit as
shown in fig. 2.5b. In each case the current of the output is being controlled by a
parameter of the input circuit, in one case, a current level and in the other an
applied voltage.
Just as there are npn and pnp bipolar transistors, there are n-
channel and p-channel field – effect transistors. However, it is important to keep
in mind that the BJT transistor is a bipolar device that the conduction level is a
function of two charger carriers, electrons and holes. The FET is a unipolar
device depending solely on either election (n-channel) or hole (p-channel)
conduction.
The term field-effect in the chosen name deserves some explanation. We
are all familiar with the ability of a permanent magnet to draw metal filling to the
magnet without the need for actual contact. The magnetic field of the permanent
magnet has enveloped the fillings and attracted them to the magnet through an
effort on the part of the magnetic field lines to be as short as possible. For the FET
on electric field is established by the charges present that will control the
conduction path of the output circuit without the need for direct contact between
the controlling and controlled quantities.
Types of Field – Effect Transistor
Broadly speaking, there are two types of field effect transistors:
1. Junction Field – Effect Transistor (JFET).
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2. Metal Oxide Semi-conduct Field Effect Transistor (MOSFET).
Both of these types of FETs can be further subdivided as shown in fig. 2.6.
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Fig.
Operation of JFET
When the gate – to source voltage (VGS), if applied by d.c supplies (VGG)
and increased above zero as shown in fig. (a), the reverse bias voltage across the
gate – source junction is increased. As a result of this, the depletion regions are
widened. This reduces the effective width of the channel and therefore controls
the flow of drain current through the channel. When the gate – to – source
voltage (VGS) is increased further, a stage is reached at which two depletion
regions touch each other as shown in fig. (b).
At this gate - to – source voltage, the channel is completely blocked or
pinched off and drain current is reduced to zero. The gate – to – source voltage
(VGS) at which the drain current is zero (or completely cut-off) is called pinch off
voltage. It is designated by the symbol VP or VGS (off). The value of pinch off
voltage VP is negative for N-channel JFET’s. It depends on (i) doping of the N and
P regions of the device and (ii) width of the original channel structure. The
operation of P-channel JFET is exactly similar to N-channel JFET, except that
current carriers are holes and polarities of the d.c supply, voltage VGG and VDD
are reversed.
2.4 MOSFETS
The MOSFET is an abbreviation for metal – oxide field – effect transistor.
Like JFET, it has a source, gate and drain. However, unlike JFET, the gate of a
MOSFET is insulated from the channel. Because of this, the MOSFET is sometimes
known as an IGFET which stands for insulated – gate field effect transistor.
Types of MOSFET
There are two basic types of MOSFETs, depletion – type MOSFETs and
enhancement – type MOSFET. The depletion type MOSFETs are also called D –
type MOSFETs and enhancement – type MOSFETs, an E- - type MOSFETs. The
primary difference between the two types of MOSFET is the difference between
the constructions.
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Fig. Basic
Structure of N-channel Depletion – Type MOSFET
The depletion - type MOSFET can be operated in two different modes as given
below:
1. Depletion Mode: The device operates in this mode, when the gate voltage is
negative.
2. Enhancement Mode: The device operation in this mode, when the gate
voltage is positive.
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It is evident from the above discussion that negative gate voltage depleted
the channel of free electrons. It is due to this feet that the working of a MOSFET,
with a negative gate voltage, (i) is called depletion mode.
Fig. (b) shows MOSFET with a positive gate – to – source voltage. The
positive gate voltage increased the number of free electrons passing through the
channel. The greater the gate voltage, greater is the number of free electrons
passing through the channel. Because of this fact, positive gate operation is called
enhancement mode.
Characteristics of JFET
Fig. Drain Characteristics with VGS 20 Volt
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current increases slowly as compared to that in ohmic region. It is because of
the fact, that with the increase in drain – to – source voltage, the drain
current increases. This in turn increases the reverse bias voltage across the
gate – source junction. As a result of this, the depletion – region grows in
size, thereby reducing the effective width of channel.
At the drain – to – source voltage, corresponding to point B, the channel
width is reduced to a minimum value and is known as pinch off. The drain –
to – source voltage, at which the channel pinch – off occurs, is known as
pinch – off voltage (VP).
3. Pinch Off Region: This region shown by the curve BC. It is called saturation
region or constant current region in the region, the drain current remains
constant at its maximum value (i.e. IDS>). The drain, current in the pinch off
region, depends upon the gate – to – source voltage and is given by the
equation, (
I D =I D >¿ 1−
VP ¿)
V GS 2
(
I D =I D >¿ 1−
VP ¿)
V GS 2
……………………(5.3)
Where, ID>> VP are constant and VGS is control variable. The squared term or the
equation will result in a nonlinear relationship between I D and VGS, producing a
curve that grows exponentially with decreasing magnitudes of V GS. The graphical
approach, however, will require a plot of equation (5.3) to represent the device
and a plot of the network equation relating the same variables. The solution is
defined by the point of intersection of the two curves. It is important to keep in
mind when applying to graphical approach that the device characteristics will be
unaffected by the network in which this device is employed. The network
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equation may change along with the intersection between the two curves, but the
transfer curve define by equation (5.3) is unaffected. In general, therefore:
The transfer characteristics defined by Shockley’s equation are unaffected
by the network in which the device is employed.
The transfer curve can be obtained using Shockley’s equation or from the
output characteristics. In fig. 2.13 two graphs are provided.
Fig. 2.13 Obtaining the Transfer Curve from the Drain Characteristics
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terminal controls the amount of amount of collector current.
current flowing through the device.
3. It input resistance is very high and is Its input resistance is very laods as
the order of pupral mega ohms. compared to FET and is of the order
of frow ki ohms.
4. It has a negative temperature co- It has a positive temperature co-
efficient at high current levels. It efficient at high current level. It
means that current decreases, as means that collector current
the temperature increases. This increases with the increase in
characteristic prevents the FET temperature. This characteristic
from thermal breakdown. leads the BJT to thermal
breakdown.
5. It does not suffer from minority It suffers from minority carrier
carrier storage effects, and storage effects therefore has lower
therefore has higher switching switching speed and cut-off
speeds and cut – off frequencies. frequencies than that of FET.
6. It is less noisy than a BJT or vacuum It is comparatively noisy than a field
tube and is thus more suitable as effect transistor.
an input amplifier for low – level
signals
7. It is much simpler to fabrication as It is comparatively difficult to
an integrated cet (IC) and occupies fabricate as an integrated cet and
a less space on IC chip than that of occupies more spacing on IC chip
BJT. than of FET.
8. It is relatively immune to radiation It is susceptible to radiations. With
and hence makes excellent signal the radiation exposure.
chopper
9. It has a relatively lower gain It has a relatively higher gain
bandwidth product as compared to bandwidth product as compared to
BJT. FET.
10. It has a drawback of being very BJT does not require any special
susceptible to overload voltage, handling installation like FETs.
thus referring special handling
during installation.
29
1. Suitable in integrated circuit chips.
2. Use in the design of linear a.c amplifier system.
3. Design and construction of integrated circuits for digital computer.
4. Analog switching
5. High input impedance amplifier
6. Microwave amplification
7. Constant current source
8. Alarm system with a constant current source
30
Fig. Common Drain / Source Follower FET Circuit Configuration
3. Common Source: This FET configuration is probably the most widely used.
The common source circuit provides a medium input and output impedance
levels. Both current and voltage gain can be described as medium, but the
output is the inverse of the input i.e. 180 0 phase charge. This provides a good
overall performance and as such it is often though of as the most widely used
configuration.
Fig. Common Source FET Circuit Configuration
31
Power gain Low Medium High
Input/output phase 00 00 1800
relationship
Input resistance Low High Medium
Output resistance High Low Medium
32
Fig. 2.20 Zener –Protro ( tect MOSFET)
33
phenomenon of phase inversion is similar to that exhibited by a common emitter
bipolar transistor amplifier.
PHOTO-ELECTRIC DEVICES
3.1 Photodiodes
A photodiode is a semiconductor device that convert light into current.
The current is generated when photons are absorbed in the photodiode. A small
amount of current is also produced when no light is present. Photodiode may
curtain optical fibres, buit-in lenses, and may have large or small area.
Photodiode usually have a slower respond time as its surface area increases.
The common traditional solar cell used to generate electric solar power is a
large area photodiode. photo-detector capable or converting light into current or
voltage depending upon the mode of operation. The common traditional solar
used to generate electric solar power is a major area or copheaton of photodiode.
Principle of Operation or Photodiode
A photodiode is a two terminal PN junction or PN structure device, which
operates in a reverse bias. It has a small transparent window, which allows light to
strike to the PN junction. When a photon of sufficient energy strikes the diode, it
creates an electron, hole pair, this mechanism is also known as the inner photo
electric effect. If the absorption occurs in the junction’s depletion region or one
diffusion length away from it, these carriers are swept from the junction by the
buit-in electric field on the depletion region. Thus holes move toward the anode,
and the electrons towards the cathode, and a photocurrent is produced. Thus the
total current through the photodiode is the sum of the dark current (current that
is been generated in the absence of light) and the photo current, so that dark
current must be minimized to maximize the sensitivity of the devices.
We know that a rectifier diode has a very small reverse – current, when it is
reverse biased. The same is true for a photodiode also. The reverse biased current
is produced by thermally generated electron-hole pair in the depletion layer,
which are swept across the junction by the electric field created by the reverse
voltage. In a rectifier diode, the reverse current increases with the temperature
due to an increase in the number of electron – hole pairs.
A photodiode differs from a rectifier diode in a sense that its reverse
current increases with the light intensity at the PN junction. When there is no
incident light, the reverse current is almost negligible and is called the dark
34
current. An increase in the amount of light energy produces an increase in the
reverse current for a given value or reverse – bias voltage.
3.2 Characteristic of a Photodiode
Fig. 3.2 shows the characteristics curvies for a typical diode.
It may be noted from the characteristic crue that the dark current for this
particular device, is approximately 250mn at a reverse bias voltage are 3v.
Therefore, resistance of the device with an incident light.
3 =
-6
rR = 25 x 10 = 120,000 Ω = 120 k Ω
At 20,000 in Im/m2, the current is approximately 300µΑ at 3v. The resistance
under this condition.
3 =
rR = 300 x 10-6 = 10,000 Ω = 10 k Ω
The calculation shows that the photodiode can be use as a variable
resistance device controlled by light intensity. A photodiode can be used to switch
on the current at a very fast rate (In nanosecond). Thus, it is ont in the fastest
photo – detector.
Photovoltaic Mode
When used in zero bias or photovoltaic mode, the flow of photocurrents
out of the device is restricted and a voltage builds up. This mode exploits the
photovoltaic effect, which is the basis for solar cells; a traditional solar cell is just
a large area photodiode.
Photoconductive Mode
In this mode, the diode is often reverse biased (with the cathode driven
positive with respect to anode). This reduces the response time because the
additional reverse bias increases the width of the depletion layer, which
decreases the junction capacitance. The reverse bias also increases the dark
current without much change in the photocurrent. For a given spectral
distribution, the photocurrent is linearly proportional to the illuminance (and to
the radiance). Although this mode is faster, the photoconductive mode tends to
exhibit more electronic noise. The leakage current of a good pin diode is so low (<
l ^A).
35
Conductive Cell
D: Spacing / distance bit electrodes
S: Area of the electrodes
V: Applied voltage
I: Current sentenced
K: d/s
Cell constant are measuring cell
Conductivity = d/s x I/2 = k x ¼
Since the number of electron-hole pairs far exceeds the number exceeds B-
thermal equilibrium, many of the electrons are pulled across the junction by the
force of the electric field. Those that cross the junction contribute to the current
in the cell and through the external load. The terminal voltage of the cell is
36
directly proportional to the intensity of the incident light. The voltage may be as
high as 0.6v depending on the external load. Usually a large number of cells are
arranged in an array in order to obtain high voltages and currents as shown in fig
3.4 (a) in order to obtained higher
Solar cells act like a battery when connected in series or parallel. Fig. 3.4 (b)
show two groups of 10 series cells connected in parallel with each other. If each
cell provides 0.5v at 150mA, the over-all value of the solar bank is 5v at 150mA.
The two parallel solar banks provide 5v at 300MA. This solar power sources
supplies the load and also charges the Ni-cd battery. The battery provides power
in the absence of light. A blocking diode D is used to isolate the solar cells from
Ni-cd battery otherwise in the absence of light, the battery will discharge through
the cells thereby damaging them.
A solar cell operates with fairly efficiency, has unlimited life, can be easily
mass-produced and has a high power capacity per-weight. It is because of those
qualities that it has becomes an important sources of power for earth satelites.
37
The construction of a typical photoconductive cell and its two alternative
circuit symbols are shown in fig. 3.3
(a) and (b) respectively.
in clear plastic. When there is no incident light on the CB junction, there is a small
thermally – generated collector – to – emitter leakage current I CEO which, in this
case, is called dark current and is in the nA range
When light is incident on the CB junction, a base current Iλ is produced
which is directly proportional to the intensity. Hence, collector current Ic = β Iλ.
Typical collector characteristics curve of a phototransistor are shown in
fig.3.5 (b). Each individual curve corresponds to a certain value of light intensity
exposed in mw/cm2. As seen, IC increases with light intensity.
The phototransistor has applications similar to those of a photodiode. Their
main difference are in the current and response time. The photo-transistor has
38
the advantages of greater sensitivity and current capacity than photodiodes.
However, photodiodes are faster, of the two, switching in less than a nono
second.
Photo – FET
The objective of photo-FET is to develop a photonic miniaturized disposable
platform point of care diagnostics that is capable of performing quantitative
diagnostic tests that are currently limited to a hospital laboratory setting.
40
1. In 7-segment, 16-segment and dot matrix displays, such displays are used to
indicate alphanumeric characters and symbols in various system such as
digital clock, microwave ovens, stereo tuners, calculators, etc.
2. For indicating power on/off conditions, power level indicators on stereo
amplifiers.
3. In optical switching applications.
4. For solid state video displays, which are rapidly replacing cathode ray tubes
(CRT’s).
5. In the field or optical communication, where LED’s are used to transfer (or
coupled) energy from one circuit, to another which transmits energy by
means of total internal reflection.
6. For image sensing circuits in picturephon.
7. In burglar alarm systems. In such application, LED’s radiated lights are
preferred.
8. White LED’s are well established in the market these days, they are ideal for
backlighting of automobile dish boards, back lighting are keypads on cellular
phones, and path marking lights.
9. Widely used for traffic signal management.
LED: Light Emitting Diode: A semiconductor device that emits a narrow spectrum
or light in a forward direction.
LCD: Liquid Crystal Display: A light-driven display device made from nematic
liquid sealed between two piezor of polarized glass.
ii. Liquid Crystals Display (LCD’s) (Principle of Operations)
A liquid crystal display is a flat panel display, electronic visual display or
video display that uses the light modulating properties of liquid crystals. Liquid
crystals do not emit light directly.
A liquid crystal is a material (usually, an organic compound) which flows like
a liquid at room temperature, but whose molecular structures has some
proportions normally associated with solids (examples of such compounds are:
cholestry, nonanoate and p-azoxyanisole). As is well known, the molecules in
ordinary liquids have random orientation, but in a liquid crystal they are oriented
in a definite crystal pattern. Normally, a thin layer of liquid crystal is transparent
to incident light but when an electric field is applied across it, it’s molecular
arrangement is disturbed causing changes in falls on an activated layer of a liquid
crystal, it is either absorbed or else is scattered by the disoriented molecules.
The two types of display available are known as:
i. Field – effect display and
41
ii. Dynamic scattering display
When field-effect display is energized, the energized areas of the LED
absorb the incident light and, hence give localized black display. When dynamic
scattering is energized, the molecules or energized area of the display becomes
turbulent and scatter light in all directions. Consequently, the activated areas take
on frosted glass appearance resulting in a silver display. Of course, the un-
energized areas remain translucent.
Applications of LCD
The liquid crystal display is a matured technology these days, so it is being
used in practically all areas where sunlight does not directly torch on the display.
Following are some of the important applications of LCD’s:
1. Computer monitors
2. Television
3. Instrument panels
4. Aircraft cockpit displays
5. Signage
6. Consumer devices such as video players, gaminj devices, clocks, watches,
calculators and telephones.
42
The most typical application of transistors in digital designs is a DC load
switching transistor which is used to control the power of a load such as a
solenoid, a motor lamp, etc. IC chips are usually not capable to provide enough
power for such loads in terms of both voltage and current. Take for example, a DC
relay, A typical 12v PCB relay requires about 20mA of current for its solenoid. A
typical 5v relay requires about 45mA. Which a micro-controller of a CMOS chip
cannot provide the required power for this relays.
The solution is a transistor driver. The purpose of this transistor driver is to
amplify the CHIPs (Micro-controller for example) current or voltage (or both) and
provide enough power for the load (relay).
For the purpose the boot transition connector is a common emit amplifier
with fixed biased in fig. below.
43
protection from high voltage, transient surge voltage and low level noises that
could possible result in an enormous output or damage to the device. Such
isolators allow interfering of circuits with different voltage levels and different
grounds, etc. The input current of an opto-coupler can be phototransistor, LDR,
photo diode and LASCR.
When the input voltage of LED is forward biased, the LED emits light; this
transmitted light turns on the photo sensitive device (photo transistor, LDR,
photodiode and LASCR) which produces nearly the same voltage at output. Fig.
3.9.
Fig. 3.9
Fig. 3.9 (b) shows a Darlington transistor coupler which is used when
increased output current capability is needed beyond that provided by the photo
transistor output in fig. 3.9 (a). The disadvantage is that the photo Darlington has
a switching speed less than that of the photo transistor.
The LASCR output coupler are fig. 3.9 (c) can be used in applications where
a low-level input voltage is required to latch a high voltage relay for activating
some kind are electromechanical device.
Opto-coupler Application
Opto-coupler are used to isolate signals for protection and safety between
a safe and a potentially hazardous or electrically noisy environment. The
interfacing of the opto-coupler between digital or analogue signals need to be
designed correctly for proper protection.
AMPLIFIERS
The load line is drawn in fig. 4 (a). A is the cut-off point and B is the saturation
point. The voltage equation of the collector – emitter is
VCC - VCE
VCC = ICRc + VCE : IC = Rc Rc
Consider the following two particular cases:
i. When IC = 0, VCE = VCC - Cut-off point A
ii. When VCE = 0, IC = VCC /Rc - Saturation point B
Obviously, load line can be drawn IR only VCC and RL are know. Incidentally,
>6pm of the load line AB = - 1/Rc
Note: The above equation can be written as:
VCC - VCE
IC = Rc Rc
It is a linear equation similar to y = mx + c.
The graph of the equation is a straight line whose slope is
M = -1/RL
Actual Region
All operating points (like C, D, E, etc. in Fig. 58.1) lying between cut-off and
saturation points form the active region of the transistor. In this region, E/B
junction is forward – biased and C/B junction is reverse – biased, conditions
necessary for the proper operation of a transistor.
Example 1:
45
A transistor circuit of a pulse amplifier is shown in fig. what is the value of
the saturation current and cut-off voltage also draw the d.c load line.
Solution:
The values of IC(sat) and VCC (cut-off) gives the upper and lower ends of d – c
load line. B, using these two points, we get a straight line (called d.c load line) and
shown in fig.
This line is steeper than the d.c line but the two intersect at the Q-point
determined by biasing d.c voltage and currents.
AC load line takes into account the a.c load resistance whereas d.c load line
considers only the d.c load resistance.
46
i. DC Load Line
The cut-off point for this line is where VCE = VCC. It is also written as VCE (cut-
off).
IC = VCC/RL. It is also written as IC(sat)
It is represented by straight line A.Q.B in fig. 4.3.
ii. AC Load Line
The cut-off point is given by VCE (cut-off) = VCEQ + ICQ Rac when Rac is the a.c
load resistance.
Saturation point is given by IC(sat) = ICQ + VCEQ/Rac
It is represented by straight line CQD in fig. 4.3.
The shop of the a.c load line is given by y = x 1/Rac.
It is seen from fig.4.3 that maximum possible positive signal swing is 0 = I CQ Rac
Similarly, maximum possible negatives signal swing is V CEQ. In other words,
peak-signal handling capacity is limited to ICQ Rac or VCEQ whichever is smaller.
A.C Load Line
We know that every amplifier experiences two types of loads, namely a d.c
load and an a.c load. Consequently, the amplifier has two types of load lines i.e.
d.c load line and a.c load line. We have already discussed about d.c load line.
Now we shall discuss a.c load line.
47
Fig. 4.4
Consider a common emitter amplifier circuit in fig. 4.4 (a). Its d.c equivalent
circuit is shown in fig. 4.4 (b) . With the help of this circuit, we can determine the
upper and lower ends of the d.c load line. The upper end is given by the relations:
VCC_______
VCE = 0 and IC = R C + RE
It is shown in fig. 4.5 (a) as point A. Similarly, the lower end is given by the
relations,
IC = 0 and VCE = VCC .
It is shown in fig. 4.4 (a) point B. Joining points A and B, by a straight line,
we get the d.c load line.
The d.c equivalent circuit may also be used to determine the Q – Point
values of collector current (ICQ) and collector – to – emitter voltage (V CE). Since the
voltage drop across the resistor R2,
V R 2=V CE
( )
R2
R 1122
Q – point collector current
ICQ = IEQ
The Q – point collector – to – emitter voltage
48
VCEQ = VCC – ICC (RC +RE)
Fig. 4.5 (b) shows the a.c equivalent circuit of the common emitter amplifier in
this figure. The resistance driving the base.
rB = Rs // (R1 // R2)
and a.c load resistance seen by the collector,
rL = Rc // R1
Now summing up the voltages around the collector loop of the a.c
equivalent circuit.
VCE +Ic .rL = 0
V CE
iC=
rL
………………….. (i)
The above equation is an equation of a straight line called a.c load line.
Since when the transistor goes into saturation, the collector – to – emitter voltage
(VCE) becomes zero. In that case, the equation (ii) may be written as:
V CEQ
I C =I CQ + =I C (sat)
rL
The above expression gives the upper end of the a.c load line. Similarly,
when the transfer goes into cut-off, the collector current (I C) becomes zero. In
that case, the operation (ii) maybe written as:
49
V CEQ V CE
0=I CQ + +
rl rl
V CEQ V CE (cut−off )
0=I CQ + +
rl rl
The above equation gives us the lower end of a.c load line. By joining the
upper and lower ends, we get a combine a.c line as shown in fig. 4.6 (a). The locus
of a.c load line given all the possible a.c operating points. At any instant, during
a.c cycle, the operating point of the transistor is somewhere, along the a.c load
line. The exact location may be determined by the amount of change fr om the Q
– point.
Fig. 4.6 (a) shows the a.c load line superimposed on the d.c load line. It may be
noted that the slope of a.c load line (equal to 1/ r l ) is greater than that of d.c load
line. Both the load lines intersect at Q – point.
50
Fig. 4.9
A transistor amplifier circuit can be easily analyzed with the help of a load
line. It is known as load line analysis. Since in a transistor circuit both d.c and a.c
conditions exist, therefore, load line are of two types, nearly d.c load line and a.c
load line.
D.C Load Line
A line drawn on the output characteristics of a transistor circuit which gives
the values of IC and VCE corresponding to zero signal condition (i.e., d.c conditions)
is known as d.c load line.
Consider a transfer amplifier circuit shown in fig. 5.9 in the absence of input
signal, the d.c conditions exist in the circuit. The d.c equivalent circuit of the
amplifier is shown in fig. 5.10 applying kirchoffs voltage law to the output circuit,
we got.
VCC = ICRC + VCE + IERC
OR
VCE = VCC - IC (RE + RC)
Where VCE and (RC + RE) are constant. Thus, equation (1) represents a first
degree equation and can be represented by a straight line on line output
characteristics. This is known as d.c. load line. To plot this line, two ends points
can be locked as
51
Fig. 5.10
When IC = 0, then, VCE will be maximum i.e.
(VCE) ma2 = VCE
This locates the point A (V A = VCC) or d.c load line. Now, I C will be
maximum, when VCE = 0, i.e.
V CC
( I C ) max= ………… (2)
( RC + R E )
.
V CC
OB=
This locates the second point B ( ( RC + R E ) ) of the d.c load line. By
.
joining the points A and, we got d.c load line as shown in fig. 5.11.
By the constructing of d.c load line on the output characteristics, we can
obtain complete information about the output circuit of a transistor amplifier in
zero signal conditions.
In fact, all the points showing zero signals I C and VCE values lie on the d.c
load line. At the same time I C and VCE conditions in the cut are also represented by
the output characteristics. Therefore, the central operating conditions in the
circuit will be represented by the point where d.c load line intersects the output
characteristics for the fixed current curved. For example, if I B = 10µA is set by the
biasing circuit, then point Q (intersection of 10 µA curve and load line) is the
operating point.
52
Fig.4.11
Fig. 4.12
53
(a). Circuit for clan A amplifier (b). Maximum output for class A amplifier
It may be noted from this figure that ideally the collector current can vary
from its Q-point value (i.e. I CQ) to its saturation value (i.e. I C(sat) = 2ICQ and down
to its cut-off value (i.e. zero). The maximum of peak value of the collector current
is ICQ and that of the collector – to – emitter voltage is V CEQ. It is the largest signal
possible from a class –A amplifier. If the signal is too large, the amplifier is driven
further. In that case, the amplifier will clip at cut-off and saturation.
Now we shall obtain the expression for amplifier parameters such as
voltage gain, current gain and power gain for class –A amplifier.
Bre’ represents the a.c resistance of the emitter – base junction as seen by
the input signal. It is known as input resistance, working directly into the base, Ri
or Rin (base).
Fig. 4.13 a.c equivalent circuit of a common emitter amplifier Voltage gain.
The voltage gain for class –A power amplifier is obtain as, The input resistance
directly looking into the base is given by
Ri = β. re1
54
When β is common emitter d.c current gain (or hFE) of a transistor.
The total input resistance as seen by the source (i.e. the resistance of the
amplifier stage),
Ris = (R1 // R2) // (β. re1 )
The effective a.c load as seen by the amplifier, at the output, is a parallel
combination of RC and RL. Thus, a.c load, rL = RC // RL
and input voltage, Vin = ib . β. re1
output voltage u0 = iC . rL = β. i6 . r2
V C β.i r
b. L L r
and voltage gain, AC = V + i β . r + r
¿ b. e' e
'
1
where re = A.C emitter diode resistance. It will be interesting to know that the
formula for a.c emitter diode resistance,
25
re =
1
IE
Current gain: The current gain are a transistor in the ratio of a.c collector current
ic
(ic) to the a.c base current (ib). Mathematically, the current gain, Ai= i =β
6
Power gain: Since the a.c input power of the base at transistor,
P1n = V1n . ib
and the a.c output power from the collector,
Po = Vo . ic
The negative sign in the above electron indicates that the phase of input signal is
reversed at the output.
o P o c −V .i
o c −V i
Therefore, Power gain: A P= P = V . i = V x i
¿ ¿ b ¿ b
¿−A y . A i=−
( )
rL
re
xβ
55
Example: The various elements of a transistor amplifier as shown in fig. 4.9 are,
RC = 10kn, RL = 30kn and VCE = 20v. The values of biasing resistors R 1 and R2 are
such that they fix the operating point at 10v, 1MA.
Draw d.c and a.c load lines assumes RE to be negligible. Comment on this result.
Solution: D.C load line.
To draw load line, we require two end points viz, maximum collector
emitter voltage e VCE and maximum collector current IC.
Applying kirchoff voltage law to the collector emitter loop of fig.4.9
VCC = VCE + IC (RC + RE) (Where IE – IC)
Maximum collector emitter voltage,
VCE = VCC = 20v, when IC = 0 .
This locates the point A on the VCE onus: Maximum collector current,
V CE 20 v
I C= + =2 mA , w h en V CE =0
R C + RE 10 kΩ
This locates points B on the IC axis. By joining point A and B, we get d.c load line
fig. 4.17
A.C load line
To draw a.c load line, require two end points, viz, maximum collector
emitter voltage and maximum collector current when signal is applied.
56
RC R L
R AC =R C /¿ R L =
R C + RL
10 x 30
¿ =7.5 k Ω
10+30
Maximum collector – emitter voltage = VCE + ICRAL
= 10v + 1mA x 7.5 kΩ = 17.5v (i.e. Operating point VCE = 10v
This locates point C on the VCE axis, and IC = 1MA is given)
Maximum collector current
V CE 10 v
¿ IC x ¿ 1mA + =1+1.33
R AC 7.5 k Ω❑
= 2.33mA.
This locates point D on the I C axis. By joining points C and D, we get a.c load line
(fig. 4.10).
Comments: We see that the point of intersection of d.c and a.c load lines to the
operating point Q.
Here is how to determine the ends of the a.c load line. Writing a collector voltage
loop gives us:
−V Ce
V Ce +i C r e =0∨i C = ……….(1)
rL
The a.c collector current is given by:
iC = ∆IC = IC – ICQ
and the a.c collector voltage is:
VCE = ∆VCE = VCE - VCEQ
When substituting this expression into eg.1 and rearranging, we arrive at:
V CEQ V CE
I C =I CQ + − … … … … ..(2)This is the equation of the a.c load line. When the
rC rC
transistor goes into saturation, VCE is zero, and eq (2) gives us:
V
CEQ
iC(sat) ¿ I CQ + r
C
57
Where iC(sat) = ac saturation current
ICQ = dc collector current
VCEQ = dc collector – emitter - voltage
rC = ac resistor seen by the collector
When the transistor goes into cut-off, IC equals zero. Since
VCE (cut-off) = VCEQ + ∆VCE and
∆VCE = ∆IC rC
We can substitute to get ∆VCE = (ICQ - OA) (rC)
resulting in VCe (cut-off) = VCEQ + ICQrC ………….(3)
Because the a.c load line has a higher slope than the d.c load line, the maximum
peak-to-peak (MPP) output is always less than the supply voltage. As a formula:
Mpp < VCC
For instance, if the supply voltage is 10v, the maximum pack –to – pack sinusoidal
output is less than 10v.
Example 1:
Fine the large signal voltage gain and power gain of the amplifier shown in
fig. 4.20. Assume that the value of r e1 has been found to be 8Ω from the graphical
data.
Solution:
Given: re1 = 8Ω; RC = 220Ω ; RC = 47KΩ
R1 = 24.7k Ω; R2 = 470kΩ and β = 50
We know that a.c load resistor,
rL = RC // RL = RC = 220Ω
58
Voltage gain,
r L 220
A y= = =27.5 .
re 8
We also that current gain,
Ai = β = 50
Therefore: Power gain
Ap = Av . Ai = 27.5 x 50 = 1375
59
1. Inherent variations of transistor parameters. We know that the collector for
a common – emitter transistor amplifier is given by the relation.
IC = β IB + (1 + β). ICO …………………..(i)
Where β = Common – emitter current gain,
IB = Base current and
ICO = Reverse saturation current
It will be interesting to know that if β = 100 / then the values of s = 1 + 100 = 101.
It means that the collector current changes 101 times the change in reverse
saturation current. Thus, in a common – emitter current, the collector current is
highly dependent upon the reverse saturation current and hence upon the
temperature. Thus, there is a strong need to provide bias stabilization in common
emitter circuits to improve the stabilization factor.
4.5 Transistor Thermal Run Away
We have already discussed that the reverse saturation current (I CO) changes
with temperature. Moreover, the reverse saturation current approximately
doubles for every 100C rise in temperature. This fact may cause consideration
practical difficulty in using a transistor as an amplifier. It is because of the fact,
that if the temperature of the collector – base junction increases, the reverse
current of the transistor increases. And the collector current also increases. The
increase in collector current produces an increase in the power dissipation of the
collector – base junction. This in turn, further increases the temperature of the
collector – base junction causing the collector current to further increase. This
process may become cumulative and it is possible that the ratings of the
transistor are exceeded. If it happens, the device gets burn out. This process is
described as the thermal runaway of the transistor. In actual practices, a thermal
runaway is avoided by using a stabilization circuiting of a heat sink with the
transistor.
The above equation contains three variables namely, β 2, IB and ICO. All the
three variables are found to be strongly dependent upon temperature. As the
temperature increase, all the three variables also increase. It results in the
increase of collector current. This causes the operating point to shift towards the
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saturation point, resulting in clipping and bad distortion of the output. In some
cases, a transistor may even burn out because of the excessive collector current.
Consider common base (CB) PNP transistor circuit as shown in fig. 4.21
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Fig. Leakage current in a common – bass transistor
When the switch is closed, the forward – bias voltage (V CE) injects the holes
in the region. The reverse – bias voltage (V CC) on the collector – base junction
attracts the majority of holes, from the base region, and constitute collector
current. A small number of holes combine with the electrons in the base region
and constitute base currents. It means that the total emitter current splits up into
two components namely the base current (IB) and the collector current (IC).
When switch ‘S’ is opened, it disconnects the emitter from the base and
hence the emitter – base junction is open circuited. Thus, there is no emitter
current and base current (IB) or collector current (IC).
However, it may be noted that the collector base junction of the transistor
is reverse – biased due to the holes injected from the emitter. But this junction is
forward biased due to the thermally generated minority carries (i.e. electrons in
the P-type collector region and holes in the N-type base region). The minority
carries diffuse across the collector – base junction and have produce a certain
value of current known as lockage current. This current is called the leakage
current from collector to base with emitter open and is designated by I CBO. It is
also known as the reverse saturation current or collector cut-off saturation (I CO).
Thus, ICBO is similar to the reverse saturation current in a PN junction. The
direction of ICBO or ICO is the same as that of a injected current. It is evident from
above that the total collector current in a transistor consist of the following
comments:
i. The current produced by normal transistor action.
This comment of a current is called injected current. Its having a value equal
to α. IE and is due to majority carriers.
ii. The reverse saturation current (I CO) produced by the thermally generated
carriers or minority carriers.
Hence the total collector current,
IC = α.IE + ICO
Now differentiating this equation with respect to ICO,
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∆ IC
=0+1
∆ I CO
The value of stability factor indicates that the common base circuits are
highly stable. Thus, there is no need of biasing stabilization in the circuits.
2. Stability Factor of C.E Circuit
Consider a common – emitter (CE) PNP transistor circuit as shown in fig. 4.22
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4.6 The Performance of the Transistor Amplifier using the following Loads
Tuned Amplifier
A turned parallel LC circuit that resonates at a particular frequency f o, is
shown in fig. 4.23. This section deals with the tuned amplifier which amplifies the
signals within a narrow frequency band centered about a frequency f o. The tuned
amplifier is designed to reject all frequencies below a lower cut-off frequency, F L
and above a upper cut-off frequency, F H. The tuned amplifier is extensively used in
communication equipment, especially in broadcast receiver.
Fig. 4.24 (b) indicates that the response of tuned amplifier is maximum at
resonant frequency, there is a significant decrease in response curve.
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At resonance, the tuned circuit can be used as a resistive load for amplifiers
because the reactance part becomes zero, i.e. the inductive and capacitive effects
cancel out. Hence the circuit acts as a pure resistance one with both V and I in
phase.
For frequencies above fO, the circuit acts as a capacitive one and hence the
current loads the applied voltage. At frequencies below f O, it acts as an inductive
one, in which current lags behind the applied voltage.
The gain of a transistor amplifier is directly proportional to the value of its
load impedance. A parallel tuned circuit has high impedance at its frequency of
resonance and the impedance falls out sharply as the frequency depends from
the frequency of resonance. Hence, the gain versus frequency curve of the tuned
amplifier is almost similar to the impedance versus frequency curve of the turned
amplifier. Tuned amplifiers are, therefore, used for amplification of a narrow band
of frequency.
Tuned amplifiers may be classified as (i), small signal tuned amplifiers and
(ii) large signal tuned amplifiers.
Small signals tuned amplifiers are used for amplifying small signals at radio
frequencies. As the power involved is small, they are operated under class A
condition so that distortion is negligibly small. Large signal tuned amplifiers are
meant for amplifying large signals of radio frequencies. As the power involved is
large, they are operated under class AB, B or C conditions providing large collector
circuit efficiency. Through this distortion gets increased, the tuned circuit itself
eliminates most of the harmonic distortion.
Heavy resistive loading tends to reduce bandwidth and peaking in most
amplifiers, although, in a poor design; this loading may cause a sag in the
midband gain.
Inductive loading is usually not a problem for amplifiers for two reasons.
First, inductive reactance increases with frequency and leaves the amplifier,
effectively unloaded at high frequencies, as if the inductive load didn’t exist at all.
Second, phase shifts cause by inductive loads does not reduce an amplifiers phase
margin.
Capacitive loading, however, the base of all high frequency amplifiers.
Capacitance loading prevents any amplifier from producing the ideal flat
frequency response and increases the ringing response to square waves. A
sufficient amount of capacitive loading can tune the amplifier to oscillate. Most
op-amp.
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Q - FACTOR
In practice the inductor possesses a small resistance in addition to its
inductance. The lower the value of this resistance, the better the Q – factor of the
inductor.
The Q – factor as quality factor of an inductor at operating frequency (w) is
wL ❑ X L
defined as the ratio of impedance of the coil to it resistance Q= =
R R❑
Q – factor of a capacitor
Capacitor also possesses a small resistor in series with it. The Q – factor of a
capacitor of the operating frequency (w) is :
1
Q=
WCR❑
The quality factor determines the З dB bandwidth
(BW) for the resonant circuit, which is given by:
❑ fr
BW =
Q
Hence Q and bandwidth are inversely proportional. Hence for higher values of Q,
the bandwidth is reduced and the circuit will have good selectivity and the
selectivity is best for lower values of Q. This is depicted in fig. 13.6.
Fig. 4.15 Graph shows the relation between quality factor and bandwidth
From the graph it is evident that high ‘Q’ is applied in tuned amplifiers to
get better selectivity.
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The quality factor Q of a tuned amplifier is equal to the ratio of resonant
frequency (fr) to bandwidth (BW) i.e.
❑ fr
Q =
BW
Fig. 4.16
i. When input frequency equals for (i.e. fin = fr). When the frequency of the
input signal is equal to fr, the parallel L C circuit offers a very high impedance
1.0, it acts as an open. Since R L represents the only polls to ground in the
collector circuit, all the a.c collector current flows through R L. Therefore,
voltage across RL is maximum i.e. the voltage gain is maximum as shown in fig.
15.11 (ii).
ii. When input frequency is less than fr (i.e. fin < fr). When the input signal
frequency is less than fr, the circuit is effectively inductive. As the frequency
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decreases from fr, a point is reached when X C – XL = RL. When this happens,
the voltage gain of the amplifier falls by 3db. In other words, the lower cut-off
frequency f1 for the circuit occurs when XC – XL = RL.
iii. When input frequency is greater than fr (i.e. fin > fr). When the input signal
frequency is greater than fr, the circuit is effectively capacitance. As fin is
increased beyond fr, a point is reached when XL – XC = RL.
When this happens, the voltage gain of the amplifier will again fall by 3db. In
other words, the upper cut-off frequency for the circuit will occur when X L – XC
= RL
AMPLIFIER AND COUPLING METHODS
5.1 Classification of Power Amplifier
The classification of power amplitude is based on transistor biasing
condition and amplifier of the input signal. It also takes into account the portion
of the cycle for which the transistor conducts.
1. Class – A Amplifiers: It is an amplitude in which the transistor bias and
amplifier of the input signal is such that the output current flows for the
complete cycle (i.e. 3600) of the input signal. Fig. 5.1 (a) shows output for a
class –A amplifier.
Class –B Amplifier
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Class –B amplifiers use transistors that are biased just at their cut-off point.
The transistors are turned off unless there is a signal to amplify. If we were to
have a class –B amplifier with a single transistor, it would only amplify one side of
the input signal, loading to considerable distortion. By combining two transistors,
we can make class –B amplifiers that have relatively low distortion. Each
transistor amplifies one side of the signal. This is called a push-pull configuration.
Class –B amplifiers have good efficiency (much better – than class –A) of
about 50% over a wide power range, have moderate distortion and can be up
used in linear applications such as audio amplifiers. It have virtually no quiescent
current, so they stays cool in the absence of input signal.
Class –C Amplifier
Class –C amplifiers are biased very far in the cut-off region, so they will only
amplify a signal large enough to get the transistors out of cut-off. They are very
non-linear and are only used in certain applications, such as RF amplification.
They separate a lot of distortion, so they must be followed by good filters to
remove the unwanted harmonizes and other distortion products. The reason why
someone would want to use class –C amplifiers is that they are very efficient, up
to 70%.
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5.3 Mode of Operation of Common Emitter and
Fig. 5.5 shows a basic circuit of CE amplifier. Here V BB supply forward biases
the emitter base junction and V CC supply reverse – biases the emitter base
junction. This biased the transistor to operate in the active region V S is a
sinusoidal a.c input signal source. It has a source resistance R S. The magnitude of
signal source voltage is such that it always forward – biased the emitter – base
junction regardless of the polarity of the signal.
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collector, which increase the collector current. The increased collector current
produces greater voltage drop across the resistance RC.
However, during the negative half – cycle, the forward – bias across the
emitter base junction is decreased. Due to this, the collector – current decreases.
The decreased collector current produces smaller voltage drop across resistance
RC.
It is evident from the above discussion that a small a.c signal at the input
produces a large a.c signal at the output of load resistance. Thus, the transistor
acts as an amplifier, the ration of output voltage to input voltage is called voltage
gain of amplifier.
The Common Sources JEET Amplifier
So far we have looked at the bipolar type transistor amplifier, especially the
common emitter amplifier, but small signal amplifier can also be made using Field
Effect Transistor or FET’s for short. These devices have the advantages over
bipolar transistor of having extremely high input impedance along with a low
noise output making them ideal for use in amplifier that have very small input
signals.
The design of an amplifier circuit based around JFET (N – channel FET or
even a MOSFET is exactly the same principle as that for the bipolar transistor
circuit used for a class –A amplifier circuit.
Firstly, a suitable quiescent point or “Q – point” need to be found for the
correct biasing of the JFET amplifier circuit.
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Unlike a bipolar transistor circuit the junction FET takes virtually no input
gate current allowing the gate to be treated as an open circuit. Then no input
characteristics curve is required. We can compare the JFET to the bipolar junction
transistor (BJT) in the following table.
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Vg or ground level. This voltage drop across R S due to the drain current provides
the necessary reverse biasing condition across the gate resistor, R 2 effectively
generating negative feedback.
So in order to keep the gate source junction reverse biased, this source
voltage VS need to be higher than the gate voltage, V g. This source voltage is
therefore given as:
VS = ID x RS = VG - VGS.
Then the drain current, Id is also equal to the source current, is as “No current”
enters the gate terminal and this can be given as:
I D=
VS
RS
=
( V DD
RD+ RS )
The actual position of the Q–point on the D C load line is generally
positioned at the mid centre point of the load line (for class –A operation) and is
determined by the main value of Vg which is biased negatively as the JFET is a
depletion - mode device like the bipolar common emitter amplifier the output of
the common source JFET amplifier is 1800 out or phase with the input signal.
One of the main disadvantages of using depletion – mode JFET is they need
to be negatively biased. Should this bias fail by any reason the gate – source
voltage may raise and become positive causing an increase in drain current
resulting in failure of the drain voltage Vd.
This problem is overcome by using enhancement – mode MOSFET device
instead.
5.4 The Performance of a Two – Stage Common – Emitter and Common –
Source Amplifier
THE CASCADE
The cascade is a two – stage amplifier composed of a single
transconductive amplifier (usually a common source/emitter stage) followed by a
current follower (usually a common gate / base stage) compared to a single
amplifier stage this combination may have one or – more of the following
advantages, higher output impedance, higher input – output isolation, higher
input impedance, higher output impedance, higher gain or higher bandwidth. In
modern circuits, the cascade is often constructed from two transistors (BJT S or
FETS), with one operating as a common emitter/source and the other as a
common base / gate. The cascade improves input – output isolation (or reverse
transmission) as there is less direct coupling from the output to input. This greatly
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reduces the miller multiplication of stray coupling capacitance between input and
output and thus contributes to a much higher bandwidth.
Fig. 5.7 Shows the basic form of the cascade amplifier with a common
emitter/source application as input stage, Q 1 or M1, driven by signal source Vin.
This input stage then drives a common base/gate amplifier. Q 2 or M2 as the output
stage, with an input signal at Vout.
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If the cascode device stage were operated alone using its emitter or source
as input mode (i.e. common base / gate configuration).
5.5 Types of Inter-stage Coupling used in Amplifier
Different coupling schemes used in amplifier.
As a of matter of fact, all amplifiers, need some kind of coupling network. Even a
single stage amplifier, needs coupling to the input source and output load. The
multistage amplifiers need coupling between those individual stages. This type of
coupling is called interstage coupling. It serves the or two purposes:
1. It transfers a.c output of one stage to the input of the next stage.
2. It relates the d.c conditions of one stage to the next. It is necessary to
prevent the shifting of Q – point.
The coupling network (or coupling device) must ensure that both the above
purpose are fulfilled, when an a.c signal is to be amplified. Following are some
coupling schemes used in amplifiers.
i. Resistance – Capacitance (RC) Coupling: It is the most important method of
coupling the signal from one stage to the next and is shown in fig. 26.4 (a). In
this method, the signal developed across the collector resistor of each stage
is coupled through capacitor into the base of the next stage. The cascose
stages amplify the signal and the overall gain is equal to the product of
individual stage gain. The amplifier using this coupling scheme, are called R –
C coupled amplifiers.
ii. Direct – Coupling: This coupling is shown in fig. 26.4 (d) in this method, the
a.c output signal is fed directly to the next stage. This type is used where low
frequency signals are to be amplified. The coupling devices such as
capacitors, inductors and transformer cannot be used at low frequency
because their size becomes very large. The amplifiers using this coupling
scheme are called direct coupled amplifier of d.c amplifiers.
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But it has a large current gain and large power gain.
Transformer Coupling
This coupling is shown in fig (c) above. In this method, primary winding of the
transformer acts as a collector load and the secondary winding convey the a.c
output signal directly to the base of the input stage. It may be noted that there is
no need of coupling capacitor in the transformer coupling. The amplifiers, using
this coupling scheme are called transformer – coupled amplifiers. (c)
Transformer Coupling
77
a.c ground. That is why this circuit is also known as grounded collector amplifier.
In this circuit, the input is applied between the base and collector terminals and
the output is taken across the emitter and collector terminals. The capacitors C 1
and C2 block the direct current, but pass the a.c signal current in the circuit.
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4. Its voltage gain is less than unity.
5. Its power gain is much smaller than that of common emitter and common
base amplifiers.
6. Its output signal is in phase with the input signal.
Disadvantages
1. It cannot amplify high frequency signal.
2. It has poor temperature stability.
The main application of common collector amplifier is for resistance
matching. It is used to transfer from a high output resistance circuit to that of a
low input resistance circuit. The common collector amplifier can also be used as a
two – way amplifier, because it can pass a signal in either direction.
79
Advantages of push pull amplified is low distortion, absence of magnetic
saturation in the coupling transformer core, and cancellation of power supply
ripples which results in the absence of hum while the disadvantages are the need
of two identical transistors. The requirement of bulky and costly coupling
transformer.
Class –A Push Pull Amplifier
A push pull amplifier can be made in class –A, class –B, class –AB or class –C
configurations. The circuit diagram of a typical class A push pull amplifier is shown
above. Q1 and Q2 are two identical transistors and their emitter terminals are
connected together.
R1 and R2 are meant for biasing the transistors. Collector terminals of the
two transistors are connected to the respective ends of the primary of the output
transformer T2. Power supply is connected between the centre tap of the T 2
primary and the emitter junction of the Q 1 and Q2. Base terminal of each
transistor is connected to the respective ends of the secondary of the input
coupling transformer T1. Input signal is applied to the primary of T 1 and output
load R2 is connected across the secondary of T 2. Quiescent current of Q2 and Q1
flows in opposite directions through the corresponding halves of the primary of T 2
and as a result there will be no magnetic saturation.
From the figure you can see the phase splited signals being applied to the
base of each transistor. When Q1 is driven positive using the first half of its input
signal, this collector current of Q 1 increases. At the same time Q 2 is driven
negative using the first half of its input signal and so the collector current of Q 2
decreases. From the figure you can understand that the collector currents of Q 1
and Q2 i.e. I1 and I2 flows in the same direction through the corresponding halves
of the T2 primary. As a result an amplifier version of the original input signal is
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induced in the T2 secondary. It is clear that the current through the T 2 secondary is
the difference between the two collector currents.
Harmonics will be much less in the output due to cancellation and this is
results in low distortion.
The class –B push pull amplifier is almost similar to the class A push pull amplifier
and the only difference is that there is no biasing resistor for a class –B push pull
amplifier. This means that the two transistors are biased at the cut-off point.
The class –B configuration can provide better power out-put and has higher
efficiency (up to 8.5%). Since the transistor are biased at the cut-off point, they
consumed no power during idle condition and this adds to the efficiency. The
advantages of class –B push pull amplifiers are ability to work in limited power
supply conditions (due to the higher efficiency), absence of even harmonics in the
output, similar circuiting when compared to the class –A configuration, etc.
The disadvantages are higher percentage of harmonic distortion when
compared to the efficient class –A; cancellation of power supply ripples is not as
efficient as in class –A push pull amplifier and which result in the need of a well
regulated power supply. The circuit diagram of a class –B push pull amplifier is
shown in the diagram below.
The circuit arrangement of the class –B push pull amplifier is similar to the
class –A push pull amplifier except for the absence of the biasing resistors. T 1 is
the input coupling capacitor and the input signal is applied to its primary. Q 1 and
Q2 are two identical transistors and their emitter terminals are connected
together. Center top of the input coupling transformer and the negative end of
the voltage source is connected to the junction point of the emitter terminals
positive end of the voltage source is connected to the centre top of the output
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coupling transformer. Collector terminals of each transistor are connected to the
respective ends of the primary of the output coupling transformer T 2 and R2 is
connected across the secondary of T2.
The input signal connected into two similar but phase opposite signals by
the input transformer T1. One out of these two signal is applied to the base of the
upper transistor while the other one is applied to the base of the other
transformer. You can understand this from the circuit diagram. When transistor
Q1 is driven to the positive side using the positive half of its input signal, the
reverse happen in the transistor Q2. That means when the collector current of Q 1
is going in the increasing direction, the collector of Q 2 goes in the decreasing
direction. Have a look at the figure for better understanding. This current flow
through the T2 primary results in a wave form induced across its secondary. The
wave form induced across the secondary is similar to the original input signal but
amplified in terms of magnitude.
Advantages of Class B push pull Amplifier
1. The circuit efficiency of a class-B push pull amplifier is 78.5% which is more
higher than that of class A whose value is 25%
2. The use of push pull system in the class-B amplifier eliminates even other
harmonics in the a.c output
3. Because of the absence of even harmonics, the circuit gives more output
per device for a given amount of distortion.
Class –AB Push Pull Amplifier
Class -AB is another type of push pull amplifier which is almost similar to
that of a class –A push pull amplifier and the only different is that the value of
biasing resistors R1 C2 R2 are so selected that this transistors are biased just at the
cult in voltage (0.7v). This reduces the time for which both transistors are
simultaneously off / the time for which input signal is between (-0.7v and +0.7v)
and so the cross over distortion gate reduced. Of the above said classes class –A
has load distortion, then class –AB and then class –B.
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Anyway class –AB configuration has reduced efficiency and waste a
reasonable amount of power during (78.5%), then class –B (between 78.5 to 50%)
and then class –A (50%).
below 10HZ) signals including direct current of zero frequency. It may be noted
that the capacitors, inductors and transformers cannot be used as a coupling
network at very low frequencies because electrical size of these devices at low
frequencies, becomes very large.
Two stage direct coupled amplifier
The fig. above shows a two-stage direct coupled transistor amplifier. It may be
noted that the output of the first stage is directly connected to the base of the
next transistor. Moreover, there are no input or output coupling capacitors. The
operation of this circuit is discussed below:
The signal to be amplified is applied directly to the input of the first stage.
Due to the transistor action, it appears in the amplified form across the collector
resistor or transistor Q1. This voltage then drives the base of the second transistor
Q2 and the amplified output is obtained across the collector resistor of transistor
Q2.
Frequency Response of Direct Coupled Amplifier.
Fig. 26.20 shows the frequency the frequency response (i.e. a graph of dB voltage
gain versus frequency) of a direct coupled amplifier. It is evident from this figure;
the gain is uniform up to a certain frequency denoted by f 2.
Frequency response of direct coupled amplifier
Beyond this frequency, the gain rolls off slowly. The gain rolls off at high
frequencies due to the increased emitter discharge capacitance and stray wiring
capacitance.
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5.9 How Drift Problem can be Solve in D.C Amplifier
In the design and operation of D.C amplifiers particular attention is paid to
reducing the slow charges (drift) of the output voltage or current that occur in the
absence of an input signal. Such charges are caused by a number of
uncontrollable factors, such as aging are amplifier components, fluctuations of
the power supply.
The figure above is characterizes by the absence of practice element such
as capacitors or transformers in the coupling circuits.
In DC amplifiers with frequency conversion fig.
The drift problem solved by a conversion (modulation) are the slowly
charging input signal by means of auxiliary oscillations, that is, by a conversion of
the input signal into a signal whose frequency is that of the auxiliary oscillations
and whose amplitude is proportional to the amplitude of the input.
Subsequently, the converted signal is amplified by a drift free amplifier with
reactive coupling elements between stages. The signal is then rectified
(demodulated) and this again converted to a signal of the same shape as the input
signal.
DC operational amplifiers have a gain as high as 10 6 and a passband from 0
to 100 megahertz. Over prolonged time periods and for a broad temperature
range (-600 to +1000) their drift does not exceed a few tons of micro-volts.
84
Most of the electronic devices and circuits require a d.c source for their
operation. Any cells and batteries are one form of d.c source. They have the
advantage of being portable and ripple – free. However, their voltages are low,
they need frequent replacement and are expensive as compared to conventional
d.c power supplies. Since the most convenient and economical source of power in
the domestic a.c supply, it is advantageous to convert this alternating voltage
(usually, 220v rms) to d.c voltage (usually smaller in value). The process are
converting a.c voltage into d.c voltage is called rectification and is accomplished
with the help of”
i. Rectifier
ii. Filter
iii. Voltage regulator current.
These elements put together constitute d.c power supply.
1. Transformer: Its job is either to step up or (mostly) step down the a.c supply
voltage to suit the requirement of the solid – state electronic devices and
circuits fed by the d.c power supply. It also provides isolation from the supply
line – an important safety consideration.
2. Rectifier: It is a circuit which employs one or more diodes to convert a.c
voltage into pulsating d.c voltage.
3. Filter: The function of this circuit element is to remove the fluctuation, on
pulsations (called ripples) present in the output voltage supplies by the
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rectifier. Of course, no filter can, in practice, give an output voltages as ripple
– free as that of a d.c battery but it approaches it so closely that the power
supply performs as well.
4. Voltage Regulator: Its main function is to keep the terminal voltage of the
d.c supply constant even when:
i. a.c input voltage to the transformer varies (deviations from 220v are
common) or
ii. The load varies.
Usually, zener diodes and transistors are used for voltage regulation
purposes. Again, it is impossible to get 100% constant voltage, but minor
variations are acceptable for most of the jobs.
5. Voltage Divider: It’s function is to provide different d.c – voltages needed by
different electronic circuits. It consists of a number of resistors connected in
series across the output transistors of E voltage regulator. Obviously, it
eliminates the necessity of providing separate d.c power supplies to different
electronic circuits working on different d.c levels.
Rectifiers
6.1 Single – Phase Half – Wave Rectifier
Fig. 6.2 (b) shows a half – wave rectifier circuit. It consists of a single diode
in series with a load resistor. The input of the half – wave rectifier is supplied from
the 50Hz a.c supply, whose wave form is shown in fig. 6.2 (a). The working of a
half – wave rectifier current may be studied by considering separately the positive
and negative half cycles of the a.c input voltage.
During the positive half cycle of the a.c. Input voltage, the diode is forward
biased and conducts for all instantaneous voltage greater than the offset voltage
(0.7v for silicon and 0.3v for germanium diodes). However, for all practical
purposes, we assume that the diode is forward biased, whenever the a.c input
voltage goes above zero. While conducting the diode acts as a short – circuit, so
that the circuit current flows and produces a voltage across the load resistor (R L).
The voltage produced across the load resistor has the same shape as that of the
positive input half cycles of a.c input voltage as shown in fig. 6.2 (c).
The waveform of diode current (which is equal to the load current is also
shown in fig, 6.2 (c).
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Fig. 1. Half – Wave Rectifier.
During the negative half – cycle, the diodes reverse biased and hence it
does not conduct. Thus, there is no current flow of voltage drop across load
resistor (RL) i.e. Id = 0 and Vb = 0. The net result is that only the positive half –
cycle as the a.c input voltage appears across R L. It means that only the positive
half – cycle of the a.c input voltage is utilized for delivering a.c. But it is a pulsating
d.c wave having a ripple frequency equal to the input voltage frequency.
It is evident from the above discussion, that as the circuit uses one – half
cycle of the a.c input voltage, therefore it is popularly known as a half – wave
rectifier.
Average Values of Output Voltage and Load Currents in Half – Wave Rectifier
Consider a half – wave rectifier circuit with a sinusoidal a.c input voltage.
We know that instantaneous value of the sinusoidal a.c input voltage is given by
the relation.
V = VMsinwt = VM since (i.e. Ɵ = wt)
Where, VM = Maximum value of the a.c input voltage.
It may be noted that in case of a transformer coupling, the equation of a.c
input voltage would remain the same as given above. However, the maximum
value of a.c input voltage (VM) will represent the maximum voltage across the
secondary winding of the transformer.
Now let, IM = Maximum value of diode current or load current. It is the current
through the resistor RL.
Vdc = Average or d.c value of output (on load) voltage
across the load resistor, and
Idc = Average or d.c value of load current.
Fig. 19.3. Average values of o/p voltage and load current in a half – wave rectifier.
87
Fig. 19.3 (a) shows low waveform of an output voltage of a half – wave rectifier. It
indicates that there is an output voltage (varying sinusoidal) for a period from 0 to
π and nothing for a period from π to 2π. The average of d.c value of the o/p
voltage is given by the relation:
π
∫v .dƟ 1
π
¿❑
= ∫ V M .sin Ɵ d Ɵ
2π 2π 0
VM V
¿ |(−c 0 Ɵ)| π = M ( +1−(−1) )
2π 0 2π
VM
¿ =0.318 V M
π
The above expression indicates that the average or d.c value of the output voltage
is 31.8 percent of the maximum a.c output voltage. This value is indicated by a
broken horizontal line in fig. 19.3. Let us now find the average of d.c value of load
current. It may be found by dividing the d.c value of output voltage (V dc) by the
value of load resistor? (RL). Mathematically, the average or d..c value of load
current.
I dc =
V dc V M I M
= = … … … … . i. e . I M =
RL π RL π
VM
RL ( )
The above expression indicates that the average or d.c value of load current
31.8% of the maximum load current. This value is indicated by a broken horizontal
line fig. 6.2 (b?).
Notes 1: In driving the average values of output voltage and load current, we have
assumed that the diode used in the rectifier circuit, is an ideal one i.e. It has zero
forward resistance. However, in actual practices, it is not so. If R f is the diode
forward resistance, then the average output voltage across the load,
VM
V dc = −I dc .Rf
π
VM
I dc =
π (R L + R L )
88
VM
V dc = −I dc (R f + R S )
π
and the average value of load current,
VM
I dc =
π (R f + R S + R L )
Fig. 6.3 Full – wave rectifier, with input and output voltage waveforms.
There are two types of full – wave rectifiers, namely center -tapped and
bridge rectifier.
Center – Tapped Full – Wave Rectifier
Fig. 6.4 shows the circuit of a center - tapped full – wave rectifier. The
circuit uses two diodes, which are connected to the center – tapped secondary
winding of the transformer. The input signal is applied to the primary winding of
the transformer.
89
Fig. 6a. center – tapped wave rectifier.
The center - tap on the secondary winding of a transformer is usually taken
as the ground or zero voltage reference point. It may be noted that the voltage
between the center – tap and either end of the secondary winding is half of the
secondary voltage i.e.
V2
V 2=
2
The operation of a center – tapped full – wave rectifier circuit may be studied as
follows:
During the positive input half – cycle, the polarities of the secondary
voltage are as shown in 6.4. This forward biases the diode D 1 and reverse biases
the diode D2. As a result of this, the diode D1 conducts some current whereas the
diode, D2 is off. The current through load RL is as indicated in the figure.
During the negative input half – cycle, the polarities of the secondary
voltage are as shown in figure 6.6. This reverse – biases the diode D 1 and forward
– biases the diode, D2. As a result of this, the diode D 1 is off and the diode D2
conducts some current. The current through the load R L is as indicated in the
figure.
90
It may be noted that the current through the load flows in the same
direction, during both the positive and negative portions of the input cycle.
Therefore, the output voltage developed across load R L is full – wave rectified d.c
voltage as shown in fig. 19.9 (b).
Full – Wave Bridge Rectifier
It uses four diodes connected across the main supply as shown in fig. 19.14
(a). The operation of the circuit may be studied as follows.
91
Fig. 6.8 Bridge rectifier with transformer.
Average Values of Output Voltage and Load Current in a Bridge Rectifier
The average values of output and load current are the same as for a center
– tapped full wave rectifier.
Lets: VM = Maximum value of the voltage across each half of the secondary
winding.
IM = Maximum value of the load current.
Vdc = Average or d.c value of the output voltage across the load resistor,
and
Idc = Average or d.c value of the current through the load resistor (R L).
We know that the equation for the voltage across each of the secondary winding.
We also know that the average or d.c value of the output voltage.
curve
Area under the half −cycle
a
V dc =
Base
π π
∫ V M . d Ɵ ∫ V M sin Ɵ d Ɵ π
¿ 0
π
=0
π
∫ V M .>¿ Ɵ d Ɵ
0
π
1
V dc = ∫ V . sin Ɵ d Ɵ
π 0 M
VM V
V dc = |(−c 0 Ɵ)| π = M ( +1−(−1) )
π 0 2π
2µm
V dc = =0.636 V M
π
92
This evident from the above relation that the average value of a full – wave
rectifier is 0.636 VM and is shown in fig. 19.11 (a). It may be noted that this value is
twice that of a half – wave rectifier.
We know that the average and d.c value are load current,
V dc 2 µ m❑ 2 I M
I dc = = = =0.636 I M
R2 π RL π
It is evident from the above relation that average value of load current is 0.6 I M
and is as shown in fig. 19.11 (b). It may be noted that this value is twice that of a
half – wave rectifier.
VM
Note: V dc =
π
−I dc (R f + R S )
Where Vr(rms) = The r.m.s value of the a.c component of the output voltage.
Vdc = The average of d.c value of the output voltage.
Ir(rms) = The r.m.s value of the a.c component or current, and
Idc = The average or d.c value of the load current.
93
We know that r.m.s value of the rectified load current,
I rms =√ I dc + I r ( rms )
2 2
or γ=
√( )
I rms 2❑
I dc ❑
−1
Now we shall use the above relation to find out the ripple factor for half –
wave and full – wave rectifier circuits.
Ripple Factor of a Half – Wave Rectifier
Since the average value of load current in a half – wave rectifiers,
DM
I dc = ………………….. (i).
π
Where IM is the maximum value of load current. The r.m.s value of the load
current for a half – wave rectifier may be found by using calculus and the wave,
IM
I rms = ………………….. (i).
2
Substituting these values of Idc and Irms in the expression for ripple
γ=
√( )
I rms 2❑
I dc ❑
−1=
√( )
I m /2 2❑
I m /π ❑
−1=1.21.
94
Im
I dc = ………………….. (i).
2
Substituting these values of the Idc and Irms in the expression for ripple factor.
Since iL = IM sinƟ
γ=
√( )
I rms 2❑
I dc ❑
−1=
√( I m /√ 2
2 I m /π )
−1=0.482 .
√ √ ( )
2π π 2π
1 1
I rms = ∫
2π 0
2
i L . d Ɵ=¿
2π
Im
2
∫ I m sin Ɵ d Ɵ+∫ (0 . d Ɵ) ¿
s
0 π
√
I m2 π 1−cos 2 Ɵ
(
I m2 Ɵ−sin 2Ɵ π ¿ I m
) √ ( )
¿
¿
2π 0
∫ 2
dƟ
4π 2 0 2
❑
Since iL = Im . sinƟ
√ √
2π
1 1 2
I rms = ∫
2π 0
2
i L . d Ɵ= I sin2 Ɵ . d Ɵ
π m
√
I m2 π 1−cos 2 Ɵ I m2
√
2
( )
sin 2Ɵ π ¿ I m π I m
( )
¿
¿
2π 0
∫ 2
dƟ
2π
Ɵ−
2 0 π 2 √2
x =
❑
It is evident from the above result that the ripple factor of a full – wave rectifier is
0.482 and is much smaller than that of a half – wave rectifier. Because of this
reason, full – wave rectifier is used more commonly in actual practice.
Fig. 7.1
A circuit that converts a pulsating output from a rectifier into a very steady
d.c level is known as filter because it filters out or smoothens out the pulsations in
the output.
95
7.2 Inductor Filter
It is also called choke filter. It consists of an inductor (L), which is suitably
inserted between the rectifier and the load resistance (R L) as shown in fig. 19.25.
The rectifier output contains a.c components as well as d.c components. When
the output passes through an inductor, it offers a high resistance to the a.c
components and no resistance to d.c components. Therefore, a.c component of
the rectified output is blocked and only d.c component reaches at the load.
Theoretically, the output of inductor filter should consist of only d.c voltage. But
in actual practice, it contains a small a.c components as well.
The ripple factor of an inductor filter (for 50H Z supply) is given by the expression:
R L R L
γ ¿ 3 2 w . L = 1330 L … … … … … … ..(i)
√
Where RL is in ohms and L in henrys. It is evident from equation (i) that the ripple
will decrease as the value of the RL is decreased and L is increased.
The inductor filter is more effective only for heavy load currents i.e when
the load resistance (RL) is small. The a.c component, present at the output of a
filter, can be reduced if we use an inductor of a large value. But it may be noted
that an inductor of a large value will also have a higher d.c resistance, which will
result in a lower d.c output voltage.
Capacitor Filter
We have already discussed in the load article that an inductor filter is
suitable for only heavy loads (i.e. load with smaller values of resistance). An
inexpensive filter for light loads (i.e. a load with larger value of resistance) is
available in the form of a capacitor filter. The operation of a capacitor filter
depends upon the property of a capacitor to oppose any charge in voltage, when
it is connected across a pulsating d.c voltage. The action of a capacitor filter is to
be smoothed out (or filter out) the voltage ripple or ripples on pulsations.
96
Fig. 7.3 shows a half – wave rectifier with a capacitor filter. The operation of
this circuit may be explained in terms of the waveforms as shown in fig. 19.30 (a)
(b) and (c) respectively. Fig. 7.3 (a) shows the waveform of the a.c. Input voltage
(indicated by the broken curve) and the half – wave rectifier output. Fig. 7.3 (b)
shows the waveform of a voltage across a capacitor and fig. 19.31 (c) shows the
waveform of output voltage. These waveforms may be better understood from
the following discussion.
97
negative half – cycle, the diode is reverse biased and the capacitor tries to
discharge through the load resistance. The process continued for the other cycles
and we set an output voltages as shown in fig. 7.4 (c).
Fig. 7.
It may be noted from fig. 7.4 (c) that due to charging and discharging of a
capacitor, there is a ripple (i.e. a.c component] present in the output voltage of a
capacitor filter. As a matter of fact, smaller the value of this ripples, better will be
the filtering action. The ripple factor of a capacitor filter (for 50H Z supply) as
shown by the relation:
1 2850
γ= =
4 √3 . f . c . R L c . R L
Where c is in dif and RL in ohms.
7.3 Shunt Capacitor Filter
In this circuit, a suitable single capacitor C is connected across the rectifier
and in parallel with the load R L to achieve filtering action. This type of filter is as
capacitor input filter.
This filter circuit depends for its operation on the property of a capacitor to
charge up (i.e. start energy) during conducting half – cycle and to discharge (i.e.
deliver energy) during the non-conducting half – cycle. In simple words, a
capacitor – opposes any charge in voltage. When connected across a pulsating d.c
voltage, it tends to smoothen out or filter out the voltage pulsations (or ripples).
The filtering action of the simple capacitor filter when used in a half – wave
rectifier can be understood with the help of fig. 55.18.
98
Fig.
(a) Circuit Analysis
When positive half – cycle of the a.c input is applied, the diodes is forward
– biased and hence is turned ON. This allows C to quickly charge up to peak value
of input voltage Vip [point in fig. 7.5 (b)] because charging time constant is almost
zero. It is so because there is no resistance in the charging path except diode
forward resistance which is negligible.
Hence, capacitor follows the charging voltage as shown. Artor being fully
charged, the capacitor hold, the charge till input a.c supply to the rectifier goes
negative. During the negative half – cycle, the capacitor attempts to discharge.
However, it cannot discharge through the R L from point b to c in fig. 7.5 (c) and its
voltage decreases somewhat. The discharge time constant (= CR L) is usually 100
times more than the charging time.
Hence, C does not have sufficient time to discharge appreciably. It is seen
that even during negative half – cycle of the input supply, the capacitor maintains
a sufficiently large voltage across RL.
99
During the next positive half – cycle, when rectifier voltage exceeds the
capacitor voltage represented by point c in fig. 7.5 (c), C is again charged quickly
to vip as represented by point d. Once more, input voltage goes negatively,
opening the diode and forcing C to discharge through the R L during the interval
de. In this way, RL sees a nearly constant d.c voltage across it at all times.
The filtering action at this simple capacitor filter on a full – wave rectifier is
shown in fig. 55.19. It is seen that as compared ti a half – wave rectifier.
Fig. 7.8
i. d.c load voltage increases slightly toward Vip.
ii. ripple voltage has been reduced by half.
The decreasing ripple is because of starter discharge time before the capacitor is
reenergized by another pulse or current.
(b) Load Current
The load current has the same wave – shape as V L because load purely
resistive. It is shown in fig. 7.8 (d). During periods a’b’ and c’d’, etc. Current is
supplied by the diode and during periods b’c’ and d’c’, etc by the capacitor.
(c) Diode Current
100
Diode current flows during short intervals of times like ab and cd, etc. In fig.
55.18 (c) which is reproduced in fig. 7.9. During those intervals diode output
voltage is greater than the capacitor voltage which is abc the load voltage. Hence,
diode current is s surging current i.e. it takes the form of shorter direction pulse
as shown in fig. 55.20.
Fig. 7.9
A small resistor is always connected in series with the diode to limit this
surge current. It is known as surge limiting resistor.
The sole function of the diode is to recharge C and the sole function of C is
to supply load current by discharge.
Effort of Increasing Filter Capacitance
A capacitor has the basic property of opposing charges in voltage. Hence, a
bigger capacitor would tend to reduce the ripple magnitude. It has been found
that increasing the capacitor size.
1. Increases Vdc towards the limiting value Vip.
2. Reduces the magnitude of ripple voltage.
3. Reduces the flow of current pulse through the diode.
4. Increases the peak current in the diode.
Series Inductor Filter
The filter consists of a choke in series with the load resistor R L as shown fig.
7.10 The operation of such filter depends on the fundamental property of an
inductor to oppose any sudden charges in the current flowing through it. Since
this inductor presents high impedance to the a.c components in the filter output,
it reduces their amplitude with respect to the d.c components thereby producing
only a small ripple as shown in fig. 55.24 (b).
The fourier series B- the rectifier output voltage is
Vi=Vip ¿
For finding the ripple factor, we will calculate the d.c as well as a.c drop
over RL, if we neglect cloke resistance (RL), then the entire d.c components of filter
output us available across RL and its value is
101
2 vip
V dc =
π
Fig. 7.10
If RL is taken into account, then filter output d.c voltage drops partly on R L
and partly on RL. The drop over RL would be
2 vip RL
¿ .
π R L+ R L
V ac 4 vip RL π
γ= = =
V dc √ 2.3 π √R L
2
+ XL
2 3 vip
√2 RL √2
¿ =
3 √ (RL + X )
√
2 2
3 (1+ X ¿ ¿ L¿¿ 2+ R L ) 1 /2 ¿ ¿
2
L
❑
Since ½ = 210L, hence
γ= √2
3(1+ 4 w + L / R L ) 1 /2
22 2
❑
If 4w2 L2 / RL2 >> 1, then
√2 R L RL
γ= =
3 x 2 wL √2 .3 wL
102
It is seen that the ripple decreasing as R L decreases as load current increases (just
the opposite of what happens in the case of shunt capacitor filter).
Circuit Analysis
During the positive half – cycle of the input voltage, D 1 conducts (not D2)
and charges C1 to ppak value of secondary voltage (V M) with the polarity as shown
in fig. 7.11 (a). During the negative half – cycle, D 2 conducts (not D1) and charges
C2. The voltage across C2 is the sum of pack supply voltage and the voltage across
C1 (fig. 7.11). It can be proved by applying ICVL to the outer loop. Starting from
the bottom of the transformer secondary in fig. 7.12 and going clockwise, we get
–VM - VM + VC2 = 0 or
VC2 = 2VM = 2 & peak input voltage
During the output position half – cycle, D 2 is open and C2 will discharge
through the load if it is connected. If no load is connected i.e. C 1 to VM and C2 to
2VM. If there is a load connected across C 2, it will discharge a little bit and, as a
103
result of it, voltage across it will drop slightly. But it will get recharged in the next
half – cycle.
The output waveform shown in fig. 7.11 (16) is that half – wave rectifier
filtered by a shunt capacitor peak lnus – voltage P iv across each diode is 2V M.
Ripple frequency is equal to 100 supply frequency.
This circuit has very poor regulation and its ripple content is also high. This
circuit has a common connection between the line and load (which a full – wave
doubler does not have).
Full – Wave Voltage Doubler
This circuit is shown in fig. 55.33 (a). During the position half – cycle of the
input voltage, D1 conducts (but not D2) and charging capacitor C1 to the peak
voltage VM with the polarity as shown.
During the negative half – cycle, D 2 conduct, (but not D1) changing C2 to VM.
As far as the load is concerned, voltage across C 1 and C2 are in series – aiding. If
there is no load connected across the output, then load voltage V L = 2VM as shown
in fig. 7.12 (a). For example, if 220v, 50 – Hz is the supply, then Vdc = 2x√2 = 620v.
Of course, if a laod is connected across the output terminals, then V L would be
less than VM.
The waveform of the output voltage is shown in fig. 55.33 (b).
104
The P.V rating of each diode is 2V M. Ripple frequency is twice the supply
frequency. As seen, there is no common connection between the supply line and
the load.
It is worth nothing that where the expense of a line transformer is justified,
it is preferable to use the superior conventional full – wave.
Voltage Triple and Quadrupler Circuits
(a) General
The half – wave voltage doubler circuit (Fig. 7.13) cab be extended 4V M,
5VM, etc. Theoretically speaking, here is no upper limit to the amount of voltage
multiplication that can be obtained. Though voltage tripplers and quadruplers are
commonly used, practically considerations limit additional multiplications. The
main handicap is that total amount of capacitance becomes unduly large to
maintain the desired d.c output voltage for any thing except extremely light loads.
(b) Circuit
The circuit for different multipliers is shown in fig. 7.14. It should be
obvious from the repetitive pattern of the circuit connections how additional
diodes and capacitors may be connected to the doubler circuit for obtaining
higher multiplications of the peak output voltage VM.
(c) Analysis
During the first positive half – cycle, C 1 changes to VM as diode D1 conducts.
During negative half – cycle charged through D 2 to 2VM i.e. to the sum of voltages
C1 and peak input voltage VM.
During the second positive half – cycle, D3 conduct and voltage across C2
charges C3 to dawn voltage 2VM. During the negative half – cycle, diodes D 2 and D4
conduct allowing C3 to charge C4 to the same peak voltage 2VM.
If is seen from fig. 7.14 that voltage across C 2 is 2VM across C1 and C3 is 3VM
and across C4 is 4VM.
105
If additional diodes and capacitors are used, peak capacitor would be
charged to a peak voltage of 2VM.
The PIV rating of each diode is 2VM and ripple frequency is twice the line
frequency. Generally, those circuited are used when both the supply voltage and
load are maintained constant.
7.5 Three - Phase Half – Wave Rectifier
Rectification of a three – phase supply with the help of diodes is shown in
fig. 19.21 (a) along with a smoothing circuit. The three diodes are connected to
the three phases of star – connected secondary of a three – phase transformer.
Neutral point N of the secondary in the negative terminal for the rectified output
and is earthed as shown.
The shape of the output is shown in fig. 19.21 (b). The horizontal line AB
represents the potential as the negative d.c terminal output and the since waves
1, 2, and 3 each represent the anode potential are the three above.
During one – third of the cycles i.e. during time t 1, only diode D1, will
conduct. It will cease conducting at t 2 and then D2 conduct current up to t 2 after
which D2 will take over and will supply anode current till t 3. When one diode
conducts, the other two remains inactive because then their anodes are more
than their cathodes. This process repeats itself during each ensuring cycle; with
the conducting period of each diode begin as indicated. The output 10 given by
the vertical distance ‘ab’ between the upper – envelope and the line AB.
Obviously, the output fluctuations between the maximum values three in each
cycle. The variations are output lie between V SM and 0.5VSM (negotiating voltage
drop in diodes) and has a mean value of Vdc = 0.83 VSM or 1.17 where VS is the r.m.s
value of the secondary phase voltage. Its maximum conversion h = 96.5% and g =
0.17. But it should be noted that the magnitude of those fluctuations or
pulsations is lesser than for a singler phase, full – wave rectified output since the
current never touches zero. It is further smoothened up by a C-L-C filter circuit as
shown in fig. 15.28.
106
It is seen that direct current of each diode appears in the secondary phase
winding and do causes transformer saturation resulting in large primary current.
It can be avoided by using zig-zag secondary.
Full – Wave Rectification of Three – Phase Currents
As shown in the figure below, a three – phase full – wave rectifier requires a
transformer with six secondary winding connected to give two separate three –
phase supplies 1800 out of phase with each other. The centre taps are connected
by an inter-phase transformer which enables the two rectifier units to operate
independently of each other. Obviously, each diode conducts for one-third cycle.
However, the addition of two outputs cancels the lowest frequency component of
the nipple.
The output voltage has a mean value of 0.83 V SM (less the diode voltage
drop) and a ripple having a fundamental frequency six times this supply
frequency.
Three – Phase Full – Wave Rectifier Circuit is Preferred for High Power
because:
i. Each secondary carriers current for one-third of a cycle.
ii. Each primary carriers current for or two-third of a cycle.
iii. Copper loss in the transformer winding is comparatively lower.
Operating or switching overvoltages linked to a network’s equipment
compare to overvoltages of a lower level (3 to 5 times the nominal voltage) but
occur much more frequently, thus causing premature ageing of the equipment.
Causes for Overvoltage
Overvoltage can occur due to a lighting electromagnetic pulse (Leme)
switching electromagnetic pulse (SEMP) or electromagnetic discharges (ESD). It
only takes a solit second. That is why they are also referred to as transient voltage
or transients. They have very brief rise times of a flow microseconds before they
drop off relatively slowly over a time frame or up to squarel 100 microseconds.
107
Protection from Lighting Current and Overvoltage Events
Implement a comprehensive protection concept, consisting of line
protection, personal and firee protection as well as lighting current and
overvoltage protection requires a completely harmonized raise of protection
devices. The uniform lighting current and surge protection. It provides ranges
from lighting arresters and surge arresters to special protective devices for
sensitive electronics.
Design and Fuction of Overvoltage Protection Devices
To prevent overvoltages from destroying sensitive electric plants, the
conductors where such high voltage occurs must be short – circuited in a flash
with the equipotential bonding conductor. Various devices are available to handle
this job. These devices are used individually in surge protection devices or in
complex protection circuit to move simultaneous use of the different advantages.
Spark gaps, gas – filled surge arresters, varistors and suppressor diodes are
used depending on the scenario. This equipment basically differs in the following:
Discharge capacity
Resonance behaviour
Quench behaviour
Voltage limitation
Surge Protection Devices (SPD)
Overvoltage protection devices consisting mainly are varistors, suppressor
chode and/or speak gaps. SPDs are used to protect other electrical equipment
and electrical plants from imporminly high overvoltage and to ensure euipotential
bonding.
Overcurrent Protection
Overcurrent protection is practical application of magnitude relays since it
picks up when the magnitude are current exceeds some value (setting value).
Overcurrent relays can be used to protect practically any power sextrem
elements, i.e. transmission lines, transformers, generators or motors.
7.6 Voltage Regulation
The various power supply circuits considered previously the drawback that
their d.c output voltage charges with changes in load or input voltage. Such d.c
power supply is called unregulated power supply.
Consider a combination of full – wave rectifier and a filter circuit connected
to an a.c input voltage source. When the a.c input voltage, at the rectifier input,
charges above or below its normal value, it will cause a charge in d.c voltage
108
produced at the filter output. A similar charge in d.c voltage may also occur, when
the load resistance connected at the filter output charges above or below its
normal value. It means that d.c output voltage fluctuated (or charges) whenever
the a.c input voltage of the load resistance varies above or below the normal
values.
109
conductor of an overload low voltage line loads to considerable damage of the
installation. The overvoltage can be over 20 times the nominal voltage.
As an example, a radical transmission line can be used. For a fault within
the zone of protection, the fault current is smallest at the end of the line and
greatest at the relay end. If the minimum fault current possible within the zone of
protection is greater than the maximum possible load current, it would be
possible to define the operating principles as follows:
/I/ > IP fault zone, trip
(I ) < IP no fault in zone, do not trip.
Where I is the current in the relay and IP is the pickup solting of the relay. IP should
be in selected as:
Imin fault > IP > Imax .Load.
110
forward bias of the transistor is reduced, which reduces its level of conduction.
This increases the collector – to – emitter voltage of the transistor.
This in turn will slightly decrease the input current to compensate for the
increase in the value of load resistance, so that load voltage may remain at a
constant value.
The circuit action may be summarized in the form of the following
equation:
V L ↑→ V BE ↓ →V CE ↑ → V Z ↓
The output of a transistor series regulator is approximately equal to Zener
voltage (VZ). This regulator can also be used for LaserJet.
112