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This document outlines a homework assignment focused on SPICE simulation of Physical Unclonable Functions, detailing the modeling of PMOS and NMOS transistors, the construction of an inverter subcircuit, and the execution of DC sweep simulations. It includes specific questions regarding BSIM4 parameters, model declarations, inverter characterization, and extra credit topics related to transistor parameters. The assignment emphasizes the importance of adjusting transistor dimensions to achieve balanced rise and fall times in the inverter output.
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0% found this document useful (0 votes)
6 views5 pages

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This document outlines a homework assignment focused on SPICE simulation of Physical Unclonable Functions, detailing the modeling of PMOS and NMOS transistors, the construction of an inverter subcircuit, and the execution of DC sweep simulations. It includes specific questions regarding BSIM4 parameters, model declarations, inverter characterization, and extra credit topics related to transistor parameters. The assignment emphasizes the importance of adjusting transistor dimensions to achieve balanced rise and fall times in the inverter output.
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© © All Rights Reserved
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Homework 1

Preparations for SPICE Simulation of Physical Unclonable


Functions
Introduction
We will examine semiconductor device modeling and circuit simulation with SPICE in this
homework. From the BSIM4 manual, we begin by defining the crucial parameters for PMOS and
NMOS transistors. Then, we build an inverter subcircuit, declare spice model declarations for
these transistors, and run DC sweep simulations. By modifying the PMOS width parameter, we
will achieve a balanced rise and fall times. We'll also inspect different parameters including AS
AD, PS, and PD and modify the subcircuit to work with different transistor sizes and oxide layer
thicknesses in the future.

Question # 1 BSIM4 Parameters


Consult the BSIM4 manual and find the name of the parameters for a PMOS and NMOS
transistor’s length, width, and oxide layer parameters.
Answer
For PMOS transistors:
 The length of the transistor is called "L."
 The width of the transistor is called "W."
 Some important parameters related to the oxide layer (the material covering the
transistor) include "Tox" for its thickness and "Tsi" for its quality.
For NMOS transistors:
 The length of the transistor is also called "L."
 The width of the transistor is also called "W."
 Like PMOS transistors, there are parameters like "Tox" for the oxide layer's thickness and
"Tsi" for its quality.
These parameters help describe the physical characteristics of the transistors and the quality of
the material covering them. The names might vary slightly depending on the specific tools or
software used for transistor modeling. It's best to refer to the BSIM4 manual or your simulation
tool's documentation for precise details.

Question # 2 PMOS and NMOS Model Declarations


Create two model declarations, one for a PMOS transistor and one for an NMOS transistor to be
used with ngspice. From the ngspice manual, these models can be found on level 54. We will

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use version 4.8.2 of these models in our simulation. Model declarations contain the thickness of
the oxide layer. For the PMOS, we will need a 1.95 nm oxide layer thickness. For the NMOS, we
will need a thickness of 1.85 nm on the oxide layer.
.model tp pmos level=54 version=4.8.2 <oxide layer thickness parameter>

.model tn nmos level=54 version=4.8.2 <oxide layer thickness parameter>

Answer

Question # 3 Inverter Subcircuit


Construct an inverter subcircuit and save it in a file called inverter.cir using the models
that were previously defined. Use a transistor length of 65 nm and a width of 130 nm
for both the PMOS and NMOS. Use the following snippet as a guide to build the
inverter.
*inverter

.subckt inverter in out

M1 out in vdd vdd tp <LENGTH PARAMETER> <WIDTH PARAMETER>

+ AS=75.3f AD=75.3f PS=1.23u PD=1.23u

M2 out in vss vss tn <LENGTH PARAMETER> <WIDTH PARAMETER>

+ AS=75.3f AD=75.3f PS=1.12u PD=1.23u

* BSIM4 4.8.2 models


* put here your .model statements from the previous question
.ends inverter

Answer
.subckt inverter in out
M1 out in vdd vdd tp L=65n W=130n
+ AS=75.3f AD=75.3f PS=1.23u PD=1.23u
M2 out in vss vss tn L=65n W=130n
+ AS=75.3f AD=75.3f PS=1.12u PD=1.23u
.model tp pmos level=54 version=4.8.2 tox=1.95n
.model tn nmos level=54 version=4.8.2 tox=1.85n
.ends inverter

Simulating the Inverter


Use the ensuing fixture to run a simulation of the inverter. We are performing a DC sweep
on the input pin of the inverter. Use the following snippet to drive your simulation.
* run_inverter

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.include inverter.cir

* supply
.global vdd vss

V0 vdd vss dc 1.2v V1


vss 0 0

* inverter instance
x1 in out inverter
* voltage on the input
Vin in 0 0
* DC sweep on Vin
.dc Vin 0v 1.2v 0.01v

.control

* simulation control block


run
* plot input and output
plot in out
.endc

.end

Answer
Screenshot of the simulation is shown below.

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Question # 4 Inverter Characterization
As seen in the plot, the output of the inverter is skewed towards the Vss side. If we
fabricate the inverter this way, it will result in uneven rise and fall times in the output: it
will take longer for the output to switch from a low to a high than to switch from a high
to a low. We wish to make these times about the same. The solution for this was alluded
to in the class notes: resizing the transistors changes their drive strength. We need to
make the PMOS have a higher drive strength. To do this, we must make it wider. We
wish to keep the NMOS’s width at 130 nm.
Experiment with the width parameter of the PMOS instance in the inverter so that the
rise time and fall time are both approximately the same. What should the width of the
PMOS be? Show the plot of the DC sweep for the characterized inverter.
Hint: When this occurs, both the input and the output ‘meet’ at the center in the DC
sweep.
Answer
At W = 230nm, we meet the required credentials.

Question # 5 Extra Credit

The models for the NMOS and PMOS above also have the parameters AS, AD, PS, PD.

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What do these parameters represent?
Answer
AS (Source Area) and AD (Drain Area)
 AS: Represents the effective source area of the transistor.
 AD: Represents the effective drain area of the transistor.
These parameters are used to account for non-uniform current distributions, particularly
in cases where the source and drain regions are not symmetrically designed.
PS (Source Perimeter) and PD (Drain Perimeter)
 PS: Represents the perimeter of the source region.
 PD: Represents the perimeter of the drain region.
These parameters are used to model the perimeter-related parasitic effects in the
transistor. These parameters are important in accurately modeling the behavior of
transistors, especially in high-frequency or small-scale applications where parasitic effects
can significantly impact performance.
Question # 6 Extra Credit
We will be working with several instances of the inverter to make a series of ring
oscillators. We will be changing the length and width of the transistors as well as the
thickness of the oxide layer. For our convenience, it would be nice to provide these as
parameters to the subcircuit. How do we change the subcircuit declaration to provide
these measures as parameters? Write your new subcircuit below.
Answer
* Define an inverter subcircuit with parameters

.subckt inverter Vin Vout L=100n W=10u Tox=2n

M1 Vout Vin 0 0 PMOS L=L W=W

M2 Vout Vin 0 0 NMOS L=L W=W

C1 Vout 0 10f ; Load capacitor for output node

.model PMOS PMOS (LEVEL=54 <LENGTH PARAMETER> <WIDTH PARAMETER> <oxide layer thickness parameter>)

.model NMOS NMOS (LEVEL=54 <LENGTH PARAMETER> <WIDTH PARAMETER> <oxide layer thickness parameter>)

.ends

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