Device Management

Device Drivers

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 I/O Software

Layers of the I/O system and the main functions of each layer

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 I/O Software Layer: Principle
• Interrupts are facts of life, but should be hidden away, so
that as little of the OS as possible knows about them.
• The best way to hide interrupts is to have the driver
starting an IO operation block until IO has completed and
the interrupt occurs.
• When interrupt happens, the interrupt handler handles the
interrupt.
• Once the handling of interrupt is done, the interrupt
handler unblocks the device driver that started it.
• This model works if drivers are structures as kernel
processes with their own states, stacks and program
counters.
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•
Device Drivers
Device-specific code to control an IO device, is usually written
by device's manufacturer
• A device driver is usually part of the OS kernel
– Compiled with the OS
– Dynamically loaded into the OS during execution
• Each device driver handles
– one device type (e.g., mouse)
– one class of closely related devices (e.g., SCSI disk driver to handle multiple
disks of different sizes and different speeds.).
• Categories:
– Block devices
– Character devices

*SCSI – small computer systems interface

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 Functions in Device Drivers
• Accept abstract read and write requests from the device-
independent layer above;
• Initialize the device;
• Manage power requirements and log events
• Check input parameters if they are valid
• Translate valid input from abstract to concrete terms
– e.g., convert linear block number into the head, track, sector and
cylinder number for disk access
• Check the device if it is in use (i.e., check the status bit)
• Control the device by issuing a sequence of commands.
The driver determines what commands will be issued.

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 Device Driver Protocol
– After driver knows which commands to issue, it
starts to write them into controller's device registers
– After writing each command, it checks to see if the
controller accepted the command and is prepared to
accept the next one.
– After commands have been issued, either (a) the
device waits until the controller does some work
and it blocks itself until interrupt comes to unblock
it; or (b) the device doesn't wait because the
command finished without any delay.

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 Device Driver Discussion
• Protocol – simple model, estimation of reality
• Code is much more complicated, e.g.,
– I/O device completes while a driver is running, interrupting the driver; causing driver to
run before the first call has finished
– Consider network driver: which network driver is processing incoming packet, a new
packet arrives; hence the driver code must be reentrant, i.e., running driver must expect
that it will be called a second time before the first call has completed.
• Code needs to handle pluggable devices
– If driver is busy reading from some device, and the user removed suddenly the device
from the system, driver must
• Abort the current I/O transfer without damaging any kernel data structures
• Remove gracefully from the system any pending requests for the now-vanished device, and
give their callers the bad news
• Handle unexpected addition of new devices which may cause the kernel to juggle resources
• Drivers are not allowed to make system calls, but they may call kernel procedures
– Example:
• Allocate and de-allocate hardwired pages of memory for use of buffers
• Manage MMU, timers, DMA controller, interrupt controller, etc.

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 Why device drivers should be
updated?
• http://www.paretologic.com/resources/news
letter/drivers.aspx
• http://www.computerhope.com/issues/ch00
0546.htm
 For more information:
http://en.wikipedia.org/wiki/Device_driver
 Input/Output
The computer’s response time is no
match for ours.
 The O.S. and the I/O hardware
• Management of I/O devices is a main task for the
operating system.
– Handle message passing to and from the system
– Handle interrupts and errors
– Offer a simple interface
– Offer device independence (to some degree)
• Viewpoints.
– Users
– Programmers
– Technicians
 I/O Devices
• Man readable
– Printers, graphical terminals, screen, keyboard,
mouse, pointing devices,…
• Machine readable
– Disks, tapes, sensors, controllers, actuators
• Communication
– Modems
Connections between a CPU and
an I/O device
• Types of bus
– Address bus
– Data bus
– Control bus
Types of bus
 Data transfer

• Synchronous data transfer

– It usually occur when peripherals are located within the
same computers as the CPU.
– It shares a common clock.
– Data does not have to travel very far physically.
• Asynchronous data transfer
– It is used when synchronous transfers are not viable.
– It uses control signals and their associated hardware to
coordinate the movement of data.
– A common clock is not needed.
 Asynchronous data transfer

• Types of asynchronous data transfer

– Source-initiated data transfer
– Destination-initiated data transfer
– Handshaking
– Destination-initiated data transfer with
handshaking
 Source-initiated data transfer

• The source outputs its data, then strobes a

control signal for a set amount of time.
• The destination device reads in the data
during this time.
Destination-initiated data transfer

• The destination device initiates data transfer

• The destination device transmits a data
strobe signal to the source device and after
a set delay, the destination device reads in
this data and desserts the data strobe.
 Source-initiated data transfer
with handshaking
• It is useful when the time of data transfer
between the destination device and the
source device.
• It uses an additional control signal, data
acknowledge signal.
Destination-initiated data transfer
with handshaking
• It is useful when the time of data transfer
between the destination device and the
source device.
• It uses an additional control signal, data-
ready signal.
 Organisation
• The I/O function can be approached in three
ways:
• Programmed I/O: continuous attention of the
processor is required
• Interrupt driven I/O: processor launches I/O and can
continue until interrupted
• Direct memory access: the dma module governs the
exchange of data between the I/O unit and the main
memory
 Programmed I/O

• Programmed I/O
– A program instruction causes CPU to input or
output data.
• Input port
– It makes data available to the CPU when the
CPU would read the data from the data bus.
 Programmed I/O

Memory
Databus
CPU

I/O I/O
Programmed I/O (Polling)
j
& Int A?

Service
routine A
&
Address Int C?
j
Decoder & Service
routine C

Int Z?
j
Service
routine Z
 Interrupts

• Interrupt
– A mechanism for alleviating the delay for I/O.
• Polling
– The CPU sends a request to an I/O device.
– The I/O device processes the request and sets a device-
ready signal when it is ready.
– The CPU reads in this signal via another I/O address
and checks the value.
– If the signal is set, it performs the data transfer. If not, it
loops back.
 Interrupts(continued)

• Polling is relatively straightforward in

design and programming. But a slow device
causes the CPU to remain in the polling
loop.
– To make use of this wasteful CPU time,
interrupts were developed.
• Interrupt request signal
• Interrupt acknowledge signal
 Interrupts(continued)

• Types of interrupt
– External interrupts
– Internal interrupts
– Software interrupts
 Interrupts(continued)

• Processing interrupt: by interrupt handler

– Do nothing until the current instruction has
been executed
– Get the address of the handler routine(vector
interrupts)
– Invoke the handler routine
 Interrupt
Memory
Databus
CPU

I/O I/O
Interrupt
 Interrupt controlled I/O

Data

CPU Interface Devices

Int acknowledge
2

Interrupt 1

Program Program I/O I/O

CPU

Interruptroutine
 DMA(Direct Memory Access)

• DMA controller
– Bus request
– Bus grant
• Internal configuration of DMA controller
– DMA address register
– DMA data register
– DMA counter
– DMA control register
– DMA status register
DMA Controller
 Evolution in I/O organisation
1. Processor controls device directly
2. A controller or I/O module is used separating the
processor from the details of the I/O device
3. As in 2 but using interrupts, the burden of
supervising the device continuously disappears
4. I/O module gains access to main memory
through DMA moving data in and out memory
without processor attention
5. I/O module becomes a processor - I/O specific
instruction set – to be programmed by the
processor in main memory
6. I/O module becomes a computer – a “channel” -
 Direct Memory Access
• I/O module shares the bus with the processor
• It can use the bus only when the CPU does not
need it
• Or it can steal cycles from the CPU by forcing it
to free the bus
• Procedure:
– Processor sends message to DMA (R/W, where, how
much)
– Processor continues while I/O proceeds
– At the end, I/O module sends interrupt signal to the
processor
 Differs from an interrupt
• DMA can interrupt the processor in the
middle of an instruction (before fetch, after
decoding, after execution)
• It does not interfere with the running
program
• The CPU is idled (waiting for access to the
bus)
• The system is just becoming slower
 Three implementations
• DMA shares bus with I/O units

cpu dma I/O I/O memory

• Performance and simplicity in design I/O module

 Three implementations
• DMA shares bus only with other DMA, CPU,
memory

cpu dma

I/O I/O memory

• Performance and simplicity in design I/O module

 Three implementations
• DMA has a separate I/O bus

cpu

dma
memory
I/O I/O

• Performance and simplicity in design I/O module

 I/O Processors

• I/O processor
– I/O processors are sometimes called as I/O
controllers, channel controllers, or peripheral
processing units(PPUs)
– I/O commands
• Block transfer commands
• Control commands
• Arithmetic, logic, and branch operations
I/O Processors
Interrupt handling
 General flow
Process in execution
Returns

Main Process requires I/O service

Program

I/O Interrupt

Interrupt
Service
Routine
When a program throws an interrupt a device searching routine
is performed. The program is reentered after the interrupt is
handled.

Interrupt RegPC+1 Save the return

address of the
PCinterrupt addr main program
Interrupt Determine device; Execute the
Service determine whether instructions in
Routine input or output; the service
I/OA or AI/O routine
Interrupt PCreg Restore the
return program
control
 Different types of interrupt systems
 Single interrupt systems.
 Multiple interrupt systems.
 Single interrupt system
 Finish current instruction.
 Save program counter in IRL.
 Load program counter with content of IHL.

Single-interrupt system: 2
interrupt return location
IRL
program counter
interrupt signal
3
1
interrupt handler location
IHL
CPU
Multiple interrupt system

Multiple- interrupt system:

2
IRL1

1 IRL2
program counter
interrupt signal IRL3
1 IRL4
3 IRLn

n IHL1
CPU
IHL2
IHL3
IHL4
IHLn
 Interrupt handlers
 Interrupt handlers are the routines that are called when an
interrupt is detected.

 Interrupt handlers are usually short sections of code that

are designed to handle the immediate needs of the device
and return control to the operating system or user program.
 Steps in handling interrupts
 Disable further interrupts.
 Store current state of program.
 Execute appropriate interrupt handling routine.
 Restore state of program.
 Enable interrupts.
 Resume program execution.
 Flowchart of basic interrupt
Fetch
mechanism
Instruction

Increment PC
Decode and
Execute instr.

No
Int request line
active
Restore PC

Yes
Interrupt

Store PC service
Routine
 Interrupt handling – OS ISSUES
 When an interrupt is serviced the processor must be able to
execute without being interrupted. It must have the
capability of temporarily disabling the interrupt atomically.
 If an interrupt occurs while an interrupt service is ongoing
 It is simply deferred and considered a pending interrupt. It is
serviced after the current request terminates.
 Interrupts are assigned priorities. A check is made for pending
interrupt requests after every instruction. If there is a pending
interrupt request, the priority is checked. If it has a higher priority
than the currently running code, it serviced first, otherwise it is
ignored
 Interrupt priority
 When multiple I/O devices are present in an interrupt
system, two difficulties must be resolved:

 How to handle interrupt requets from

more than one device at a time.
 Identification of the selected device.

 Assigning priority levels to each device means that

highest level priorities will be serviced before lower levels.
 Interrupt Service
 Interrupt service is a procedure in which its address
specifies the desired service and is typically called ISR
(interrupt service routine).
 Booting a Computer:
• An initial program (bootstrap program) is
run to initialize all aspects of the system –
CPU registers, device controllers, memory
contents.
• The bootstrap program locates the OS
kernel and loads it into memory.
• The OS then starts executing the first
process (“init”) and waits for some event to
occur.
• The occurrence of an event is usually
signaled by an interrupt from either the
hardware or the software.
• Hardware may trigger an interrupt by
sending a signal to the CPU via the
system bus.
• Software may trigger an interrupt by
executing a special operation called a
system call.

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• A system call is a method used by a process to
request action by the OS.
• It is the interface between the user program
and the OS.
• When a system call is executed it is treated by
the hardware as a software interrupt. Control
passes through the interrupt vector to a service
routine in the OS.
• A system call usually takes the form of a trap.

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• A trap (or an exception) is a software
generated interrupt caused either by an
error or by a specific request from a user
program that an OS service be
performed

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