SWITCHED MODE POWER CONVERSION

NON-ISOLATED SWITCH
1 MODE CONVERTERS

DC-TO-DC CONVERTERS
The DC-to-DC converters convert one level of DC voltage to another level. The
operating voltage of different electronic devices such as ICs, MOSFET can vary
over a wide range, making it necessary to provide a voltage for each device. A
Buck Converter outputs a lower voltage than the original voltage, while a Boost
Converter supplies a higher voltage.

With the application of DC-to-DC Converters, the circuit’s efficiency, ripple,

and load-transient response can be changed. Optimal external parts and
components are generally dependent on operating conditions such as input and
output specifications. So, while designing the products, the standard
circuits must be varied or changed according to and as per the need to their
individual specification requirements. Designing the circuit that satisfies the
specification and all the requirements needs a great deal of expertise and
experience in that field.

The step-up or step-down DC-to-DC Converters are useful in applications where

the battery voltage can be above or below the regulator output voltage. The DC
to DC converter must be able to operate as a step up or down voltage supplier
to provide constant load voltage over the entire battery voltage range through
the operation.

WORKING PRINCIPLE OF DC-DC CONVERTER

The working principle of the DC-to-DC converter is very simple. The inductor in
the input resistance has an unexpected variation in the input current. If the
switch is kept as high (on), then the inductor feeds the energy from the input
and stores the energy in the form of magnetic energy.

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If the switch is kept as low (off), it discharges the energy. Here, the output of
the capacitor is assumed as high that is sufficient for the time constant of an RC
circuit on the output side. The huge time constant is compared with the
switching period and made sure that the steady-state is a constant output
voltage. It should be Vo(t) = Vo(constant) and present at the load terminal

Buck Converter (Step-down)

As the name suggests, the step-down or buck converter converts a higher input
voltage into a stabilized lower output voltage. It is non-isolating and ideally
suited to step down voltages as a DC to DC converter. This is a relatively simple
circuit with the inductor current controlled by a top switch and diode.

Buck Converter Circuit Diagram

When the switch is ON, the energy is transferred to the load as well as
inductor L.

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SWITCHED MODE POWER CONVERSION

When the switch is OFF, inductor voltage reverses and freewheeling diode
becomes forward biased, the energy stored in inductor L supplies the load
through D and L.

The LC arrangement provides very effective filtering of the inductor current.

Hence, the buck and its derivatives all have very low output ripple
characteristics. The buck is normally always operated in continuous mode
(inductor current never falls to zero) where peak currents are lower, and the
smoothing capacitor requirements are smaller.

The output voltage is dependent on the ON and OFF time i.e. the duty cycle of
the square wave pulse and the expression for output voltage is as follows:

Buck Output Expression

D is the top switch duty cycle, defined as the conduction time divided by one
switching period

Advantages

 Buck converter is very simple and it requires only one power switch
 Efficiency of Buck regulator is about 90%
 The cost and size are low
 Line voltage variation has large tolerance

Disadvantages

 PWM regulator feedback circuit requires a minimum output ripple to

regulate properly

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Applications

 Battery operated portable equipment’s like RAM, CPU, USB etc.

Boost Converter (Step-Up)

As the name suggests, the step-up or boost converter converts a lower input
voltage into a stabilized higher output voltage.

Boost Converter Circuit Diagram

When the switch is ON, diode D reverse biased and the energy is stored in L and
capacitor C supplies current to the load.

When the switch is OFF, the energy stored in L is transferred to the load
through L and D.

Output voltage can be higher than the input due to the summation of the
voltage pre-stored in L and VIN.

The current supplied to the output smoothing capacitor from the converter is
the diode current, which will always be discontinuous. This means that the
output capacitor must be large, with a low equivalent series resistance (e.s.r) to
produce a relatively acceptable output ripple. This is in contrast to the buck
output capacitor requirements.

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The boost input current is the continuous inductor current, and this provides
low input ripple characteristics. This feature makes the boost converter is an
ideal choice for power factor correction application, which means Boost
converter as a pre-regulator, placed before the main converter. The main
functions being to regulate the input supply, and to greatly improve the line
power factor. This requirement has become very important in recent years, to
improve the power factor of the mains supply.

The output only depends upon the input and duty cycle:

Boost Output Expression

Advantages

 This converter is able to step up the voltage at lowest component

count possible.
 The input current is continuous which is very desirable for sources like
Photovoltaic or battery.
 The switch used here has the common ground with the source which
makes the drive circuit and control circuit arrangement easier.

Disadvantages

 The charging current of the output capacitor is discontinuous resulting

in larger capacitor size and EMI issues.

Applications

 Power factor correction circuits

 Electric cars
 Battery power systems

Buck-Boost Converter (Step Down / Step-Up)

The Buck-Boost switching regulator is a combination of the buck converter and

the boost converter that produces an inverted (negative) output voltage which
can be greater or less than the input voltage based on the duty cycle. The buck-

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boost converter is a variation of the boost converter circuit in which the

inverting converter only delivers the energy stored by the inductor L, into the
load. Both input and output currents are pulsating, low ripple levels are very
difficult to achieve using the buck-boost. Very large output filter capacitors are
needed, typically up to 8 times that of a buck regulator.

Buck Boost Converter SMPS Diagram

When the switch is ON, the diode is reverse biased and the energy is stored
in L and the capacitor C supplies current to the load.

When the switch is OFF, the energy stored in L is transferred to the load
through L and forward biased diode D.

The expression for output voltage is:

Buck Boost Output Expression

Advantages

 Input voltage can be higher or lower than the regulated output voltage

Disadvantages

 Inverted output voltage

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 Switch does not have a ground connection, this means that a level
translator is needed in the PWM output circuit which can add cost and
complexity to the design.

Applications

 Stabilizing photovoltaic cell outputs

CUK CONVERTER
A Cuk converter is a dc-to-dc converter similar to a buck-boost converter by
which we can obtain an output voltage either greater or lesser than the applied
input voltage. Though a Cuk converter is similar to a buck-boost converter, its
circuit construction overcomes the drawbacks of the buck-boost converter.

Need for Cuk Converter:

A Cuk converter is formed by combining the circuits of buck and boost
converters. We know that a buck converter is a step-down type dc-to-dc
converter i.e., the output voltage will be less than the input voltage, whereas
a boost converter is a step-up type dc-to-dc converter i.e., the output voltage
will be greater than the input voltage. The Cuk converter combines the merits
of this both converters.

Even though there is a buck-boost converter that is similar to the Cuk converter.
There are some drawbacks like the input current and charging current of the
capacitor being discontinuous in the buck-boost converter. These drawbacks
can be overcome by a Cuk converter circuit in which additional capacitors and
inductors are used.

In a buck-boost converter, the energy transfer is associated with an inductor,

whereas in the Cuk converter, the energy transfer is associated with a capacitor.
The input current is continuous in the Cuk converter.

Circuit Diagram of Cuk Converter :

The below shows the circuit arrangement of the Cuk converter using a power
MOSFET. The circuit of the Cuk converter is formed by combining the input side
of a boost converter and the output side of a buck converter with a capacitor
connected in between them.

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The Cuk converter consists of more components compared to a buck, boost,

and buck-boost converter i.e., two inductors, two capacitors, one diode, and
one switch (MOSFET). The PWM pulses are given to the gate terminal of MOSFET
to turn ON and OFF by which the output voltage is regulated.

The output voltage can be more or less than the input voltage i.e., the circuit can
work in buck and boost mode which depends upon the duty ratio. The polarity
of the output voltage in a Cuk converter is inverted (opposite of the input
voltage).

Working of Cuk Converter:

In order to simplify and easily understand the working of the Cuk converter, the
circuit operation is divided into four modes. Before starting the operation it
should be noted that all the storage components in the circuit do not hold any
charge in it.

Mode-1 (When MOSFET is ON):

Since there is no charge present in inductors and capacitors initially. When the
MOSFET is turned ON, the source current starts flowing the inductor L1, MOSFET,
and back to the source as shown in the below figure.

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During this condition, the inductor current starts rising and it will store energy
with polarity from positive to negative in the direction of current flow. Also,
there is no flow of source current to the load in this mode.

Mode-2 (When MOSFET is OFF):

Once the MOSFET is turned OFF, due to a sudden drop in current through the
inductor, the polarity of the inductor will be reversed. Now the charged inductor
L1 in the previous mode will start discharging in the reverse direction. Here in
addition to the energy dissipating from the inductor, the current will flow from
the source to the inductor.

Thus the input voltage will be added to the inductor voltage, due to which the
current starts flowing through the capacitor and the capacitor gets charged by
the inductor. This flow of current through the capacitor makes the diode
forward biased. The capacitor allows the flow of current through it because it is
not completely DC (since the current provided by the inductor is not constant).

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The current flow path when the MOSFET is turned OFF is from the source to
inductor L1, capacitor C1, diode, and back to the source as shown above. Similar
to mode-1 no power is supplied to the load in this mode.

Mode-3 (When MOSFET is ON):

Now when the MOSFET has turned ON again, the inductor L1 will be charged
again similarly as seen in mode-1. As capacitor C1 is charged in mode-2, it starts
discharging and dissipates energy to the load. The discharging of the capacitor
C1 will be through MOSFET, capacitor C2, load, inductor L2, and back to the
capacitor as shown below.

Simultaneously when the capacitor is discharging, inductor L2 will be charged

with energy provided by the capacitor C1 as shown above. Due to flow reverse
current, the diode will be in reverse bias and hence it remains in the OFF state
in this mode.

Mode-4 (When MOSFET is OFF):

Again when the MOSFET is turned OFF, mode-2 will be repeated in which
capacitor C1 will be charged with inductor energy by forward biasing the diode.
In addition to this, the charged inductor L2 in mode-3 will start discharging in the
reverse direction through the same diode and transfers its energy to the load as
shown below.

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Therefore from the above four operation modes of the Cuk converter, we can
conclude that. When the MOSFET is in the ON state, inductor L1 gets charged
and capacitor C1 will supply its energy to load.

When the MOSFET is in the OFF state, capacitor C1 gets charged and inductor
L2 supplies its energy to load. The capacitor C1 acts as the medium for
transferring energy from source to load. The below shows the waveforms for
voltages and currents.

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Advantages of Cuk Converter:

 Compared to the buck-boost converter, the efficiency of a Cuk
converter is high.
 The two inductors present on the input and output sides of the
converter reduce ripples in the current.
 The two inductors can be made to share a common core which in turn
simplifies construction.
 The LC components in the circuit filter both input and output currents
thus reducing electromagnetic interference.
 The input and output current both are continuous.
 The switching losses are less in the Cuk converter.
Disadvantages of Cuk Converter:
 High-rating capacitor is needed in high-power applications.
 All the current from the source to load as to go through capacitor
C1 and the voltage across the capacitor reverses each half cycle, thus
the capacitor must be non-polarized.
 Since MOSFET has to carry the currents of two inductors high peak
current will flow through it.
Applications of Cuk Converter:
 The Cuk converter circuit is used to maintain fixed output voltage in
dc applications services.
 This type of converter circuit is used as a voltage regulator in
renewable energy-based power generation systems to supply
constant output voltage to the load.
 It can be used as the power factor correction circuit.

2 Non-ideal PWM DC–DC boost converter

In this section, we present the non-ideal modelling of PWM DC–DC boost
converter. The schematic representation is shown in Fig. 1a. The circuit consists
of switch (S), diode ( ), inductor (L), capacitor (C) and load resistance (R). For
obtaining nearly accurate model of boost converter, all parasitic resistances are
considered such as source resistance ( ), inductor resistance ( ), switch
resistance ( ), diode resistance ( ), diode forward voltage drop ( ), capacitor
ESR ( ). Furthermore, is input supply, is output voltage, is the voltage
across capacitor, is the voltage across inductor, D is the duty cycle and T is

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the total period. The duty cycle D is ratio of switch ON time ( ) to the total time
period ( ). Mathematically

(2)

Fig. 1
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Schematic representation of

(a) Non-ideal DC–DC boost converter, (b) During ON time, (c) During OFF time

Here, we have made few assumptions for analysing the PWM DC–DC boost
converter.

Assumption 1.PWM DC–DC boost converter is operating in CCM. In CCM

operation, converter works in two switching intervals: (a) ON time
interval, i.e. and (b) OFF time interval, i.e. [21].

Assumption 2.Initial charging current through inductor is zero, i.e. and

initial voltage across the capacitor is zero, i.e. .

2.1 During switch ON

The equivalent circuit for boost converter during interval i.e. ON-
period is shown in Fig. 1b. In this interval, the diode ( ) is OFF and switch is
replaced by its ON time resistance ( ). Here, the switch current ( ) is same as
inductor current ( ) and input current ( ). Diode current ( ) is zero.

Using Kirchhoff's voltage law (KVL) and Kirchhoff's current law (KCL), the
fundamental equations for the circuit as shown in Fig. 1b are obtained as
follows:

(3)

(4)
(5)
2.2 During switch-OFF

The equivalent circuit for boost converter during interval i.e. OFF
period is shown in Fig. 1c. In this interval, the switch (S) is OFF and diode ( ) is
ON. Here, the diode ( ) is replaced by its equivalent model, i.e. resistance ( )
in series with forward voltage ( ). The input current ( ) is same as inductor
current ( ) and switch current ( ) is zero.

Using KVL, KCL, the fundamental equations for the circuit as shown in Fig. 1c are
obtained as follows:

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(6)

(7)
(8)

3 Steady-state analysis

For the steady-state analysis of PWM DC–DC boost converter, the following
assumptions are made.

Assumption 3.Voltages and currents are assumed constant over one switching
cycle.

Assumption 4.Voltages and currents are represented by their average (steady

state) values as follows:

Note 1: In general, the average value X of a variable x(t) over a period T is given
as

(9)
where x(t) is the voltage across or current through an element of the boost
converter, . The terms and represent the variable x(t)
during switch ON and switch-OFF, respectively.
According to volt-second balance [21], in steady state, the average inductor
voltage must be equal to zero
(10)
Similarly, in steady state, according to charge balance through the capacitor, the
average capacitor current must be equal to zero
(11)
The average output voltage is determined as follows:
(12)
Equation (11) and (12) are simplified to obtain steady-state relations, which are
given below:

(13)
(14)

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Using (10)–(14), we get

(15)
Note 2: If all non-idealities are zero, then the ideal output voltage of boost
converter is

(16)
In an ideal PWM DC–DC boost converter, the output voltage is a function of duty
cycle and input voltage only. However, by including non-idealities, the output
voltage of PWM DC–DC boost converter is not only function of duty
cycle D and input voltage but also the load resistance R and other parasitic
elements, which are shown in (15).

Therefore, it is clear that the output voltage of a practical boost converter is

always less than the ideal boost converter, if the MOSFET switch of practical
boost converter is operated at a duty cycle which satisfies the relation in (16). It
is because this relation is for ideal boost converter which neglects the non-
idealities present in practical boost converter. Therefore, to achieve the desired
output voltage from a practical boost converter, duty cycle should be obtained
by satisfying the input–output voltage relationship in (15). This improved
relationship for this duty cycle is developed as follows.

Equation (15) further simplified as

(17)
By solving quadratic (17) in terms of , the improved expression for duty cycle
of a practical DC–DC boost converter is obtained as given in (18)

(18)
This expression confirms that the actual duty cycle is not only dependent on
output voltage and input voltage as in ideal case but also depends on load
resistance and other non-ideal elements of boost converter. The duty cycle
calculated using (18) results in exact value of output voltage which we desire.

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From (15), it is observed that is the function of D. Therefore, by

differentiating with respect to D and equating to zero, we get the information
of maximum permissible duty cycle ( ) as follows:

(19)
where
, ,
.

By substituting (19) into (15), the maximum achievable voltage ( ) with the
given converter can be determined.

Here first and foremost, the analysis carried out for wide variation of input
voltage and load resistances, since the values of parasitic elements are constant
during operation.

The plot of output voltage as a function of duty cycle D is shown in Fig. 2a for
ideal case and non-ideal case at different load resistances (R). For the ideal case,
the converter output voltage increases with duty cycle. On the other hand, for
the non-ideal case, the output voltage first increases with duty cycle, reaches its
maximum value, and then decreases to zero at duty cycle close to unity. The
output voltage is dependent on load resistance. At a particular value of duty
cycle, as the load resistance decreases, the output voltage also drops
significantly. For any fixed duty cycle, the difference between ideal DC output
voltage and non-ideal DC output voltage increases with decrease in load
resistance. This is because of the increased voltage drop across the non-
idealities in practical boost converter at lower load resistance (or higher load
current). As the load resistance is increasing, the and are also
increasing.

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Output voltage of boost converter as a function of duty cycle

(a) For different load resistances and fixed input voltage, (b) For different input
voltages and fixed load resistance, (c) For a fixed output voltage when both
input voltage and load resistance are varying

The plot of output voltage as a function of duty cycle D is shown in Fig. 2b for
ideal case and non-ideal case at different input voltages ( ). For a particular
duty cycle, the difference between the output voltage of an ideal and non-ideal
boost converter becomes larger as input voltage increases. So in the presence
of parasitics, switch should be kept ON for long time to get the same output
voltage. As the input voltage decreases, also is decreasing in non-ideal
case. This decreases because of input voltage variation. From this, we get
the information of minimum input voltage ( ) to be applied for converter at
fixed output voltage (in regulator problems).

The plot of input voltage as a function of duty cycle D for different load
resistances is shown in Fig. 2c. It shows that the actual duty cycle is dependent
on load resistance and at a particular value of input voltage, as the load
resistance decreases, the required duty cycle increases. In an ideal case, it is
possible to achieve desired output voltage for any value of input, but in non-
ideal case it is not possible. Moreover, there is a limit on minimum value of input
voltage. As the load resistance increases, the minimum value of input voltage (
) to be applied decreases.

Even though the parasitics of the converter are almost constant during
operation, however in Fig. 3 shows the effect of parasitics on duty cycle versus
output voltage characteristics while keeping input voltage and load resistances
as constant. These observations have been tabulated in Table 1.

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Fig. 3
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Output voltage of boost converter as a function of duty cycle

(a) For variation in source resistance, (b) For variation in inductor

resistance, (c) For variation in ESR of capacitor, (d) For variation in

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diode resistance, (e) For variation in switch on resistance, (f) For

different diode forward drop voltages

Table 1. Effect of parasitics on steady-state performance

Parasitic element (if it increases)

source resistance ( ) decreases decreases

inductor ESR ( ) decreases decreases

diode resistance ( ) no effect no effect

capacitor ESR ( ) negligible effect slightly decreases

switch resistance ( ) slightly decreases slightly decreases

diode forward drop voltage ( ) no effect no effect

Finally from this analysis, we obtain some important conclusions for closed-loop
operation of converter as follows:

i. Output voltage of a practical converter is always less than the ideal. So, to get
the exact value in both theoretical and practical cases, the improved duty
cycle expression is very important.

ii. If the design parameters are known, then with this analysis we can find the
values of and with the converter, which plays pivotal role in
closed-loop operation.

iii. Usually in closed-loop operation, the duty cycle of a boost converter will be
adjusted to increase, if the output voltage decreases with the change in load
or input voltage. When this change is large, then the converter may operate
in unstable region as shown in Fig. 2a, which leads to output voltage collapse.
So to avoid this, limit the controller output to some finite value K

(20)

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where and the accurate expression for is given in (19).

iv. By this analysis, the key information of input voltage range

specification of the converter is observed at a constant output voltage.

v. From Table 1 and Fig. 3, it is clear that the input and inductor resistances are
effecting characteristics significantly as compared with other parasitics. From
this, we can conclude that while designing converter, these parameters values
should be low.

The following illustrative examples will summarise the steady-state analysis.

Example 1.Consider the closed-loop operation of boost converter to achieve

steady-state output value of 25 V. Here, we analyse the importance of ideal and
non-ideal operations. Consider the parameters as given in Table 2.

Table 2. Parameters of DC–DC boost converter

Parameters Value

input voltage ( ) 5V

output voltage ( ) 8.33 V

source resistance ( ) 0.2 Ω

inductor ( ) 250 μH/0.24 Ω

capacitor ( ) 200 μF/0.12 Ω

diode forward drop ( ) 0.5 V

diode resistance ( ) 0.03 Ω

switch resistance ( ) 0.05 Ω

switching frequency (f) 20 kHz

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Parameters Value

load resistance (R) 22 Ω/100 W

First consider the ideal operation. Since the elements are ideal, parasitics are
neglected. Now, we check whether the duty cycle is in the range or not. From
(1), duty cycle is calculated as . So, by operating converter in closed
loop with proper controller values steady-state output is achievable. Now,
consider the non-ideal operation, since parasitics are present in the elements
practically. From (18), duty cycle obtained as imaginary value, which shows that
the given steady-state output is not achievable with this converter. Also from
Fig. 2a, it is clear that the maximum achievable voltage is around 16.3 V. So,
even if we operate in closed loop we cannot achieve the steady-state output as
25 V, which is contradictory result from the ideal operation. So, this critical
information of maximum achievable voltage ( ) with the converter is
necessary before operating it in a closed loop.

Example 2.Consider the closed-loop operation of boost converter to achieve

steady-state output value of 8.3 V. Suppose input voltage or reference voltage
is varying, then how to design closed-loop control? Consider the parameters as
given in Table 2.

As we have seen in Example 1, , so the output value mentioned in

the problem is achievable. For this converter,

for and .

To achieve

in open-loop required, which shows .

Suppose in the first case, the input voltage started decreasing gradually, then
accordingly duty cycle of the boost converter will increase (up to ) to
achieve the steady-state output. In the second case, input voltage or reference
voltage changes suddenly, then error is large. So to minimise this error, the duty
cycle may increase to unity for instant. This will collapse the output voltage. To
avoid this, the duty cycle should be limited to . Here in both cases, the input
voltage is allowed to decrease up to only, which is clearly
observable from Fig. 2c. This will show the importance of analysis

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(i.e. knowledge of , ) for the closed-loop operation, when sudden

changes occur.

4 Inductor design
In this section, the effect of non-idealities is analysed on inductors design and
inductor ripple current. Let be ICR factor for inductors L, such that
. For ON-period , the steady-state magnitude of ripple current can
be written as

(21)
Substituting value of from (13) and simplifying

(22)
Here, is the switching frequency of boost converter.
Equation (22) is simplified further in Appendix 1 and the expression of inductor
ripple current is obtained in final form as follows:

(23)
Substituting into (23), we get the expression for
inductor L as

(24)
Note 3: Putting the values of all non-ideal elements to zero in (23) and (24), these
expressions become

(25)

(26)
From (25) and (26), we can observe that these are same as given in various
textbooks to calculate the ICRs and inductance value. However, (23) and (24)
provide the actual value of inductance L and ripple expression to limit the
current ripples within specified range in the presence of non-idealities. Here, an
important observation from non-ideal design is that the values of inductance
and current ripple are affected by the ESR of the capacitor. The plots between
ESR of the capacitor versus ICR and inductance are shown in Fig. 4. From this

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figure, it is observed that as the capacitor ESR increases, the ICR also increases
and the inductance required also increases.

Fig. 4
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ESR of capacitor effect on

(a) ICR, (b) Inductance

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5 Capacitor design
The ESR of a capacitor plays an important role in design. A capacitor is modelled
by its capacitance value and ESR value. The total voltage ripple of a capacitor is
sum of voltage ripples due to its own capacitance and voltage ripples due to its
ESR. Therefore, for proper capacitor design, it becomes necessary to consider
the effect of ESR. The capacitor C is used as filter capacitor at output stage. The
voltage ripples across this capacitor directly affect the quality of output voltage.
Therefore, its design is carried out more carefully to limit the OVRs within
permissible range. The capacitor current and different components of voltage
ripples in steady state are shown in Fig. 5. The OVR is made up of two
components: (a) voltage ripples due to capacitor and (b) Voltage ripples
due to ESR, . The detailed analysis is carried out as follows:
(27)
(28)

(29)

Fig. 5

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Current and ripple voltage waveforms associated with capacitor C

is initial voltage across capacitor at .

5.1 When switch is ON

The current through capacitor C is
(30)
From (27)–(29), the total OVR during switch ON is

(31)
From (31), it is clear that is a line equation which is shown in Fig. 5 also. It
has a minimum value at . At , the voltage ripples are obtained as
(32)

(33)

(34)
5.2 When switch is OFF
In this duration, the capacitor current dynamics is

(35)
From (27)–(29), the total OVR during switch-OFF is

(36)
The time at which value of occurs maximum during switch-OFF is given
by

(37)
and the maximum values of OVRs are obtained as

(38)

(39)

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(40)
Therefore, from (34) and (40) the total peak-to-peak voltage ripple will be

(41)
Note 4: If non-idealities are zero, then (41) becomes

(42)
The above simplification in detail is given in Appendix 2.
Let the maximum specified OVR be . Therefore, the value of
capacitor C should be chosen such that
(43)
By solving the above inequality, the minimum value of filter capacitor C for given
OVR and ICR can be obtained as follows:

(44)

6 ESR analysis
6.1 Maximum permissible ESR
As discussed in the previous section, the ESR of output capacitor C plays an
important role in OVR of boost converter. As the value of ESR increases, more
ripples appear in output voltage, degrading the output voltage quality.
Therefore, it is necessary to find out the maximum permissible value of ESR for
maximum specified OVR.

In (44), Capacitor C will have a real value (practically feasible) only if the terms
inside the root are ≥0, i.e.

(45)
On simplification

(46)

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Therefore, the maximum permissible value of ESR ( ) for specified OVR and
ICR can be defined as

(47)
If the ESR value of the output capacitor is greater than the , then the OVR
will exceed the maximum defined limit. Furthermore, this can be observed by
simulation and experimental results in Section 8. Substituting value
of from (47) into (44), the minimum value of output capacitor in worst
case is

(48)
From (47), it is clear that maximum permissible ESR depends on the ICR. From
this relation, we can observe that maximum permissible ESR will increase as the
ICR decreases for a prescribed OVR which is shown in Fig. 6a. From (48), it is
observed that the capacitance value depends on the ICR. The plot between
capacitance required versus ICR for different specified OVR is shown in Fig. 6c.
From this figure, it is observed that the capacitor design in boost converter
actually depends not only on specified OVR but also the ICR. Furthermore, from
ideal analysis it is observed that capacitance is independent of ICR and only
depends on OVR.

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ESR analysis
(a) Maximum permissible ESR versus ICR, (b) Voltage ripple variation with
ESR, (c) Effect of ICR on capacitance

6.2 Effect of ESR on OVR

The total OVR is given by (41) and by using (32), (33), (38) and (39), the ripple
contribution by ESR and capacitor are obtained as follows:

(49)

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(50)
The voltage ripple obtained by the expressions (41), (49) and (50) are plotted in
Fig. 6b with the variation of ESR ( ). From this figure, with an increase in
ESR, increases at a faster rate than decreases, thereby causing a net
increase in . However, as the value of increases beyond
, becomes higher than , which is practically impossible. This result
implies that the capacitor is no longer able to keep OVR within the specified limit
for . So from Fig. 6b, ripple provided by capacitor is obtained as
negative (for ), which can be observed from (50). This can be analysed
as the net increase in charging time constant is more as compared with the
discharging time constant. So, the net magnitude of ripple goes out of the
prescribed band of voltage ripple limit, which mathematically also obtained as
negative in magnitude as shown in (50). The exact relation for this is given
in (47).

7 Small signal analysis

The small signal analysis will be helpful for controller design process of non-ideal
boost converter and also the effect of parasitics on dynamic performance of
converter. Most important in this section, we obtain the transfer function of the
boost converter by considering all the non-idealities. For modelling the
converter, popular state-space analysis [21] is used. The small signal transfer
function model of the non-ideal boost converter is obtained as follows:

(51)

where

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Note 5:
When all the non-idealities are zero
(i.e. , , , , , ),
then ideal transfer function can be obtained

(52)
From the transfer function model of the converter, the following observations
can be drawn for the closed-loop control design:

 For designing robust controller by considering the parametric variations, the

linear transfer function model presented in (51) is essential, since the model
shows the dependency of pole zero frequencies on parasitics.

 From the transfer function, it is observed that the following condition must
be satisfied to ensure the closed-loop stability of converter:

(53)

This term mostly affected by inductor and capacitor values:

 The frequency location of right half plane (RHP) zero ( ) can be calculated
exactly and how this depends on parasitics can be analysed with the
expression shown (51). Since, the RHP zero limits the bandwidth of boost
converter, this analysis is important.

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 In case of non-ideal analysis, an additional left half plane (LHP) zero is added,
which will help for the bandwidth improvement. From the expression of LHP
zero frequency , we observe that it depends on capacitor value and its ESR.

 The selection of crossover frequency should be well below the frequency of

RHP zero and frequency of LHP zero should be greater than the RHP zero.

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