UNIT – II 8085 INSTRUCTION SET AND PROGRAMS

ADDRESSING MODES
The microprocessor can access data in various ways. The data could be in a
register, or in memory, or be provided as an immediate value. These various ways of
accessing data are called addressing modes. Intel 8085 uses the following addressing
modes.
 Immediate addressing
 Direct addressing
 Register addressing
 Register indirect addressing
 Implicit addressing

IMMEDIATE ADDRESSING
The operand is specified within the instruction itself.
Example: MVI A, 05 Move 05 in register the instruction in the code form.
DIRECT ADDRESSING
The address of the operand data is given in the instruction itself.
Example: STA 2400H store the content of the accumulator in the memory location
2400H
In this instruction 2400H is the memory address where data is to be stored. It is
given in the instruction itself. The 2 nd and 3rd bytes of the instruction specify the
address of the memory location. Here it is understood that the source of the data is
accumulator.
REGISTER ADDRESSING
The operands are in the general purpose registers.
Example:
MOV A, D move the content of register D to register A
REGISTER INDIRECT ADDRESSING
The address of the operand is specified by the register pair.
Example:
MOV A, M Move the content of the memory location, whose address is in
H-L pair to the accumulator.
IMPLICIT ADDRESSING
There are certain instructions, which operate on the content of the accumulator.
Such instructions do not require the address of the operand. Examples are CMA,
RAL, and RAR etc.
INSTRUCTION CLASSIFICATION
An instruction is a binary pattern designed inside a microprocessor to perform a
specific function. The entire group of instructions, called the instruction set,
determines when functions the microprocessor can perform. These instructions can
be classified into the following five functional categories: data transfer operations,
arithmetic operation, logical operations, and branching operations and machine-
control operations.
DATA TRANSFER OPERATIONS
This group of instructions copies data from a location called a source to another
location, called a destination, without modifying the contents of the source. The
various types of data transfer are listed below

Between registers
Specific data byte to register or a memory location
Between a memory location and a register
Between an I/O device and the accumulator
Between a register pair and the stack
ARITHMETIC OPERATIONS
These instructions perform arithmetic operations such as addition, subtraction,
increment and decrement.
Addition –Any 8-bit number, or the contents of register, or the contents of a memory
location can be added to the contents of the accumulator and the sum is stored
accumulator. No two other 8-bit registers can be added directly, the instruction DAD
is an exception; it adds 16-bit data directly in register pairs.
Subtraction-Any 8-bit number, or the contents of register, or the contents memory
location, can be subtracted from the contents from the contents of the accumulator
and the stored in the accumulator, the subtraction is performed in 2’s complement,
and the results, if negative, are expressed in 2’s complement. No two other registers
can be subtracted directly.
Increment/Decrement- The 8-bit contents of a register or a memory location can be
incremented or decremented by 1.
LOGICAL OPERATIONS
These instructions perform various logical operations with the contents of the
accumulator.
AND, OR, Exclusive-OR –Any 8-bit number, or the contents of a register, or of a
memory location can be logically AND, OR, or Exclusive-OR with the contents of the
accumulator.
Rotate-Each bit in the accumulator can be shifted either left or right to the next
position.
Compare-Any 8-bit number, or the contents of a register, or a memory location can
be compared for equality, greater than, or less than, with the contents of the
accumulator.
Complement-The contents of the accumulator can be complemented; all 0s are
replaced by 1s and all 1s are replaced by 0s.
BRANCHING OPERATIONS
This group of instructions alters the sequence of program execution either
conditionally or unconditionally.
Jump-Conditional jumps are an important aspect of the decision-making process in
programming. These instructions test for a certain condition and alter the program
sequence when the condition is met. In addition, the instruction set includes an
instruction called unconditional jump.
Call, Return, and Restart-These instructions change the sequences of a program
either by calling a subroutine or returning from a subroutine. The conditional call and
return instructions also can test condition flags.
MACHINE CONTROL OPERATIONS
These instructions control machine functions such as Halt, Interrupt, or perform
no operation.
INSTRUCTION FORMAT
An instruction is a command to the microprocessor to perform a given task on
specified data. Each instruction has two parts: one is the task to be performed, called
the operation code (opcode) and the second is the data to be operated on, called the
operand. The operand can be specified in various ways. It may include 8-bit data an
internal register, a memory location, or 8-bit address. In some instruction the
operand is implicit.
Instruction Format (Word Size)
The 8085/8080A 8instruction set is classified into the following three groups according
to word size:
1. One-word or 1-byte instructions
2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions
ONE-BYTE INSTRUCTIONS
A 1-byte instruction includes the opcode and the operand in the same byte.
MOV C, A -copy the contents of the accumulator in register C (4FH).
ADD D- Add the contents of Register D to the contents of the Accumulator (82H).
This instruction would require one memory location to store in memory.
TWO – BYTE INSTRUCTIONS
In a 2-byte instruction, the first byte specifies the operation code and the
second byte specifies the operand. For example:
MVI A, Data Load an 8-bit data byte in the accumulator
Assume the data byte is 45H. The assembly language instructions is written as:
MVI A, 45H (Hex code 3E, 45)
This instruction would require two memory locations to store in memory.
THREE – BYTE INSTRUCTIONS
In a 3-byte instruction, the first byte specifies the opcode, and the following two
bytes specify the 16-bit address.
For example:
JMP 3000H - transfer the Program sequence the memory location 3000H
C3 (opcode) First byte, 00 second byte (low order address)
30 (high order address)
This instruction would require three memory locations to store in memory.
INTEL 8085 INSTRUCTIONS
The 8085 microprocessor instruction set has 74 operation codes that result in
246 instructions.
DATA TRANSFER GROUP
MOV Rd, Rs (move data: move the content of source register to destination
register)
[Rd]  [Rs].
Ex: MOV A, B
MOV R, M (Move the content of memory to register)
[R]  [[H-L]] The Register may be A, B, C, D, E, H, L
Ex: MOV A, M
MOV M, R (Move the content of register to memory)
[[H-L]] [R]
This instruction copies the contents of the source register into the destination
register, the contents of the source register are not altered. If one of the operands is
a memory location, it is specified by the contents of HL registers. No flags are
affected
MVI M, data (Move immediate data to memory)
[[H-L]]  data
MVI R, data (Move immediate data to register)
[R]  Data
The 8 bit data is stored in the destination register or memory. If the operand is a
memory location, it is specified by the contents of HL registers. No flags are affected.
LXI Rp, data 16 (Load register pair immediate).
[Rp]  data 16 bits, [Rh]  8 MSBs, [Rl]  8 LSBs of data.
The instruction load 16-bit data in the register pair designated in the operand. This is
a 3-byte instruction, the second byte specifies the low order byte and the third byte
specifies the high order byte. No flags are affected.
LDA 16-bit address (Load accumulator direct)
[A]  [address]
The contents of a memory location, specified by a 16-bit address in the operand, are
copied to the accumulator. The contents of the source are not altered. This is a 3-
byte instruction, the second byte specifies the low order address and the third byte
specifies the high order address. No flags are affected.
STA 16-bit address (Store accumulator direct)
[Address]  [A]
The contents of the accumulator are copied to a memory location specified by the
operand. This is a 3-byte instruction, the second byte specifies the low order address
and the third byte specifies the high order address. No flags are affected.
LHLD 16-bit address (Load H-L pair direct)
[L]  [address], [H]  [address + 1]
The instruction copies the contents of the memory location pointed out by the 16-bit
address in register L and copies the contents of the next memory location in register
H. The contents of source memory locations are not altered. No flags are affected.
SHLD 16-bit address (Store H-L pair direct)
[address]  [L], [address + 1]  [H]
The contents of register L are stored in the memory location specified by the 16-bit
address in the operand and the contents of H register are stored in the next memory
location by incrementing the operand. The contents of registers HL are not altered.
This is a 3-byte instruction, the second byte specifies the low order address and the
third byte specifies the high order address. No flags are affected.
LDAX Rp (Load accumulator indirect)
[A]  [[Rp]]
The contents of the designated register pair point to a memory location. This
instruction copies the contents of that memory location into the accumulator. The
contents of either the register pair or the memory location are not altered. No flags
are affected.

STAX Rp (Store accumulator indirect)

[[Rp]]  [A]
The contents of the accumulator are copied into the memory location specified by the
contents of the operand register pair. The contents of the accumulator are not
altered. No flags are affected.
XCHG (Exchange the contents of H-L with D-E pair)
[H-L]  [D-E]
The contents of register H are exchanged with the contents of register D, and the contents
of tegister L are exchanged with the contents of register E.
Flags: No flags are affected.
ARITHMETIC GROUP
ADD R (Add register to accumulator)
[A]  [A] + [R]
ADD M (Add memory to accumulator)
[A]  [A] + [[HL]]
The contents of the operand (register or memory) are added to the contents of the
accumulator and the result is stored in the accumulator. If the operand is a memory
location that is indicated by the 16-bit address in HL register. All flags are modified to
reflect the result of the addition.
ADC R (Add register with carry to accumulator)
[A]  [A] + [R] + [CY]
ADC M (Add memory with carry to accumulator)
[A]  [A] + [[H-L]] + [CY]
The contents of the operand (register or memory) and the carry flag are added to the
contents of the accumulator and the result is placed in the accumulator. The
contents of the operand are not altered, however the previous carry flag is reset. All
flags are modified to reflect the result of the addition.
ADI data (Add immediate data to accumulator)
[A]  [A] + data
The 8-bit data operand is added to the contents of the accumulator, and the result is
placed in the accumulator. All flags are modified to reflect the result of the addition.
ACI data (Add with carry immediate data to accumulator)
[A]  [A] + data + [CY]
The 8 bit data operand and the carry flag are added to the contents of the
accumulator, and the result is stored in the accumulator. All flags are modified to
reflect the result of the addition.
DAD Rp (Add register pair to H-L pair)
[H-L]  [H-L] + [Rp]
The 16 bit contents of the specified register pair are added to the contents of HL
register and the sum is saved in the HL register. The contents of the source register
pair are not altered. If the result is larger than sixteen bits the cy flag is set. No other
flags are affected.
SUB R (Subtract register form accumulator)
[A]  [A] - [R]
SUB M (Subtract memory form accumulator)
[A]  [A] - [[H-L]]
The contents of the register or the memory location specified by the operand are
subtracted from the contents of the accumulator, and the result is placed in the
accumulator. The contents of the source are not altered. All flags are affected to
reflect the result of the subtraction.
SBB R (Subtract register form accumulator with borrow)
[A]  [A] - [R] – [CS]
SBB M (Subtract memory form accumulator with borrow)
[A]  [A] - [[H-L]] – [CS]
The contents of the operand register or memory and the borrow flag are subtracted
from the contents of the accumulator and the result are placed in the accumulator.
The contents of the operand are not altered however the previous borrow flag is
reset. All flags are altered to reflect the result of the subtraction.
SUI data (Subtract immediate data from accumulator)
[A]  [A] - data
The 8 bit data the operand is subtracted from the contents of the accumulator and
the results are placed in the accumulator. All flags are altered to reflect the result of
the subtraction.
SBI data (Subtract immediate data from accumulator with borrow)
[A]  [A] - data – [CY]
The 8 bit data the operand and the borrow are subtracted from the contents of the
accumulator and the results are placed in the accumulator. All flags are altered to
reflect the result of the subtraction.
INR R (Increment register content)
[R]  [R] + 1
INR M (Increment memory content)
[[H-L]]  [[H-L]] + 1
The contents of the designated register/memory are incremented by 1 and the result
is stored in the same place. If the operand is a memory location, it is specified by the
contents of HL register pair. Flags: S, Z, P, AC are modified to reflect the result of the
operation. CY is not modified.
DCR R (Decrement register content)
[R]  [R] - 1
DCR M (Decrement memory content)
[[H-L]]  [[H-L]] - 1
The contents of the designated register/memory are incremented by 1 and the result
is stored in the same place. If the operand is a memory location, it is specified by the
contents of HL register pair. S, Z, P, AC are modified to reflect the result of the
operation. CY is not modified.
INX Rp (Increment register pair by one)
[Rp]  [Rp] + 1
The contents of the specified register pair are incremented by one. The instruction
views the contents of the two registers as a 16-bit number. No flags are affected.
DCX Rp (Decrement register pair by one)
[Rp]  [Rp] - 1
The contents of the specified register pair are decremented by one. This instruction
views the contents of the two registers as a 16-bit number. No flags are affected.
DAA (Decimal adjust accumulator)
The contents of the accumulator are changed form a binary value to two 4-bit binary
coded decimal BCD digits. This is the only instruction that uses the auxiliary flag
internally to perform the binary to BCD conversion. S, Z, AC, P, CY flags are altered to
reflect the results of the operation. Instruction DAA converts the binary contents of
the accumulator as follows:
If the value of the low order 4 bits in the accumulator is greater than 9 or if AC flag is
set, the instruction adds 6 to the low order four bits.
If the value of the high order 4 bits in the accumulator is greater than 9 or if the carry
flag is set, the instruction adds 6 to the high order four bits.
ADD decimal 12 BCD to the accumulator, which contains 39BCD
39 BCD = 0 0 1 1 1 0 0 1
+12 BCD = 0 0 0 1 0 0 1 0
------------- ------------------
51 BCD = 0 1 0 0 1 0 1 1 = 4BH
The binary sum is 4BH. The value of the low order four bits is larger than 9.
Add 06 to the low order four bits.

4B = 0 1 0 0 1 0 1 1
00000110
---------------------------
01010001
---------------------------
LOGICAL GROUP
ANA R (AND register with accumulator)
[A]  [A] ^ [R]
ANA M (AND memory with accumulator)
[A]  [A] ^ [[HL]]
The contents of the accumulator are logically ANDed with the content of the operand
register or memory and the result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of HL registers. S, Z, P are
modified to reflect the result of the operation. CY flag is reset.
ANI data (AND immediate data with accumulator)
[A]  [A] ^ data
The contents of the accumulator are logically AND with the 8 bit data operand and the
results are placed in the accumulator. S, Z, P are modified to reflect the result of the
operation. CY flag is reset
ORA R (ORA register with accumulator)
[A]  [A] V [R]
ORA M (ORA memory with accumulator)
[A]  [A] V [[HL]]
The contents of the accumulator are logically ORed with the contents of the operand
register or memory and the result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of HL registers. S, Z, P are
modified to reflect the result of the operation. AC and CY flag are reset.
ORI data (OR immediate data with accumulator)
[A]  [A] V data
The contents of the accumulator are logically ORed with the 8 bit data operand and
the results are placed in the accumulator. S, Z, P are modified to reflect the result of
the operation. CY and AC are reset.
XRA R (EXCLUSIVE OR register with accumulator)
[A]  [A] V [R]
XRA M (EXCLUSIVE OR memory with accumulator)
[A]  [A] V [[HL]]
The contents of the operand register or memory are Exclusive ORed with the contents
of the accumulator, and the results are placed in the accumulator. The contents of
the operand are not altered. S, Z, P are modified to reflect the result of the operation.
CY and AC are reset.
XRI data (EXCLUSIVE - OR immediate data with accumulator)
[A]  [A] V data
The 8 bit data operand is Exclusive ORed with the contents of the accumulator and
the results are placed in the accumulator. S, Z, P are modified to reflect the result of
the operation. CY and AC are reset.
CMA (Complement the accumulator)
[A]  [Ā]
The contents of the accumulator are complemented. No flags are affected.
CMC (Complement the carry status)]
[CY]  [Ā]
The carry flag is complemented. The carry flag is modified, no other flags are
affected.
STC (Set carry status)
[CY]  1
The carry flag is set to1. No other flags are affected.
CMP R (Compare register with accumulator)
[A] - [R]
CMP M (Compare memory with accumulator)
[A] - [[HL]]
The contents of the operand register or memory are compared with the contents of
the accumulator. Both contents are preserved and the comparison is shown by
setting the flags as follows.
If (A) < (Reg/Mem): carry flag is set.
If (A) = (Reg/Mem): Zero flag is set.
If (A) > (Reg/Mem): Carry and Zero flags are reset.
Subtracting the contents of the operand from the contents of the accumulator,
however, performs the comparison of two bytes, neither contents are modified. S, P,
AC are also modified in addition to Z and C to reflect the result of the operation.
CPI data (Compare immediate data with accumulator)
[A] - Data
The second byte (8 bit data) is compared with the contents of the accumulator. The
values being compared remain unchanged and the results of the comparison are
indicated by setting the flags as follows..
If (A) < Data: carry flag is set.
If (A) = Data: Zero flag is set.
If (A) > Data: Carry and Zero flags are reset.
Subtracting the data byte from the contents of the accumulator, however, performs
the comparison of two bytes, neither contents are modified. S, P, AC are also
modified in addition to Z and C to reflect the result of the operation.
RLC (Rotate accumulator left)
[Dn+1]  [Dn], [D0]  [D7], [CY]  [D7
Each binary bit of the accumulator is rotated left by one position. Bit D 7 is placed in
the position of D0 as well as in the carry flag. The contents of bit D 7 are placed in bit
D0, and the Carry flag is modified accordingly. However, the contents of the carry are
not placed in bit D0 as in instruction RAL. CY is modified according to bit D 7. S, Z, P,
AC are not affected.
RRC (Rotate accumulator right)
[Dn]  [Dn+1], [D7]  [D0], [CY]  [D0]
Each binary bit of the accumulator is rotated right by one position. Bit D 0 is placed in
the position of D7 as well as in the carry flag. The contents of bit D 0 are placed in bit
D7, and the Carry flag is modified accordingly. However, the contents of the carry are
not placed in bit Do as in instruction RAR. Cy is modified according to bit D 7. S, Z, P,
AC are not affected.
RAL (Rotate accumulator left through carry)
[An+1]  [An], [CY]  [A7], [A0]  [CY]
Each binary bit of the accumulator is rotated left by one position through the carry
flag. Bit D7 is placed in the bit in the carry flag and the carry flag is placed in the least
significant position D0. CY is modified according to bit D 7. S, Z, P, AC are not
affected.
RAR (Rotate accumulator right through carry)
[An]  [An+1], [CY]  [A0], [A7]  [CY]
Each binary bit of the accumulator is rotated right by one position through the carry
flag. Bit D0 is placed in the bit in the carry flag and the carry flag is placed in the least
significant position D7. CY is modified according to bit D 7. S, Z, P, AC are not
affected.
BRANCH GROUP
JMP 16 bit address (label) (Unconditional jump: jump to the instruction specified
by the operand)
[PC]  Label
The program sequence is transferred to the memory location specified by the 16-bit
address. This is a 3byte instruction, the second byte specifies the low order byte and
the third byte specifies the high order byte.
CONDITIONAL JUMP ADDR (LABEL)
OPCODE DESCRIPTION FLAG STATUS
JC jump on carry CY =1
JNC jump on no carry CY=0
JP jump on positive S=0
JM jump on minus S=1
JPE jump on parity even P=1
JPO jump on parity odd P=0
JZ jump on zero Z=1
JNZ jump on no zero Z=0
Flags: No flags are affected.
CALL 16-bit address (label) (Unconditional call: call the subroutine identified by the
operand)
[[SP] –1]  [PCH]
[[SP] –2]  [PCL]
[SP]  [SP] - 2
[PC]  ADDR (LABEL)
The program sequence is transferred to the address specified by the operand. Before
the transfer, the address of the next instruction to call the contents of the program
counter is pushed on the stack. No flags are affected.
CONDITIONAL CALL TO SUBROUTINE
OPCODE DESCRIPTION FLAG STATUS
CC call on carry CY=1
CNC call with no carry CY=0
CP call on positive S=0
CM call on minus S=1
CPE call on parity even P=1
CPO call on parity odd P=0
CZ call on zero Z=1
CNZ call on non zero Z=0
Flags: No flags are affected.
RET (Return form subroutine)
[PCL]  [[SP]]
[PCH]  [[SP] + 1]
[SP]  [SP]+ 2
The program sequence is transferred from the subroutine to the calling program. The
two bytes from the top of the stack are copied into the program counter and the
program execution begins at the new address. The instruction is equivalent to pop
program counter. No flags are affected.
CONDITIONAL RETURN
[PCL]  [[SP]]
[PCH]  [[SP] + 1]
[SP]  [SP]+ 2
OPCODE DESCRIPTION FLAG STATUS
RC return on carry CY=1
RNC return with no carry CY=0
RP return on positive S=0
RM return on minus S=1
RPE return on parity even P=1
RPO return on parity odd P=0
RZ return on zero Z=1
RNZ return on no zero Z=0
Flags: No flags are affected.
RST n (Restart)
[[SP] - 1]  [PCH]
[[SP]-2]  [PCL]
[SP]  [SP]- 2
[PC]  8 times n
The RST instructions are equivalent to 1-byte call instructions to one of the eight
memory locations on page 0. The instructions are generally used in conjunction with
interrupts and inserted using external hardware. However, these can be used as
software instruction in a program to transfer program execution to one of the eight
locations. No flags are affected.
PCHL (jump to address specified by H-L PAIR)
[PC]  [H-L]
[PCH]  [H]
[PCL]  [L]
The contents of register H and L are copied into the program counter. The contents of
H are placed as a high order byte and of L as a low order byte. No flags are affected.
STACK I/O AND MACHINE CONTROL GROUP
IN port address (Input to accumulator from I/O port)
[A]  [Port]
The contents of the input port designated in the operand are read and loaded into the
accumulator. No flags are affected.
OUT port address (Output from accumulator to I/O port)
[A]  [Port]
The contents of the accumulator are copied into the I/O port specified by the operand.
No flags are affected.
PUSH (push the content of register pair to stack)
[[SP]-1]  [rh]
[[SP]-2]  [rl]
[SP]  [SP] – 2
The contents of the register pair designated in the operand are copied into the stack
in the following sequence. The stack pointer register is decremented and the
contents of the high order register B, D, H, A is copied into that location. The stack
pointer register is decremented again and the contents of the low order register C, E,
L flags are copied to that location. No flags are affected.
PUSH PSW (push processor status word)
[[SP]-2]  PSW
[[SP]-1]  [A]
[SP]  [SP] – 2
The content of the accumulator is pushed into the stack. The contents of status flags
are also pushed into the stack. The content of the register sp is decremented by 2 to
indicate new stack top.
POP Rp ( Pop the content of register pair, which was saved, from the stack)
[rl]  [[SP]]
[rh]  [[SP[+1]
[SP]  [SP]+ 2
The contents of the memory location pointed out by the stack point register are
copied to the low order register of the operand. The stack pointer is incremented by
one and the contents of that memory location are copied to the high order register of
the operand. The stack pointer register is again incremented by one. No flags are
affected.
POP PSW (Pop processor status word)
PSW  [[SP]]
[A]  [[SP]+1]
[SP]  [SP] + 2
The processor status word, which was saved earlier during the execution of the
program, is moved from the stack to PSW. The content of the accumulator, which
was also saved, is moved from the stack to the accumulator.
HLT (HALT and enter wait state)
The MPU finishes executing the current instruction and halts any further execution.
The MPU enters the halt acknowledge machine cycle and wait states are inserted in
every clock period. The address and the data bus are placed in a high impedance
state. The contents of the registers are unaffected during the halt state. An interrupt
or reset is necessary to exit from the halt state. No flags are affected.
XTHL (Exchange stack top with HL)
[L]  [[SP]]
[H]  [[SP] + 1]
The contents of the L register are exchanged with the stack location pointed out by
the contents of the stack pointer register. The contents of the H register are
exchanged with the next stack location (SP + 1) however; the contents of the stack
pointer register are not altered. No flags are affected.
SPHL (Move the contents of HL pair to stack pointer)
[HL]  [SP]
The instruction loads the contents of the H and L register into the stack pointer
register, the contents of the H register provide the high order address and the
contents of the L register provide the low order address. The contents of the H and L
registers are not altered. No flags are affected.

EI (ENABLE INTERRUPT)
This is a one-byte instruction.
The instruction sets the interrupt enable flip flop and enables the interrupt process.
System reset or an interrupt disables the interrupt process.
DI (DISABLE INTERRUPT)
This is a one-byte instruction.
The instruction resets the interrupt enable flip flop and disables the interrupt.
It should be included in a program segment where an interrupt from an outside
source cannot be tolerated.
SIM (Set Interrupt Mask)
This is a one-byte instruction.
This instruction reads the contents of the accumulator and enables or disables the
interrupts according to the contents of the accumulator.
Bits D7 and D6 of the accumulator are used for serial I/O and do not affect the
interrupts. D6=1 enables the serial I/O
Bit D3 is a control bit and should =1, in order for bits D 0, D1 and D2 to be effective.
Logic 0 in D0, D1 and D2 will enable the corresponding interrupts, and logic 1 will
disable the interrupts.
Bit D4 is additional control for the RST 7.5. If D 4=1. The RST 7.5 flip-flop is reset. This
is used to override RST 7.5 without servicing it.
RIM (Read interrupt mask)
This is a one byte instruction
This instruction loads the accumulator with eight bits indicating the current status of
the interrupt masks, the interrupt enable, pending interrupts, and serial input data.
NOP (No Operation)
No operation is performed. The instruction is fetched and decoded however no
operation is executed. No flags are affected;

Stack:
 A set of memory location in the R/W memory, specified by a programmer in a
main program.
 Used to store binary information temporarily during the execution of a program.
 Stack follows Last In First Out (LIFO)
  The stack is shared by the programmer and the microprocessor. The
programmer can store and retrieve the contents of a register pair by using
PUSH and POP instructions.
 The microprocessor automatically stores the contents of the program counter
when a subroutine is called.
 The stack space grows upward in the numerically decreasing order of memory
addresses
 The stack can be initialized anywhere in the user memory map.
 A programmer can employ the stack to store contents of register pairs by using
the instruction PUSH and can restore the contents of register pairs by using the
instruction POP.
 The address in the stack pointer register is always points to the top of the stack
and the address is decremented or incremented as information is stored or
retrieved.

Example: LXI SP, 8FFFH

PUSH PSW
PUSH B
PUSH D
PUSH H
.
.
.
.
POP H
POP D
POP B
POP PSW

SUBROUTINE
 A subroutine is a group of instructions written separately from the main
program to perform a function that occurs repeatedly in the main
program.
 The 8085 microprocessor has two instructions to implement subroutines:
CALL and RET instructions
 The CALL instruction is used in the main program to call a subroutine.
 The RET instruction is used at the end of the subroutine to return to the
main program.
 When a subroutine is called, the contents of the program counter, which
is the address of the instruction following the CALL instruction. Is stored
on the stack.
 The program execution is transferred to the subroutine address. (Ex: CALL
2000)
 When the RET instruction is executed at the end of the subroutine, the
memory address stored on the stack is retrieved and the sequence of
execution is continued in the main program.
 The programming technique of a subroutine calling another subroutine is
called nesting.

Simple Programs:
Find the larger Number in a Data Array
XRA A
LXI H, 8000 Initialize memory location into HL pair
MOV B, M B register used as counter
LOOP: INX H Address of next number
CMP M Compare next number with previous number
JNC GENT No, larger number is in accumulator Go to
The label GENT
MOV A, M Yes, get larger number in accumulator
GENT: DCR B Decrement count
JNZ LOOP
STA 8050H Store result in 8050H
HLT

DATA:
8000 – 03
8001 – 3F
8002 – EA
8003 – FF
Result:
8050 – FF
Find the smallest Number in a Data Array
LXI H, 8000 Initialize memory location into HL pair
MOV B, M B register used as counter
MVI A, FFH
LOOP INX H Address of next number
CMP M Compare next number with previous number
JC GENT No, larger number is in accumulator Go to
The label GENT
MOV A, M Yes, get larger number in accumulator
GENT DCR B Decrement count
JNZ LOOP
STA 8050H Store result in 8050H
HLT

DATA:
8000 – 03
8001 – 3F
8002 – EA
8003 – FF
Result:
8050 – 3F
8-bit Addition
LXI H, 8000H Initialize memory location to HL pair
MOV A, M
MVI C, 00H
INX H Address of next data in HL pair
ADD M Previous data value add with next data
JNC DDE Is carry? No, go to DDE
INR C Yes, add carry to MSBs of sum
DDE: STA 8050H Store LSBs of the sum in 8050H
MOV A, C Get MSB from C register to Accumulator
STA 8051H Store MSBs of sum in 8051H
HLT End

DATA: Result:

8000 = FF H 8050 = 00 H
8001 = 01 H 8051 = 01 H
8-Bit Subtraction
LXI H, 8000H Address of count in HL pair
MOV A, M Get first byte from memory
INX H Address of second byte
SUB M Subtract second byte from first byte
INX H Increment HL pair
MOV M, A Store result
HLT End
DATA:
8000 = 65 H
8001 = 54 H
Result
8002 = 11 H
8-BIT DIVISION
LXI H, 8000
MOV B, M ; Get the dividend in B - reg.
MVI C, 00 ; Clear C - reg for quotient
INX H ; Increment HL pair of registers
MOV A, M ; Get the divisor in A - reg
 NEXT: CMP B ; compare A - reg with register B.
JC LOOP ; Jump on carry to LOOP
SUB B ; subtract A - reg from B - reg.
INR C ; Increment content of register C.
JMP NEXT ; Jump to NEXT
LOOP: STA 8002 ; Store the remainder in Memory
MOV A, C ; Move Content of C - Reg to A - Reg
STA 8003 ; Store the quotient in memory
HLT ; End of the program.

DATA:
8000= 08H
8001= 03H
Output:
8002= 02H (Remainder)
8003= 02H (Quotient)
8-BIT MULTIPLICATION
LHLD 8000H : Get the multiplicand in HL register pair
XCHG : Move data from HL to DE register pair
LDA 8002H : Get multiplier in A register
MOV C, A : Initialize counter
LX I H, 0000 H : Result = 0000
BACK: DAD D : Result = result + multiplicand
DCR C : Decrement count (multiplier)
JNZ BACK : If count 0 repeat
SHLD 8003H : Store result
HLT
Data: 8000 = FFH
8001 = 00H
8002 = FFH
Result: 8003 = 01H (LSB)
8004 = FEH (MSB)
SUM OF ‘N’ NUMBERS
XRA A : Clear accumulator
MVI B, 00H : B Register is zero
LXI H, 8000H : Initialize Memory address into HL register pair
MOV C, M : C register is used for count register (total no. of bytes
added)
BACK: INX H : Get next memory location
ADD M : Accumulator = result + contents of memory location
 JNC LOOP : If carry, increment the B register
INR B
LOOP: DCR C : Decrement count (multiplier)
JNZ BACK : If count 0 repeat
STA 8020H : Store result
MOV A, C
STA 8020H
HLT

DATA
8000 – 03
8001 – 05
8002 – 0A
8003 – FF
Result: 8020 = 0EH (LSB)
8021 = 01H (MSB)