UNIVERSITY OF LAGOS a.

The data transfer rate is limited by the speed with

DEPARTMENT OF COMPUTER SCIENCES which the processor can test and service a device
POSTGRADUATE EXAMINATIONS b. The processor is tied up in managing an I-O transfer
FIRST SEMESTER 2015/2016 c. A number of instructions must be executed for each I-
O transfer
MIT 805 - COMPUTER SYSTEMS & ORGANIZATION d. All of the above
e. None of the above
MATRIC NUMBER __________________________
10 _____ lies in the heart of computing
Time Allowed: 2 Hours
Instructions: a. Processor b. computer
c. Memory d. data
1 Answer all questions in section A by shading the correct e. All of the above
answers on the OMR sheet provided. 11 One of the following statements is false __
a. A synchronous timing is triggered by a clock
2 Use the provided booklet to answer the questions in section
B, b. An asynchronous timing is triggered by a clock
3 Submit your OMR sheet after 40 minutes, the Question paper c. Event in asynchronous depends on the occurrence of a
and the booklet after the examination. previous events
d. Synchronous timing is easier to implement than
Questions asynchronous
e. None of the above
1 In order to avoid losing of burst of data from memory 12 The delay experienced when a device is busy with a
to devices, there is a device storage called ____ bottled-necked bus is called __
a Mass b Main c buffer a. Propagation delay
memory memory b. Queuing delay
d Cache e Register c. Latency rate
2 One is not a function of an I-O module ___ d. Service delay
a Report communication errors to the processor e. None of the above
b Spool data into its memory 13 Embedded processors are used in
c Liaise between the processor and the I-O devices a. Sensors b. Scanners
d Performing arithmetic instruction c. Ignition system d. Personal digital
e All of the above assistance
e. All of the above
3 Commands from the processor to the I-O module are 14 The first minicomputer vendor is attributed to
issued through ___ a. IBM Computers
a DMA B Control c System bus b. DEC computers
unit
c. INTEL computer
d I-O e PSW
devices d. All of the above
4 ______bus provides the path for moving data between e. None of the above
system modules 15 ARM architecture uses ____ processor technology
A Address bus B Control bus a. RISC
C System bus D Data bus b. CISC
E All of the above c. Logic gate
5 ______determines the maximum possible memory d. All of the above
locations of a computer system e. None of the above
A Address bus B Control bus 16 One is not a factor for classifying multicore
C System bus D systems
E All of the above a Number of core processors on a chip
6 The I/O READ and I/O WRITE are examples of b Number of shareable cache memories
signals that can be sent through c Number of cache memory levels
a Address bus B Data bus d Number of users allowed at a time
c Control bus D System bus e None of the above
e All of the above 17 What is a die?
a A type of social game played by network
7 One is a human readable category of I/O devices
jokers
a USB keys B Sensors b A strand of hair used in fibre cable
c VDU D Modern c A chip with more than one processors
e All of the above d All of the above
8 External devices are connected to the CPU except e None of the above
through ______ 18 In core Duo, APIC is an acronym for ____
a Serial ports B Parallel ports a Adaptive Programmable Interrupt Chip
c Mother board D USB ports b Advanced Processor interrupt Controller
c Adaptive Processor Interrupt Controller
e Mouse
d Advanced Programmable Interrupt
9 A drawback of programmed I-O and Interrupt-driven Controller
I-O is that __ e None of the above
 19 A common property with core Duo and corei7 31 With advancement in computer technology __ and ___
systems is the _______ features of computer system are rapidly increasing
a Use of same clock frequency a Capability and capacity
b Use of same L1 cache cycle b Memory and processing speed
c Use of same L2 cache cycle c Size miniaturilization and computer family
d All of the above
d All of the above
e None of the above
20 One of these is not a feature of modern systems e None of the above
a Presence of embedded systems 32 Each decade in computer technology brings these
b More than one processors except
c Parallel process execution a New b New C New services
d Process overlapping applications devices
e Monoprogramming d Eradicating e Coexistence of old and new
21 A difference between a multitasking and a old devices computer system
multiprogramming systems is that _____ 33 ___is considered as the mind of the computer system
a Multitasking requires multiprocessor setting A Processor b Memory
b Multiprogramming requires multiprocessor C Software d Hardware
setting E None of the above
c Both need the multiprocessor setting 34 ____ is the body of the computer system
d Both are possible with uniprocessor systems
a processor b Memory
e All of the above
22 A reason for the choice of parallel systems limited c software d Hardware
to ____ e All of the above
a Incremental growth Higher scale 35 _______is a vital component of any system
c High performance Scalability a output B Control
e None of the above c feedback D Input
23 One of these is found in the family of single e All of the above
instruction multi-data stream
36 For a music concert, ______serves as the processor
a Array processor b Cluster processor
c NUMA d SMP A keyboard B Microphone
e Uniprocessor C Amplifier D Speaker
24 The operating system provides one of the following E Tape deck
services except 37 This computer capability is made available through
a Process creation b Access to devices the stored program concept ________
c Process loading d Deadlock A the volatility of the main memory
resolution B The volatility of the processor register
e None of the above
c The use of the flash disk to hold data
25 A PDA device uses one of these operating systems
a Minix3 b UNIX d The presence of powerful processor to manipulate
c Windows 8 d Lantastic data
e OS/2 e All of the above
26 Little endian memory system is applicable to 38 One statement is true about a computer hard disk
a IBM systems b Intel systems a It resides in the computer casing
c SPARC systems d All of the above b It is made up of magnetic platter sealed in a metal
e None of the above case
27 A tradeoff between the choice of primary c It stores more than a diskette
memory and mass memory is that d It is a bit expensive than the blue ray
a Faster access, high capacity and high cost e All of the above
b Faster access, low capacity and l high cost
39 All kinds of input, output and external storage devices
c Low access, low capacity and high cost
are called
d Low access, low capacity and less cost
a Moore’s law B Peripheral
e None of the above
28 One of these can be used to classify c Stored-program d Coordinator
microprocessors concept
a The semiconductor technology used e None of the above
b The width of the data bus 40 The nerve centre where peripherals are connected for
c The instruction set of the system operation is the ______
d The family of the microprocessor a Controller B DMA
e All of the above c CPU D Memory
29 One of these supports embedded systems e All of the above
A Motorola 68EC11 b Motorola M6800 41 The speed of the microprocessor depends on____
C Intel 8086 d Intel 80186 A Size of hard disk
E All of the above
B Data path
30 One of these is not required by embedded systems
a Low power b High performance C Size of main memory
consumption D All of the above
c High integration d All of the above E None of the above
e None of the above 42 Computers may be classified by size. Which of the
following arrangements is correct?
 A Mini, Digital, Mainframe e Status register
B Mainframe, Minicomputer, Microcomputer 53 One of these I/O commands originates from
D Digital, Laptop, Mini processor to I/O module
a Control b Test
E None of the above
c Read d Write
43 A modern day computer is not expected to have____ e All of the above
a Multimedia features 54 A microprocessor evolution is driven by ______
b Artificial Intelligence a System’s b Amount of
c Pentium processor performance generated heat
d Parallel processing c The family of the d Instruction set
e Pentium II processor system
e All of the above
44 In order to execute I-O related instruction, the
55 A feature that distinguishes between an
processor issues one of the following commands to the
embedded system from a general purpose system
I-O module
does not include is
a An address specifying the particular I-O module
a Dedicated functions
b The external device concerned b Real-time operation
c The I-O command or operation c Size reduction
d All of the above d Dedicated microprocessor
e None of the above e None of the above
45 A number given to uniquely identify an I-O device is 56 The Operating system is an indispensable computer
called resource in that ___
a Address b Interrupt a. It manages the application software
number number b. It easily accommodates new technology
d Status e Dual Core c. It shields of usage complexities from the common
number users
46 An I-O module that takes detailed processing burden d. It recovers the running processes from deadlocks
from the main processor is the ___ e. All of the above
a I-O channel 57 Across the spectrum of memory hierarchy, one of
b I-O processor the following relationships holds
c DMA a. Faster access time, greater cost per bit
d All of the above b. Greater capacity, smaller cost per bit
e None of the above c. Greater capacity , slow access time
47 The device management technique that allows the d. The higher the volatility, the less the dependability
processor to have direct control of the I-O operations e. All of the above
is the ___ 58 The processor passes the following information to the
a Programmed I-O DMA to read a block of data except ___
b Direct Memory Device a A read control signal
c Interrupt-drivenI-O b The address of the I-O device that is involved
d Processor driven I-O c The starting location in memory to be read from
e All of the above d The number of words to be read
48 This class of software controls the computer hardware e None of the above
a McAffee B Operating System 59 A truth statement about the DMA I-O technique is
c Firewall D Translator that _____
e All of the above a The processor is involved only at the beginning of
49 One is true about communication devices data transfer
a Combinations of input/ output devices are used b The processor is involved at the end of data
transfer
b They convert discrete signals to continuous signal
c The processor is involved at the beginning and end
c They only deal with analog signal transmission of data transfer
d They connect remote devices d The processor is not involved during data transfer
e All of the above at all
50 One statement is true e All of the above
a Data can be stored on a short term only 60 The DMA technology was interfaced to ___ family of
b Data can be stored on a long term only Intel processor
a 8086 b 8088
c Data can be stored on both short- term and long-
term c 80186 d 8087
d Data viewed on a VDU are long-term stored e All the of the above
e All of the above 61 One of these statements is false _____
51 One of these is not an embedded system a The use that a device is put influences the policies
a Actuator b Sensor in the operating system
c Remote controller d Car tracker b The data transfer rate of peripherals is much
e None of the above slower to that of main memory
52 This device is used by all connected I/O devices c The device controller bridges the speed mismatch
a Data register b I/O logic unit between processor and devices
c Data bus d Control register
 d The word-length of devices are the same with the c Power PC G3 d Power PC 740/750
computer system’ s word-length e All of the above
e None of the above 73 This translator takes from high level language to
62 ____ interprets the instructions in memory and cause machine language
them to be executed in IAS computer system a C# b C++
a ALU b Accumulat c Control Unit c Visual BASIC d Python
or
e Java
d Memory e ROM
74 This describes the architecture of a computer system
63 ENIAC is a(an) ____ computer system
except
a Digital b Analog a Instruction format b I/O Module
c Mini d Micro c Instruction level d Instruction set
e Hybrid e Data representation
64 The stored-program concept was first implemented in 75 The booting programs reside in
___
a ROM b RAM
a ENIAC b EDVAC
c Hard disk d EPROM
c IAS d IBM
e All of the above
e All of the above
76 The operating system is responsible for
65 During multiplication arithmetic in IAS computer, the
most significant bits are stored in ____ register a Resource b Evolutionary support
a Multiplier quotient b Accumulator management
c Mediating between d Mediating between
c Program counter d Program Status Word
users and application programs
e Instruction Pointer hardware and hardware
66 During the fetch operation, the Op-code of the e All of the above
instruction is loaded in ____ register 77 One of these chips uses the most transistors
a Instruction Register a Pentium 4 b Pentium Pro
b Program Counter c Pentium I d Pentium III
c Accumulator e All of the above
d Memory Address Register 78 One is not quality of a CISC system
e Memory buffer Register a It has many instructions
b It has variable instruction format
67 A difference between a formal and an informal
c It has multiple register set
language is that
d It is less pipelined
a Number of possible operations that can be
e None of the above
expressed are few in formal language
79 One of these is a register
b Number of possible operations that can be
a Motorola D1 b Intel AX
expressed are infinite in formal language
c Intel EBX d Motorola A3
c Number of possible operations that can be
e All of the above
expressed are few in an informal language
80 A semiconductor technology used to build
d In formal, statements structures are infinite
microprocessors may fall into one of these
e None of the above a TTL b ECL
68 A repeated procedure for extracting data or c CMOS d All of the above
instruction from the memory is called ____ e None of the above
a Fetch cycle b Execute c Decode cycle
cycle
d Instruction e Processor cycle
cycle
69 The processor increments ___ register after the fetch SECTION B
of an instruction Instruction: Provide precise answers to the following
a PC b IR questions. Use your booklet.
c MAR d PSW
e MBR 1a.What are the categories of parallel systems? (4 marks)
70 The low level instruction ADD B, A does what?
a Stores the sum of memory locations A and B in b. Describe how the value 12456 is stored using i. big endian
accumulator
b Stores the sum of memory locations A and B in B
c Stores the sum of memory locations A and B in A and ii little endian (4 marks)
d Add letter A and letter B into letter B
e All of the above
71 A bus that connect major computer components is
called
2a. What are the basic processes attributable to computer
a Address bus b Data bus systems? (4 marks)
c Control bus d System bus
e All of the above b, At the integrated circuit level, what are the three principal
72 The IBM processor supports 500MHz clock speed constituents of a computer system? (3 marks)
a Power PC G4 b Power PC G5
3a. Of what use is the system bus? (2 marks)
b. List the categories of I/O devices and cite two devices in
each category. (3 marks)
.
SECTION C
Instruction: Answer only one question

1a. Differentiate between memory mapped I/O and isolated

I/O modes (3marks)

b. Discuss the main design issues attributed to parallel

systems (3 marks)

c. Discuss the hierarchy of computer memories stating their

strengths and weaknesses (4 marks)

2a. What are the characteristics of a symmetric

Multiprocessor (SMP) (3 marks)

b. Compare the design of core Duo with corei7 (3 marks)

c. Describe the procedure for an instruction cycle (4 marks)