0% found this document useful (0 votes)
4 views

Computer Architecture lab2

This document outlines Lab-1 for the Computer Architecture course at Namal University, focusing on RISC-V assembly language using the Ripes simulator. It includes instructions, objectives, learning outcomes, and specific lab tasks aimed at teaching students about assembly language concepts, arithmetic, data transfer, and logical instructions. The lab emphasizes practical experience with RISC-V programming and concludes with a reflection on the skills gained.

Uploaded by

bscs23f31
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
4 views

Computer Architecture lab2

This document outlines Lab-1 for the Computer Architecture course at Namal University, focusing on RISC-V assembly language using the Ripes simulator. It includes instructions, objectives, learning outcomes, and specific lab tasks aimed at teaching students about assembly language concepts, arithmetic, data transfer, and logical instructions. The lab emphasizes practical experience with RISC-V programming and concludes with a reflection on the skills gained.

Uploaded by

bscs23f31
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 11

Spring 2025 CA Lab-1

Namal University, Mianwali


Department of Computer Science
CSS-242L – Computer Architecture (Lab)

Lab -1

Introduction to RISC-V Assembly Language Using Ripes Simulator

Student’s Name

Roll No.

Date Performed

Marks Obtained

Course Instructors: Lab Instructor:


Dr. Shafiq Ur Rehman Khan Engr. Majid Ali

1|Page
Spring 2025 CA Lab-1

Document History
Rev. Date Comment Author
1.0 24/02/2025 Initial draft Engr. Majid Ali

Instructions
 Read the manual carefully before start of any tasks / experiments.

 Carefully handle all equipment available in the lab.

 Carefully write your particulars at first page on the manual.


 In case of simulation at PC, try to avoid opening of unnecessary tabs.
 Submit PDF report of each lab at Q-OBE, attach all findings in report properly.
 Write precise conclusion of every lab.
 Submission time is end of respective lab session for each manual, late submission of
manual is not acceptable.
 Fill manual individually even in case of group work.
 Plagiarism will be dealt with strict consequences.

Objectives
By the end of this lab, students will be able to learn about

 Understand basic assembly language concepts.


 Learn about registers, memory operations and arithmetic instructions.
 Get familiar with the Ripes simulator.
 Write and run simple RISC-V assembly programs.
 Observe how instructions affect registers and memory.
Learning Outcomes
This lab satisfies the following learning outcomes of the course:
 CLO1: Follows fundamental computer architecture concepts through practical
laboratory exercises, following theoretical knowledge to design, measure, and
evaluate the performance of simulated architectural components.
 CLO3: Present concise and comprehensive technical reports.

2|Page
Spring 2025 CA Lab-1

Equipment & Components


 Computer with Ripes simulator installed.

Introduction to RISC-V Assembly Language


Assembly language is a low-level programming language that represents instructions and data
in a format that can be directly understood and executed by a computer's central processing unit
(CPU). It's the closest human-readable form of machine code. In assembly language:
 Commands are expressed as simple mnemonics, like ADD, MOV, and JMP, making it more
human-readable than pure machine code.
 Instructions manipulate registers and memory directly, offering fine-grained control over a
computer's hardware.
 It's specific to a computer architecture, meaning code written for one type of CPU won't
work on another without modification.
 Assembly language is used for tasks where low-level hardware control, optimization, and
real-time performance is essential, such as in operating systems, device drivers, and
embedded systems.
 It requires a deep understanding of a computer's architecture and is less portable and more
complex compared to high-level programming languages like C++ or Python

Arithmetic Instructions
Arithmetic instructions in RISC-V assembly are used to perform mathematical operations on
data stored in registers. Common arithmetic operations include addition, subtraction,
multiplication, and division. These instructions manipulate integer values and are fundamental
to many programming tasks.

Data Transfer Instructions


Data transfer instructions handle the movement of data between registers and memory. In RISC-
V, common instructions include LW (Load Word) and SW (Store Word), which allow
programmers to load data from memory into registers and store data from registers back to
memory.

Logical Instructions
Logical instructions perform bitwise operations on data in registers. These operations include
AND, OR, XOR, and NOT, allowing programmers to manipulate individual bits within a data
word. Logical instructions are essential for tasks such as masking, setting, and clearing specific
bits.

3|Page
Spring 2025 CA Lab-1

Fig 1: RISC-V arithmetic, data transfer and logical instructions

Ripes Introduction
Ripes is an educational RISC-V simulator designed to facilitate the understanding and learning
of computer architecture and assembly programming. It provides an intuitive graphical interface
that allows users to visualize and interact with the execution of RISC-V assembly programs.

Fig 2: Ripes Editor Tab

4|Page
Spring 2025 CA Lab-1

Lab Tasks

5|Page
Spring 2025 CA Lab-1

Task-1
 Launch the Ripes simulator on your computer.
 Select “New Program” to start a new project.
 Load the code assembly code into the code editor
 Select Processor Type “Single Cycle Processor”.
 Run the Program.
 Check the Value in Register x23.

Similarly, do the same for subtraction instructions using different registers.

Code:

.text
addi x20, x0, 10 # store immidiately by adding value of x0 (0) and 10 and in the x20
addi x21, x0, 0 # store immidiately by adding value of x0 (0) and 0 and in the x21
addi x22, x0, 20 # store immidiately by adding x0 and 20 in x22

sub x23, x20, x22 # store by subtracting x22 from x20 values in x23

Output:

Execution Information:

Explanation:

This code initializes registers x20, x21, and x22 with the values 10, 0, and 20 respectively.
It then computes the difference between x20 and x22, storing the result in register x23.

6|Page
Spring 2025 CA Lab-1

Task-2: Implement assembly code in editor and show what value is appearing at the given
address used in the code in the memory.

Code:

.text
addi x18, x0, 2 # store immidiately by adding 2 and x0 in x18
addi x19, x0, 3 # store immidiately by adding 3 and x0 in x19
add x20, x18, x19 # store value in x20 by adding values of x18 and x19
sw x20, 8(x0) # store value of x20 in x0 at address 8

Memory Output:

Output:

Explanation:

This code is storing by adding x0 and 2 in x18, by adding 3 and x0 in x19. Then it add x18 and x19
and storing it in x20. And store value of x20 in x0 at offset of 0+8.

Task-3: Run this code and observe the register values:

Code:
.text
addi x18, x0, 5 # store immidiately value by adding 5 and value of x0
addi x19, x0, 3 # store immidiately value by adding 3 and value of x0
and x20, x18, x19 # performs AND operation on the values of x18 and x19 in binary
store result in x20
or x21, x18, # performs OR operation on the values of x18 and x19 in binary and
store in x21
xor x22, x18, x19 # performs XOR on values of x18 and x19 in binary store in x2

7|Page
Spring 2025 CA Lab-1

Output:

Execution Information:

Explanation:
This code initializes registers x18 and x19 with the values 5 and 3, respectively. It then
performs bitwise AND, OR, and XOR operations on these two values, storing the results in
registers x20, x21, and x22.

8|Page
Spring 2025 CA Lab-1

Task-4: Implement a simple assembly language program and show the pipelining diagram
from the processor tab.
 Use Pipelined processor option for this task.
 Explain the code in your words on your own understanding level.
 Notice the values in the memories.

Code:

.text
addi x18,x0,2 # store immidiately by adding value of x0 (0) and 2 and in the x18
addi x19,x0,3 # store immidiately by adding value of x0 (0) and 3 and in the x19
add x20,x18,x19 # store immidiately by adding values of x18 and x19
sw x20, 0(x0) # store values of x20 in x0 by the offset of 0
sw x18, 4(x0) # store values of x18 in x0 by the offset of 4
sw x19, 8(x0) # store values of x19 in x0 by the offset of 8

Output:

Execution Information:

Memory Output:

9|Page
Spring 2025 CA Lab-1

Explanation:
This code initializes registers x18 and x19 with the values 2 and 3, respectively, and
calculates their sum, storing it in register x20. It then saves the values of x20, x18, and x19
to memory at offsets 0, 4, and 8 from the address in x0.

Conclusion:
In this lab, I have learned the basics of RISC-V assembly language using the Ripes simulator. I
practice writing and executing simple programs that describes arithmetic and data transfer
instructions. I gained a better understanding of register and memory flow of execution. Overall,
this lab helped me develop practical knowledge in assembly programming and enhance my
technical knowledge in Ripes Simulator.

10 | P a g e
Spring 2025 CA Lab-1

Domain Criteria Excellent (10) Good (8-9) Satisfactory (6-7) Improvement (4-5) Marks
Obtained
Successfully Successfully Had difficulty Did not complete tasks
Assembly completed tasks with completed tasks completing tasks and and struggled with lab
Psychomotor Programming understanding and but with some used lab equipment equipment
(P3) (CLO-1) good use of understanding with errors.
equipment. gaps

Presented outstanding Presented Provided basic Unable to answer


Report and detailed reports. comprehensive answers in reports questions and had
Writing reports with some with limited significant knowledge
(CLO-3)
Affective (A2)

minor gaps. knowledge gaps. gaps.

Answered questions Answered Answered questions Unable to answer


confidently and questions with basic questions and was not
Lab Viva showed exceptional comprehensively understanding and confident.
(CLO-3) knowledge and and exhibited limited knowledge.
comprehension. strong knowledge

11 | P a g e

You might also like