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Lecture 3,4

This lecture provides an overview of computer organization, detailing the structure and function of computer components, including the CPU, memory, and I/O modules. It explains the instruction cycle, types of registers, and the role of interrupts in processing. Additionally, it discusses the interaction between the operating system and hardware, as well as communication between networked systems.

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0% found this document useful (0 votes)
9 views

Lecture 3,4

This lecture provides an overview of computer organization, detailing the structure and function of computer components, including the CPU, memory, and I/O modules. It explains the instruction cycle, types of registers, and the role of interrupts in processing. Additionally, it discusses the interaction between the operating system and hardware, as well as communication between networked systems.

Uploaded by

23-20911-066
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer Organization and Assembly Language

Week: 2
Introduction to Computer System

Discipline: BSCS
Instructor: Misbah Shahid
Lecture Outline

✧ Computer Structure and Function


▪ Instruction Fetch and Execute
▪ Interrupts
▪ I/O Functions
✧ Bus Interconnection
✧ OS interaction with hardware
✧ Networked system communication
Computer Structure & Function

✧ Structure is the way in which components relate


to each other
✧ Function is the operation of individual
components as part of the structure.
▪ Data processing
▪ Data storage
▪ Data movement
▪ Control
Computer Structure - Top Level
Structure : CPU
Structure- Control Unit
Functional view of the Computer

The computer system must be


able to process data, store data
and move data b/w itself and the
outside world.

A control unit manages the


computer’s resources and
performance of its functional parts
in response to some instructions.

This figure depicts the four


possible types of operations.
Operations:
(1) Data movement (2) Storage
Operations: Processing from/to Storage
Operations: Processing from Storage to I/O
What is a program?

✧ A sequence of steps
✧ For each step, an arithmetic or logical operation is
done
✧ For each operation, a different set of control signals
is needed
Levels of Representation

High Level Language temp = v[k];


Program v[k] = v[k+1];
Compiler v[k+1] = temp;
mov ax, bx
Assembly Language add bx, cx
Program int al, 21
sw $15, 4($2)
Assembler
0000 1001 1100 0110 1010 1111 0101 1000
Machine Language 1010 1111 0101 1000 0000 1001 1100 0110
Program 1100 0110 1010 1111 0101 1000 0000 1001
0101 1000 0000 1001 1100 0110 1010 1111

Machine Interpretation

Control Signal ALUOP[0:3] <= InstReg[9:11] & MASK


Specification
Computer Components

✧ The Control Unit and the Arithmetic and Logic Unit constitute the
▪ Central Processing Unit
✧ Data and instructions need to get into the system and results out
▪ Input/output
✧ Temporary storage of code and results, is needed
▪ Main memory
Computer Components: Top Level View
Register

• Registers are a type of computer memory used to


quickly accept, store, and transfer data and instructions
that are being used immediately by the CPU.
• Register is a small, high speed memory in side CPU
• CPU contain a number of register
• Register size determine how much information it can
store
• A register can be of 1,2,3,4 or 8 byte
• Bigger the size increase the performance
Types of Registers

• Special purpose register

• General purpose register


General purpose register: Accumulator register

✧ It is generally used for arithmetical and logical


instructions
✧ It is of 16 bits and is divided into two 8-bit registers
AH and AL to also perform 8-bit instructions.
General purpose register: Base Register

• It is used to store the value of the offset and Data


Movement
• It is of 16 bits and is divided into two 8-bit registers
BH and BL to also perform 8-bit instructions
General purpose register: Counter Register

• It is used for counting purpose


• It is used in looping and rotation.
• it is of 16 bits and is divided into two 8-bit registers
CH and CL to also perform 8-bit instructions.
General purpose register: Data Register

• It is used in multiplication an input/output port


addressing.
• It is of 16 bits and is divided into two 8-bit
registers DH and DL to also perform 8-bit
instructions.
Special purpose register: Memory Address
Registers (MAR)

• It holds the address of the location to be accessed


from memory.
• When CPU want to read or write data in memory it
store the address of that memory location in this
register
Special purpose register: Memory Buffer
Registers (MBR)

✧ MBR register is used to store the data coming


from memory or going to memory
Special purpose register: Program Counter (PC)

• Program Counter (PC) is used to contains the memory


address of the next instruction to be fetched.
• PC points to the address of the next instruction to be
fetched from the main memory when the previous
instruction has been successfully completed.
• Program Counter (PC) also functions to count the
number of instructions.
Special purpose register: Instruction Register
(IR)

✧ It is the register which holds the instruction which is


currently been executed.
Special purpose register: Stack pointer register

• A stack is set of memory locations in which data is


stores and retrieved in an order .
• This order is called last in first out (LIFO).
• Stack pointer register is used to manage stack in
computer
Computer Function- Instruction Cycle

✧ Basic function is execution of a program, which consists of a set of


instructions stored in memory
✧ Each instruction processing (Inst. cycle) consists of two steps:
1. Fetch Instruction (Fetch Cycle)
2. Execute this Instruction (Execute Cycle)

Instruction Cycle
Fetch Cycle

✧ At beginning, Processor fetches instruction from


memory location pointed to by PC.
✧ Program Counter (PC) holds address of next
instruction to fetch.
✧ Increment PC, so that it will fetch next instruction in
sequence.
✧ Instruction loaded into Instruction Register (IR)
✧ Processor interprets instruction and performs required
actions.
Execute Cycle

The processor interprets inst. & performs required actions, that


fall into four categories:
✧ Processor-memory
▪ Data transfer between CPU and main memory
✧ Processor I/O
▪ Data transfer between CPU and I/O module
✧ Data processing
▪ Some arithmetic or logical operation on data
✧ Control
▪ Alteration of sequence of operations
▪ e.g. jump, i.e. fetch an instruction from location 49,
which specifies that next inst. be from 82, by setting
PC to 82, so next instruction is from 82 rather than 50
location
Example of Program Execution

Instruction 1

Instruction 2

Instruction 3

3 Fetch Cycles 3 Execute Cycles


Instruction Cycle - State Diagram
Interrupts

✧ Mechanism by which other modules (e.g. I/O) may interrupt


normal sequence of processing
✧ Some common classes of interrupts are:
▪ Program
• e.g. arithmetic overflow, division by zero, out of
bound memory,
▪ Timer
• Generated by internal processor timer
• Used in preemptive multitasking
▪ I/O
• from I/O controller
▪ Hardware failure
• e.g. a power failure
Interrupt Cycle

✧ Added to instruction cycle


✧ Processor checks for interrupt
▪ Indicated by an interrupt signal
✧ If no interrupt, fetch next instruction
✧ If interrupt pending:
▪ Suspend execution of current program
▪ Save context
▪ Set PC to start address of interrupt handler routine
▪ Process interrupt
▪ Restore context and continue interrupted program
Transfer of Control via Interrupts
Instruction Cycle with Interrupt
Instruction Cycle with Interrupt-State Diagram
Multiple Interrupts

✧ Disable interrupts
▪ Processor will ignore further interrupts whilst
processing one interrupt
▪ Interrupts remain pending and are checked after
first interrupt has been processed
▪ Interrupts handled in sequence as they occur
✧ Define priorities
▪ Low priority interrupts can be interrupted by higher
priority interrupts
▪ When higher priority interrupt has been
processed, processor returns to previous interrupt
Multiple Interrupts-Sequential
Multiple Interrupts-Nested
Time Sequence of Multiple Interrupts
Interconnection Structures

✧ Collection of paths connecting various modules is called


interconnection structure.
✧ As computer consists of a set of components or modules of three
basic types i.e.,
▪ Processor (CPU)
▪ Memory
▪ Input/Output
Computer Modules (Input and output for each
module type)
1) Memory module:
-consists of N words of equal length
-each word is assigned a unique numerical
address (0, 1, ….N-1)
-a word of data can be read from or written
into memory
-nature of op is indicated by read, write
control signals, location is specified by an
address
2) I/O module:
-similar to memory module, two op read and
write
-I/O module may control more than one
external device, each interface is called port
with unique address
3) Processor module:
-reads in inst and data, writes out data after
processing, uses control signals to control
overall op of system. It also receives
interrupt signals
Buses

✧ A communication pathway connecting two or more devices


✧ It is a shared transmission medium
✧ Multiple devices connect to bus
✧ Only one device at a time can successfully transmit, e.g. an
8-bit unit of data can be transmitted over eight bus lines
✧ Computer systems contains a number of different buses
that provide pathways b/w components at various levels of
computer system hierarchy.
System Bus

A bus that connects major computer components


(processor, memory, I/O) is called a system bus.

Structure
✧ A system bus consists of from about 50 to hundreds of
separate lines, each line is assigned a particular
meaning or function
✧ Commonly the bus lines can be classified into three
functional groups i.e. data lines, address lines and
control lines.
Data Bus

✧ Carries data or Provide a path for moving data b/w


system modules
✧ Data bus may consists of from 32 to hundreds of
separate lines
✧ No. of lines being referred to as Width of data bus,
each line carry 1-bit, so no. of lines determined how
many bits can be transferred at a time, i.e. Width is a
key determinant of performance
✧ If data bus is 8-bits wide, each inst. is 16-bits long, then
processor must access memory module twice during
each instruction cycle
Address Bus

✧ Identify the source or destination of data on the data


bus
✧ e.g. if processor needs to read a word of data from
memory, it puts address of desired word on address
bus.
✧ Bus width determines maximum memory capacity of
system
✧ Address bus are also used to address I/O ports
Control Bus

✧ are used to control the access to and use of data and address
lines
✧ Control lines transmit both command and timing info b/w system
modules, timing signals indicate validity of data and address info,
command signals specify operations to be performed, e.g.

▪ Memory write signal (causes data on bus to be written into


addressed location)
▪ Memory read signal (causes data from addressed location
to be places on bus)
▪ I/O read/write signal, Transfer ACK
▪ Bus request (a module needs to gain control of the bus)
▪ Bus grant (module has been granted control of the bus)
▪ Interrupt request (indicates that an interrupt is pending)
▪ Clock signals (used to synchronize operations)
▪ Reset (initialize all modules)
Bus Interconnection Scheme
Operating System interaction with hardware

✧ OS - a layer of software interposed between the application


program and the hardware.

✧ Two primary goal


▪ Protect resources from misuse by applications
▪ Provide simple and uniform mechanisms for manipulating
low-level hardware devices.
OS Abstractions

✧ Files - abstractions of I/O devices


✧ Virtual Memory - abstraction for main memory and I/O
devices
✧ Processes - abstractions for processor, main memory, and
I/O devices
Systems Communicate with Other Systems

✧ Talking to other systems


✧ Network is treated as another I/O device
✧ Many system-level issues arise in presence of network
▪ Coping with unreliable media
▪ Cross platform compatibility
▪ Complex performance issues
Summary

This lecture covered computer organization, focusing on


the fundamental components and operations of a
computer system, including instruction execution, the
processor's role, and system interconnections.

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