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Sample Copy of Part a (Adc) (1)

The document outlines various topics related to transistors, including their construction, configurations, applications, and comparisons with MOSFETs. It also covers sequential circuits, memory classifications, logic families, data converters, and includes sample questions for assessment. The content is structured into chapters and subtopics, providing a comprehensive overview of analog and digital circuit applications.

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harshsingh3364
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© © All Rights Reserved
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Download as XLSX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
2 views

Sample Copy of Part a (Adc) (1)

The document outlines various topics related to transistors, including their construction, configurations, applications, and comparisons with MOSFETs. It also covers sequential circuits, memory classifications, logic families, data converters, and includes sample questions for assessment. The content is structured into chapters and subtopics, providing a comprehensive overview of analog and digital circuit applications.

Uploaded by

harshsingh3364
Copyright
© © All Rights Reserved
Available Formats
Download as XLSX, PDF, TXT or read online on Scribd
You are on page 1/ 30

Chapter No.

Chapter Name Sub Topic Topic Name


Transistor construction NPN ,
1 Transistor-BJT 1.1 PNP and Principle of working

Transistor configurations and


1.2 its Characteristics (CE), CB, CC

2 Applications specific to diffe 2.1 Transistor as a switch


Design of transistor circuit to
2.2 drive LED, Relay, DC motor

Difference between MOSFET


3 Introduction to MOSFET 3.1 and BJT

Types of MOSFET and


3.2 Configurations
Open Collector,Open drain
4 Significance of output config 4.1 cinfiguration and advantages

Totem pole output


4.2 configuration

Fsat switching
4.3 transistor(schottky diode)

5 Data selection and Distributi 5.1 Multiplexer

5.3 Block diagram and output equation

5.4 Demultiplexer
Block diagram and output
equation

5.6

6 Sequential Circuits 6.1 Asynchronous Counters

6.2 Synchronous counters

Synchronous UP/DOWN
6.3 counters

Shift register:
6.5 SISO,SIPO,PIPO,PISO
7 Memories 7.1 Classification of memories

7.2 ,7.3 SRAM AND DRAM

7.4,7.5 NOR RAM,Flash memory

8 Logic Family 8.1 LOGIC FAMILY

fan in,fanout,propagation
delay,noise margin,power
8.2 dissipation

9 Data converters 9 Analog to digital converter

9.1 Successive Approximation

9.2 Flash ADC

9.3 Ramp type converters


Binary weighted Resistance
9.4 conerters

9.5 R-2R Ladder type converter


SAMPLE COPY OFPART A
SEMESTER : II SUBJECT :Application of Analog and D
CHOOSE THE CORRECT ANSWER
Questions

A transistor
The number of depletion layers in a transistor is …………

The base of a transistor is ………….. doped


The element that has the biggest size in a transistor is ………………..
The transistor was invented in
In a NPN transistor, the N-regions are_____________
The emitter current is always_____________________
In NPN Transitor current conduction is mainly due to the flow of
In PNP Transitor current conduction is mainly due to the flow of
The most of the majority carriers from the emitter ……………
What kind of device does the following symbol represent?

In
The--------- transistor,forthe
bias condition arrowhead
a transistor toinbethe emitter
used region point outwards.
as a linear
amplifier is_____________________

The eqation of alpha =


In a transistor ………………..
In CC configuration ………... terminal is Common to both input and output
The relation between β and α is …………..
The value of β for a transistor is generally ………………..
The most commonly used transistor arrangement is …………… arrangement
. The phase difference between the input and output voltages in a common emitter arrangement is …………….

In which region a transistor acts as an open switch?


In which region a transistor acts as a closed switch?
Which of the following circuits act as a switch?

The current which is helpful for LED to turn on is_________

Which of the following statements is true?

The technique used to quickly switch off a transistor is by_________


The switching power with a PNP transistor is called _________
A pnp transistor has

The time taken for a transistor to turn from saturation to cut off is _________
The base emitter voltage in a cut off region is _________

A relay is used to
Which of the following rule is used to determine the direction of rotation of D.C motor?

MOSFETs as compare
iv) The MOSFET to BJT
has lower has
switching losses than that of a BJT

MOSFETs as compare to BJTs consumes


The MOSFET stands for
The MOSFET combines the areas of _______ & _________
Which of the following terminals does not belong to the MOSFET?

Choose the correct statement

Choose the correct statement

The arrow on the symbol of MOSFET indicates

The depletion N-channel MOSFET

The enhancement N-channel MOSFET

The enhancement MOSFET is


In MOSFETs N-channel is more preferred than P-channel because
THE E-MOSFET Transistor are the abbrevation of

The N-channel MOSFET is considered better than the P-channel MOSFET due to its
An open-collector output requires---------------------

An open collector ouput can---------current ,but it cannot-----------------.


which of the following is the other name for Common Drain Amplifier?
which of the following is true about common Drain amplifier?

pull down resistor always connected to


Totem-pole outpit,also known as a
pull up resistor is an example of
Resistor which holds the logic signal near zero volts when no other active device is
connected is called
Active pull up has element called
Which of the following are not characteristics of TTL logic gates?
A TTL totem -pole circcuits is designed so that the output transistor

Schottky diode operate only with


schottky diode has junction made up of
Schottky diodes are also known as
Diode used primarily in high frequency devices and fast switching application is called
which Statement is correct for schottky diode

Diode formed by joining a doped semiconductor region with a metal such as gold,silver or
platinum is
What is a multiplexer?

Multiplexers are also called__________


If the number of n selected input lines is equal to 2^m then it requires _____ select lines.
4 to 1 MUX would have

The enable input is also known as ___________


How many NOT gates are required for the construction of a 4-to-1 multiplexer?
In a multiplexer the output depends on its
The two inputs MUX would have
If enable input is high then the multiplexer is
Demultiplexers are also called
In 1-to-4 demultiplexer ,how many select lines are required?
The word demultiplexer means
Which of the following circuits can be used as parallel to serial converter
Most demultiplexer facilitates which types of conversion?
Why is a demultiplexer called a data distributor?
The logic diagram shown in the figure represents

Name the following figure

The logic function implemented by the following 4:1 MUX is

Asynchronous counter is also known as __________ counter


The counters in which the change in transition doesn’t depend upon the clock signal input
Asynchronous sequential logic circuits ususlly performs operation in
In fundamental mode, the circuits is assumed to be in
In the asynchronous circuit,the changes occur with the changes of
The complexity of the asynchronous circuit is invovled in the timing problem of
The sequential circuits is also called
How many types of sequential circuits have?
Sequential circuits are
Bidirectional counters, also known as ___________

UP-DOWN counter is a combination of ____________


UP-DOWN counter is also known as ___________
Once an up-/down-counter begins its count sequence, it
In 4-bit up-down counter, how many flip-flops are required?

In an UP-counter, each flip-flop is triggered by ___________

In DOWN-counter, each flip-flop is triggered by ___________

SIPO stands for _____________


SISO stands for ____________
PIPO stands for _____________
PISO stands for _____________
Based on how binary information is entered or shifted out, shift registers are classified into
_______ categories
A shift register that will accept a parallel input or a bidirectional serial load and internal shift
features is called as?
How can parallel data be taken out of a shift register simultaneously?
What is meant by the parallel load of a shift register?
A parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock
Memory permits data to be stored and retrived at comparable speed is called
Memory which is usually of random acess type is termed as
SRAM stands for _________________
ROM stands for
RAM stands for
Memory in which are data are available only in the same sequence in which the data were
originally stored is
Which of the following can easily convert to a non-volatile memory?
Which memory storage is widely used in PCs and Embedded Systems?
Which of the following memory technology is highly denser?
Which is the storage element in DRAM
Which one of the following is a storage element in SRAM?
Which of the following is more volatile?
Flash memory devices are typically much faster at
In NOR type flash memory, data is erased
In NOR type flash memory, each cell has one end connected to
Flash memory is a non-volatile storage device in which data
Two types of digital circuit technology that use bipolar junction transistors are __________.
TTL stands for _______________
CMOS stands for __________________

what is meant by the fan-out of a logic gate-----------------

The noise immunity ____________ with increase in noise margin


what does Tphl indicates?

An ADC inputs an analog electrical signal such as voltage or current and outputs
___________
ADC stands for _________________
ADC conversio involves
__________ is also called the parallel A/D converter
SAR stands for ________________

The fastedt A/D converter is


Flash ADC consist of….converters
flash ADC IS
The Ramp ADC uses a binary counter and digtal to analog converter to genertae a
RAMP TYPE ADC is also known as the ___________
DAC stands for ____________
A DAC, on the other hand, inputs a binary number and outputs an
A system that converts a digital signal into an analog signal is called
What is the disdvantages of binary weighted type DAC?
In a D-A converter with binary weighted resistor, a desired step size can be obtained by
In a binary ladder (R-2R),D/A converter ,the input resistance for each inpuy is
In ____________ type of DAC, the output voltage is the inverted sum of all the input
voltages
SAMPLE COPY OFPART A
SUBJECT :Application of Analog and Digital Circuits
CHOOSE THE CORRECT ANSWER
A B

one pn junction Two pn junctions


four three

heavily moderately
collector base
1948 1947
Base andthan
Greater Emitter
the base Base and collector
current Less than the collector current
Electrons Holes
Electrons Holes
Recombine in the base Recombine in the emitte
A npn bipolar transistor A n-channel JFET.

PNP NPN
Forward-Reverse Forward-Forward

dc= IC/IE dc=IE/IC


IC = IE + IB IB = IC + IE
emiter Base and collector
β = 1 / (1 – α ) β = (1 – α ) / α
1 less than 1
common emitter common base
180 90

cut off region inverted region


cut off region inverted region
emitter current depends on bias
Solid state switches are LED’s can be driven by transistor
applications for an AC output logics
reverse biasing its emitter to reverse biasing its base to collector
collector junction junction
sourcing current sinking current
only acceptor only donor ions
inversely proportional to charge directly proportional to charge
carriers carriers
greater than 0.7V equal to 0.7V

Break the fault current sense the fault


Fleming’s Left-hand Rule Columb’s Law

high speed low speed


Both i & ii Both ii & iv

more power less power


Metal oxidized selenium FET Metal oxide surface FET
field effect & MOS technology A semiconductor & TTL
Drain Gate
MOSFET is a uncontrolled MOSFET is a voltage controlled
device device
MOSFET is a unipolar, voltage MOSFET is a bipolar, current
controlled, two terminal device controlled, three terminal device

that it is a N-channel MOSFET the direction of electrons


Can be operated as an enhancement
Can be operated as a JFET with MOSFET by applying +ve bias to gate
zero gate voltage

Cannot be operated as an Can be operated as a JFET with zero


enhancement MOSFET gate voltage
Useful as a very good constant
widely used in IC design voltage source
It is cheaper It is faster
entered -MOSFET enhanced -MOSFET

low noise levels TTL compatibility


an output reistor a pull-up resistor

sink,source current source,sink current


Source Follower Current Booster
it has low input impedance it has high output impedance

source ground
push-pull output totem -dipole output
TTL DTL

zener resistor variable resistor


transistor resistor
Totem -pole output Bipolar transistor
Provide phase splitting Are always on together

minorty carriers majority carriers


metal to n region p to n region
minority carrier diode hot carrier diode
current regulator diode schotky diode
current volatge characteristics is
totally different than that of a p- The current is controlled by the
n junction diode diffusion of minority carriers

current regulator diode schotky diode


It is a type of decoder which
decodes several inputs and gives A multiplexer is a device which
one output converts many signals into one
Decoders encoders
2m
2 inputs 3 inputd

Select input Decoded input


3 4
data inputs select inputs
1 select line 2 select line
enable disable
Decoders encoders
2 3
one into many many to one
Multiplexer Demultiplexer
Decimal to hexadecimal Single input,multiple outputs
The input will be distributed to o One of the inputs will be selected for
1 to 4Demutilplexer 4 to 2 Encoder

Multiplexer Demultiplexer

z= x and y z=x or y

SYNCHRONOUS RIPPLE
UP COUNTER SYNCHRONOUS COUNTER
identical mode fundamental mode
unstable state stable state
input output
input outputs
combination circuits sequential circuits
2 5
synhronous asynchronous
Up/Down counters UP COUNTER

latches Flip flop


Dual counter Multi counter
Starts counting Can be reversed
2 3
The normal output of the preceding
The output of the next flip-flop flip-flop
The normal output of the preceding
The output of the next flip-flop flip-flop

SERIAL OUT to PARALLEL IN SERIAL IN to PARALLEL IN


SERIAL OUT to PARALLEL IN SERIAL IN to SERIAL OUT
SERIAL OUT to PARALLEL IN SERIAL IN to SERIAL OUT
SERIAL OUT to PARALLEL IN SERIAL IN to SERIAL OUT
2 3

Tristate End around


Use the Q output of the first FF Use the Q output of the last FF
All FFs are preset with data Each FF is loaded with data, one at a time
1110 1
R/W memory RAM memory
main memory mass storage memory
STATIC RADIAL ACCESS MEMORY STATIC RANDOM ACCESS MEMORY
READ ONLY MEMORY READY ONLY MEMORY
RADIAM ACCEPT MEMORY RADIOM ACCESS MEMORY

sequential memory combinal memory


SRAM DRAM
SRAM DRAM
DRAM SRAM
Inductor capacitor
Inductor capacitor
SRAM DRAM
reading writing
bitwise bytewise
Source drain
can be erased physically can be erased magnectically
TTL and ECL CMOS & NMOS
TOGGLE TRANSISTOR LOGIC TOGGLE TOGGLE LOGIC
COMPLIMENTARY METAL OXIDE COMPLEX METAL OXIDE
SEMICONDUCTOR SEMICONDUCTOR
the number of other gates that
The physical distance between the
can be connected to the gates's
voutput pins on the devices
output
decreases increases
delay time in going form high to delay time in going form low to high
low logic logic

HEXADECIMAL NUMBER OCTAL NUMBER


ANALOG to DIGITAL CONVERTER AMPLITUDE DIGITAL CONVERTER
quantization simulation
SUCCESSIVE APPROXIMATION FLASH ADC
FLASH ADC R-2R LADDER

single slope ramp comparator


Dual slope integrator A/D converter
A/D converter
2^n 2^n-1
Serial ADC parallel ADC
ramp equation ramp test waveform
stairstep-ramp SUCCESSIVE APPROXIMATION
DATA TO AMPLITUDE
DIGITAL to ANALOG converter
CONVERTER
ANALOG CURRENT DIGITAL CURRENT
ADC DAC
Rquire wide range of resistors High operating frequency
All of the mentioned selecting proper value of VFS
R 2R
SUCCESSIVE APPROXIMATION R-2R LADDER
C D Key

three pn junctions four pn junctions B


one two D

lightly none of the above C


emitter collector-base-junction A
1974 1847 A
Emitter and collector Both A and B C
Greater than the collector current Both A and C D
protons None of the above A
neutrons None of the above B
Pass through the base region to the coll None of the above C
A p-channel JFET A pnp bipolar transistor D

PPN NNP B
Reverse-Reverse Collector-bias A

DC=IB/IE DC = IB-IC A
IE = IC – IB IE = IC + IB D
Base collector D
β = α / (1 – α ) β = α / (1 + α ) C
between 20 and 500 above 500 C
common collector none of the above A
270 0A

active region saturated region A


active region saturated region D
none of the above B

base current collector current D


Only NPN transistor can be used as a Transistor operates as a switch
switch only in active region B
reverse biasing its base to emitter
junction reverse biasing any junction C
forward sourcing reverse sinking A
two p- region and one-N -region three P-N junction C

charging time of the capacitor discharging time of the capacitor B


ess than 0.7V cannot be predicted C
sense the fault and direct to trip the
circuit breaker all of these c
Lenz’s Law Fleming’s Right-hand Rule A

zero speed low gain A


Both i & iv Only i C

zero power infinite power B


Metal oxide semiconductor FET Metal of surface FET C
mos technology & CMOS technology none of the mentioned A
base Source C
MOSFET is a temperature
MOSFET is a current controlled device controlled device B
MOSFET is a unipolar, voltage MOSFET is a bipolar, current
controlled, three terminal device controlled, two terminal device C
the direction of conventional current
flow that it is a P-channel MOSFET B
Can be operated as an enhancement Cannot be operated as an
MOSFET by applying -ve bias to gate enhancement MOSFET B
Can be operated as an
Can be operated as an enhancement enhancement MOSFET by
MOSFET by applying -ve bias to gate applying +ve bias to gate A
Widely used because of easy in its
fabrication Normally on MOSFET A
It has better drive capability It has better noise immunity B
enchancement -MOSFET both a and b C

lower input impedance faster operation D


no output resistor a pull-down resistor B

sink,source voltage source,sink voltage A


Voltage booster voltage limiter A
infinite gain output will be same as input D

input output B
pull-pull output push-push output A
RTL BTL A

pull-up resistor PULL-down resistor D


insulator conductor A
CMOS transistor Multimeter transistor C
Are never on together Provide voltage regulation C

capacitors inductor B
metal to semiconductor metal to insulator C
majority carrier diode electrode carrier diode B
PIN diode zener diode B

The current results from the flow of


minority carrires the storage time is almost zero

PIN diode zener diode B


It is a type of encoder which
It takes one input and results into decodes several inputs and gives
many output one output B
data selectors comparators C
n 2n B
4 inputs 5 inputs C

Strobe Sink c
2 5C
select outputs enable pins B
4 select line 3 select line A
saturation High impedance B
data distributors comparators C
4 5A
distributor one into many as well as distributoD
Decoder digital counter A
AC to DC Odd parity to even parity B
The output will be distributed to one of Single input to Single Output A
1 to 4 Decoder 4 to 1 Multilplexer A

Half adder Encoder B

z= x xor y z=x xnor y C

DELAY NONE OF THE ABOVE B


Asynchronous counters” BISTABLE COUNTER C
reserved mode reset mode B
reset state clear state B
clock pulse Time A
clock pulses feedback path D
logic circuits complex circuits B
6 7 A
signals both A and B D
DOWN COUNTER NONE OF THE ABOVE A

Up counter Up counter& down counter D


Multimode counter Two Counter C
Can’t be reversed Can be altered D
4 5 C
The inverted output of the
The clock pulse of the previous flip-flop preceding flip-flop B
The inverted output of the
The clock pulse of the previous flip-flop preceding flip-flop D

SERIAL IN to PARALLEL OUT SERIAL OUT to PARALLEL OUT C


SERIAL IN to PARALLEL OUT SERIAL OUT to PARALLEL OUT B
PARALLEL IN to PARALLEL OUT SERIAL OUT to PARALLEL OUT C
PARALLEL IN to PARALLEL OUT PARALLEL IN to SERIAL OUT D
4 5
C

Universal Conversion C
Tie all of the Q outputs together Shift Registers - Digital Circuits Q D
Parallel shifting of data All FFs are set with data A
1100 1000 B
ROM memory EPRAM memory A
second memory flip flop A
STATE RANDOM ACCESS MEMORY NONE OF THE ABOVE B
RATE ON MEMORY RATE OFF MEMORY A
A&B RANDOM ACCESS MEMORY D
A
stste memory flip flop
DDR SRAM Asynchronous DRAM A
Flash memory EEPROM B
EPROM Flash memory A
resistor mosfet B
transistor resistor C
ROM RAM B
taking input signal generating output signal A
blockwise sentence wise C
gate ground D
can be erased electrically cannot be erased C
NMOS & PMOS NONE OF THE ABOVE A
TRANSISTOR TRANSISTOR LOGIC TRANSISTOR TOGGLE LOGIC C
COMPLIMENTARY MEASUREMENT A
NONE OF THE ABOVE
OXIDE STATE
A
the number og other gates that can be the amount of cooling required by
connected to one of the gate's inputs the gate

constant none of the mentioned B


delay time in going form high to high delay time in going form low to A
logic low logic

C
BINARY NUMBER DECIMAL NUMBER
ANGLE DATA CONVERTER NONE OF THE ABOVE A
summation substraction A
R-2R LADDER BINARY WEIGHTED RESISTOR B
SUCCESSIVE APPROXIMATION C
2R-4R LADDER
REGISTER
Successive approximation A/D C
Counter type A/D converter
converter
2^n+1 non of these B
series -parallelADC SAR ADC B
ramp input ramp output B
R-2R LADDER BINARY WEIGHTED RESISTOR A
B
DATA TO ANALOG CONVERTER NONE OF THE ABOVE
DIGITAL VOLTAGE analog voltage or current signal D
AAC DDC B
high power consumption SLOW Switiching A
Selecting proper value of R Selecting proper value of Rf D
3R 4R C
D
2R-4R LADDER BINARY WEIGHTED RESISTOR

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