Sample Copy of Part a (Adc) (1)
Sample Copy of Part a (Adc) (1)
Fsat switching
4.3 transistor(schottky diode)
5.4 Demultiplexer
Block diagram and output
equation
5.6
Synchronous UP/DOWN
6.3 counters
Shift register:
6.5 SISO,SIPO,PIPO,PISO
7 Memories 7.1 Classification of memories
fan in,fanout,propagation
delay,noise margin,power
8.2 dissipation
A transistor
The number of depletion layers in a transistor is …………
In
The--------- transistor,forthe
bias condition arrowhead
a transistor toinbethe emitter
used region point outwards.
as a linear
amplifier is_____________________
The time taken for a transistor to turn from saturation to cut off is _________
The base emitter voltage in a cut off region is _________
A relay is used to
Which of the following rule is used to determine the direction of rotation of D.C motor?
MOSFETs as compare
iv) The MOSFET to BJT
has lower has
switching losses than that of a BJT
The N-channel MOSFET is considered better than the P-channel MOSFET due to its
An open-collector output requires---------------------
Diode formed by joining a doped semiconductor region with a metal such as gold,silver or
platinum is
What is a multiplexer?
An ADC inputs an analog electrical signal such as voltage or current and outputs
___________
ADC stands for _________________
ADC conversio involves
__________ is also called the parallel A/D converter
SAR stands for ________________
heavily moderately
collector base
1948 1947
Base andthan
Greater Emitter
the base Base and collector
current Less than the collector current
Electrons Holes
Electrons Holes
Recombine in the base Recombine in the emitte
A npn bipolar transistor A n-channel JFET.
PNP NPN
Forward-Reverse Forward-Forward
source ground
push-pull output totem -dipole output
TTL DTL
Multiplexer Demultiplexer
z= x and y z=x or y
SYNCHRONOUS RIPPLE
UP COUNTER SYNCHRONOUS COUNTER
identical mode fundamental mode
unstable state stable state
input output
input outputs
combination circuits sequential circuits
2 5
synhronous asynchronous
Up/Down counters UP COUNTER
PPN NNP B
Reverse-Reverse Collector-bias A
DC=IB/IE DC = IB-IC A
IE = IC – IB IE = IC + IB D
Base collector D
β = α / (1 – α ) β = α / (1 + α ) C
between 20 and 500 above 500 C
common collector none of the above A
270 0A
input output B
pull-pull output push-push output A
RTL BTL A
capacitors inductor B
metal to semiconductor metal to insulator C
majority carrier diode electrode carrier diode B
PIN diode zener diode B
Strobe Sink c
2 5C
select outputs enable pins B
4 select line 3 select line A
saturation High impedance B
data distributors comparators C
4 5A
distributor one into many as well as distributoD
Decoder digital counter A
AC to DC Odd parity to even parity B
The output will be distributed to one of Single input to Single Output A
1 to 4 Decoder 4 to 1 Multilplexer A
Universal Conversion C
Tie all of the Q outputs together Shift Registers - Digital Circuits Q D
Parallel shifting of data All FFs are set with data A
1100 1000 B
ROM memory EPRAM memory A
second memory flip flop A
STATE RANDOM ACCESS MEMORY NONE OF THE ABOVE B
RATE ON MEMORY RATE OFF MEMORY A
A&B RANDOM ACCESS MEMORY D
A
stste memory flip flop
DDR SRAM Asynchronous DRAM A
Flash memory EEPROM B
EPROM Flash memory A
resistor mosfet B
transistor resistor C
ROM RAM B
taking input signal generating output signal A
blockwise sentence wise C
gate ground D
can be erased electrically cannot be erased C
NMOS & PMOS NONE OF THE ABOVE A
TRANSISTOR TRANSISTOR LOGIC TRANSISTOR TOGGLE LOGIC C
COMPLIMENTARY MEASUREMENT A
NONE OF THE ABOVE
OXIDE STATE
A
the number og other gates that can be the amount of cooling required by
connected to one of the gate's inputs the gate
C
BINARY NUMBER DECIMAL NUMBER
ANGLE DATA CONVERTER NONE OF THE ABOVE A
summation substraction A
R-2R LADDER BINARY WEIGHTED RESISTOR B
SUCCESSIVE APPROXIMATION C
2R-4R LADDER
REGISTER
Successive approximation A/D C
Counter type A/D converter
converter
2^n+1 non of these B
series -parallelADC SAR ADC B
ramp input ramp output B
R-2R LADDER BINARY WEIGHTED RESISTOR A
B
DATA TO ANALOG CONVERTER NONE OF THE ABOVE
DIGITAL VOLTAGE analog voltage or current signal D
AAC DDC B
high power consumption SLOW Switiching A
Selecting proper value of R Selecting proper value of Rf D
3R 4R C
D
2R-4R LADDER BINARY WEIGHTED RESISTOR