COMPUTER

ORGANIZATION
AND
ARCHITECTURE
Functional Units

Input Arithmetic
and logic
Memory

Output Control

I/O Processor

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Input Unit
• Input Unit reads the data
• The most common Input devices are Keyboard,
joystick, trackballs, microphone and mouse

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Output Unit
• Counterpart of I/P unit
• Its function is to send processed results to
outside world
• The familiar example of output device is
printer (various types)

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Memory Unit
• The function of memory unit is to store programs and
data
• There are 2 classes of storage:
• Primary Storage:
• Fast memory that operates at electronic speeds
• The memory contains a large number of semiconductor
storage cells, each capable of storing 1 bit of information
• These cells are processed in groups of fixed size called word
• The number of bits in each word is known as word length
• Range from 16 to 64 bits
• To provide easy access to any word in the memory, a
distinct address is associated with each word location
• Addresses are numbers that identify successive locations

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• Memory in which any location can be reached in a
short and fixed amount of time after specifying its
address is RAM
• Time required to access one word is called the
memory access time
• Memory of a computer is normally implemented as
a memory hierarchy of 3 or 4 levels of
semiconductor RAM units with different speeds &
sizes
• The small, fast, units are called caches
• The largest & slowest unit is referred to as the
main memory
• Primary storage is expensive

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• Secondary Storage:
• Is used when large amount of data and
many programs have to be stored
• It contains infrequently accessed
information
• Additional & cheaper memory
• Ex: Magnetic disks and tapes & optical
disks (CD-ROMs)

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Arithmetic And Logic Unit
• ALU performs all the arithmetic and logic
operations
• For ex: addition, multiplication, division,
comparison etc
• Any operation is initiated by bringing the
required operands into the processor, where
the operation is performed by the ALU
• When operands are brought into the
processor, they are stored in high- speed
storage elements called registers

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• Each register can store one word of data
• Access time to registers are faster than cache
unit
• CU & ALU are many times faster than other
devices connected to a computer system
• This enables a single processor to control a
number of external devices such as keyboards,
displays, magnetic & optical disks, sensors &
mechanical controllers

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Control Unit
• It controls the entire operations of the computer
• The control unit is the nerve centre that sends control
signals to other units and senses their states
• The timing signals that govern the I/O transfers are
generated by control circuits
• Timing signals are signals that determine when a
given action is to take place
• Data transfers b/w processor & memory are also
controlled by CU through timing signals
• A large set of control lines (wires) carries the signals
used for timing & synchronization of events in all units

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Operation of a Computer - Summarized

• The computer accepts information in the form of

pgms & data through an I/P unit & stores it in the
memory
• Information stored in the memory is fetched, under
pgm control, into an ALU, where it is processed
• Processed information leaves the computer through
an O/P unit
• All activities inside the machine are directed by the
CU

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 Basic Operational Concepts
• For processing, individual instructions are brought from memory into
the processor, which executes the specified operations
• Data to be used as operands are also stored in memory
• A typical instruction may be:
Add A,R0
• Adds the operand at memory location A to the operand in register R0
and store the result in R0
• The original content of A is preserved, whereas R0 are overwritten
• Instruction requires several steps
Load A, R1
Add R1,R0
• The first instruction transfers the contents of A into the processor
register R1
• The second instruction adds the contents of R1 and R0 and places the content
in R0

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 Connection between the processor and memory

Control
Unit

Arithmetic
Logic Unit

MAR - Memory Address Register PC - Program Counter

MDR - Memory Data Register IR - Instruction Register

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• CPU = ALU + CU + registers
• Diff: types of registers are:
• IR (instruction register):
• Holds the instruction that is currently being executed
• Its o/p is available to control circuits, which generate the timing
signals that control the various processing elements involved in
executing the instruction
• PC (program counter):
• Keeps track of the execution of a pgm
• Contains the memory address of next instruction to be fetched &
executed
• During the execution of an instruction, the contents of PC are
updated to correspond to the address of next instruction that is to
be fetched from the memory
• PC points to the next instruction that is to be fetched from memory

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• n general- purpose registers (R0 thru’ Rn-1):
• are used for holding data, intermediate results of operations.
• They are also known as scratch-pad registers.

• MAR (memory address register):

• Facilitates communication with memory
• Holds the address of the location to be accessed
• MDR (memory data register):
• Facilitates communication with memory
• Contains data to be written into or read out of the addressed
location

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 Computer Instructions
• Assembly Language
• Register Transfer
Notation
• MOVE NUM1,R1

• R1 ← [NUM1]
• MOVE #1,R2

• R2 ← 1
• ADD #1,R1

• R1 ← 1 + [R1]
• ADD R1,R2

• R2 ← [R1] + [R2]

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 The “fetch-execute cycle”
• Fetch the instruction whose address is
in the program counter
• Increment the PC so it holds the
address of the next instruction
• Execute the instruction just fetched
• Fetch the next instruction
• Etc.

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Steps involving Instruction Fetch & Execution

• Pgms reside in the memory and usually get

there through the i/p unit

INSTRUCTION FETCH

• Execution of a program starts by setting the

PC to point to the first instruction of the
program

• The contents of PC are transferred to the

MAR and a Read control signal is sent to the
memory

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• The addressed word (here it is the first
instruction of the program) is read out of
memory and loaded into the MDR

• The contents of MDR are transferred to

the IR
• Now the instruction is ready to be decoded &
executed

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INSTRUCTION EXECUTION

• The operation field of the instruction in IR

is examined to determine the type of
operation to be performed by the ALU

• The specified operation is performed by

obtaining the operand(s) from the memory
locations or from GP registers in the
processor
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• If the result of this operation is to be stored in the
memory, then the result is sent to MDR
• The address of the location where the result is to
be stored is sent to MAR and a Write cycle is
initiated

• Thus, the execute cycle ends for the current

instruction and the PC is incremented to point to
the next instruction for a new fetch cycle.

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• Fetching the operands from the memory requires
sending the memory location address to the
MAR and initiating a Read cycle
• The operand is read from the memory into the
MDR and then from MDR to the ALU
• The ALU performs the desired operation on one
or more operands fetched in this manner and
sends the result either to memory location or to
a GP register

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 Example Instruction

MOVE NUM1,R1

• Fetch • Execute
• MAR ← [PC] • MAR ← NUM1
• PC ← [PC] + 1 • MDR ← [MEM([MAR])]
• MDR ← [MEM([MAR])] • R1 ← [MDR]
• IR ← [MDR]

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 Another Example

ADD #1,R1

• Fetch • Execute
• MAR ← [PC] • R1 ← 1 + [R1]
• PC ← [PC] + 1
• MDR ← [MEM([MAR])]
• IR ← [MDR]

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 Bus Structures
• A group of lines that serves as a
connecting path for several devices is
called a bus
• Bus must have lines for
• Data
• Address
• Control

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 Single-bus Structure
Memor Process
Input Output
y or

•The simplest way to interconnect functional units to use

a single bus
• Since the bus can be used for only one transfer at a
time, only two units can actively use the bus at any
given time
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• It’s basic feature is it’s low cost and flexibility for
attaching peripheral devices
• Systems containing multiple buses increase it’s
performance capability (by concurrency in operations)
but at an increased cost
• Buffer registers
• to hold the information during transfers with the
devices
• Allows processor to switch rapidly from one device
to another
• Ex: use of printer buffer during printing

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• Transfer of a character from a processor to a
character printer
• Processor sends the character to the
printer buffer
• Once buffer is loaded, the printer can start
printing without intervention by the
processor
• The system bus is also called the front
side bus, memory bus, local bus, or
host bus.

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Simplified Illustration of a Bus

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Two-Bus Structure

I/O bus

Input
Memory
Processor

Output

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• The bus is said to perform two distinct functions
by connecting the I/O units with memory and
processor unit with memory. The processor
interacts with the memory through a memory bus
and handles input/output functions over I/O bus.

• The main advantage of this structure is good

operating speed but on account of more cost.

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• Million - Mega (M)
• Billion - Giga (G)
• 500 million cycles/sec – 500 MHz
• Clock period is 2 ns
• 1250 million cycles/sec – 1.25 GHz
• Clock period is 0.8 ns

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 Processor Clock
• Processor circuits are controlled by a timing
signal called a clock
• The regular time intervals are known as
clock cycles
• To execute machine instructions the
processor divides the action into a sequence
of steps such that each step can be
completed in one clock cycle
• The length P of one clock cycle is an
important performance parameter of
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