1.

Perform A – B (subtract) operation for the following numbers using signed magnitude
number
format. (Write necessary assumptions if required)
A = + 11 and B = - 6
Signed Magnitude Representation:
• In signed magnitude, the leftmost bit represents the sign (0 for positive, 1 for
negative), and the remaining bits represent the magnitude.
Binary Conversion:
• A = +11 = 0 1011 (4-bit magnitude + sign bit)
• B = -6 = 1 0110 (4-bit magnitude + sign bit)
Subtraction as Addition:
• A - B is equivalent to A + (-B).
• -B = -(-6) = +6 = 0 0110
Addition:
• Now, we add A and -B:
o 0 1011 (+11)
o

▪ 0 0110 (+6)

o 0 10001
• Since we are using 4 bits for magnitude, we remove the most significant carry bit.
• The result is 0 0001, but the real result is 17. So we need 5 bits for the magnitude.
• A = +11 = 0 01011
• -B = +6 = 0 00110
• 0 01011
o 0 00110

0 10001
• 0 10001 = +17
Result:
 • A - B = +17 = 0 10001 (5-bit magnitude + sign bit)

2. What is arithmetic micro operation? Explain 4 bit arithmetic circuit with suitable
diagram.
Arithmetic Micro-operations:
• These are basic arithmetic operations performed on data stored in registers. They
include addition, subtraction, increment, decrement, and shift operations. These
operations are the fundamental building blocks of more complex arithmetic
computations within a CPU.
4-Bit Arithmetic Circuit:
• A 4-bit arithmetic circuit can perform various arithmetic operations on two 4-bit
inputs (A and B) based on selection inputs. A common design uses a 4-bit full adder
and multiplexers to select the desired operation.
• Diagram:
3. State and Explain any seven logic micro operation
Logic micro-operations manipulate bits. Seven important operations:
Seven Logic Micro-operations:
1. AND (∧):
o Performs bitwise AND operation.
o Example: 1010 ∧ 1100 = 1000
2. OR (∨):
o Performs bitwise OR operation.
o Example: 1010 ∨ 1100 = 1110
3. XOR (⊕):
o Performs bitwise exclusive OR operation.
o Example: 1010 ⊕ 1100 = 0110
4. NOT (¬):
o Performs bitwise complement (inversion).
o Example: ¬1010 = 0101
5. NAND (↑):
o Performs bitwise NOT AND operation.
o Example: 1010 ↑ 1100 = 0111
6. NOR (↓):
o Performs bitwise NOT OR operation.
o Example: 1010 ↓ 1100 = 0001
7. Equivalence (XNOR, ⊙):
o Performs bitwise exclusive NOR operation.
o Example: 1010 ⊙ 1100 = 1001

4. Show different ways to represent fixed-point positive integers including zero.

Fixed-Point Positive Integers:
• These are numbers represented with a fixed number of bits, where the binary point
is assumed to be at a fixed position (usually at the right end for integers).
 Representations:
1. Unsigned Binary
o Example: 5=010125 = 0101_25=01012
2. Sign-Magnitude
o Example: +5=001012+5 = 0 0101_2+5=001012, −5=101012-5 = 1
0101_2−5=101012
3. 1’s Complement
o Example: −5=110102-5 = 11010_2−5=110102
4. 2’s Complement
o Example: −5=110112-5 = 11011_2−5=110112
5. Excess Notation (Bias Representation)
o Example: If bias = 7,
▪ +5=5+7=12=11002+5 = 5 + 7 = 12 = 1100_2+5=5+7=12=11002

6. Apply the combinational circuits to design a 4-bit adder/ subtracter circuit which
performs subtraction using 2’s complement.

4-Bit Adder/Subtracter:
• Uses a 4-bit full adder and XOR gates to implement 2's complement subtraction.
• Design:
 1. Full Adders:
▪ Use four full adders (FA0 to FA3) to add the bits.
2. XOR Gates:
▪ Use four XOR gates to complement the B input bits when subtraction
is required.
▪ One control line (Subtract) is used to select addition or subtraction.
3. Carry-In (Cin):
▪ When Subtract = 1 (subtraction), Cin is set to 1.
o Operation:
▪ If Subtract = 0 (addition):
▪ B input is passed directly to the full adders.
▪ Cin = 0.
▪ A + B is performed.
▪ If Subtract = 1 (subtraction):
▪ B input is XORed with 1, which complements B.
▪ Cin = 1.
▪ A + (~B) + 1 is performed, which is A - B (2's complement).

6.What is the need of common bus? Construct diagram of common bus system of four 4-
bits
Why Do We Need a Common Bus? registers with diagram. Use Multiplexer for the same.

A common bus is used to transfer data between multiple registers efficiently using a shared
communication pathway instead of separate connections for each register.
Advantages of a Common Bus System
1. Reduces hardware complexity – Fewer wires and components.
2. Efficient data transfer – Registers share the same data lines.
3. Uses multiplexers – Select which register sends or receives data.
4. Faster operations – Controlled via selection lines.
 election Lines (S1 S0) Selected Register

00 R1

01 R2

10 R3

11 R4

Common Bus System Using Three-State Buffers

Instead of multiplexers, we can use three-state buffers to connect multiple registers to a
common bus.
• A three-state buffer has three states:
1. 1 (Logic High)
2. 0 (Logic Low)
3. Z (High Impedance) → Acts like an open circuit, preventing interference.
7. Write a truth table of three state buffer and explain high impedance state in it with
logic symbol diagram. Also construct common bus using three state buffer.
A three-state buffer allows multiple registers to share a bus without interference.
Truth Table

Enable Input Output

0 X Z (High Impedance)

1 0 0

1 1 1

High Impedance State (Z)

• When Enable = 0, the buffer is disconnected from the bus.
• This ensures only one register sends data at a time.
Common Bus Using Three-State Buffers
A bus system is implemented by connecting multiple registers using three-state buffers.
• Only one buffer is active at a time.
• The others remain in high impedance (Z) to avoid data collision

8.Explain logical shift, circular shift and arithmetic shift micro operations. Draw neat
and clean diagram for 4-bit combinational circuit shifter.\
1. Logical Shift
• Shifts bits left or right and fills the empty space with 0s.
• Used in unsigned binary arithmetic.
Example: Logical Left Shift
Before: 0011 (Decimal 3)
After : 0110 (Decimal 6)

2. Circular Shift (Rotate)

• Bits wrap around to the other side instead of getting lost.
Example: Circular Right Shift
 Before: 1011
After : 1101

3. Arithmetic Shift
• Maintains the sign bit (leftmost bit) in signed binary numbers.
• Left shift multiplies by 2.
• Right shift divides by 2 but preserves the sign.
Example: Arithmetic Right Shift

Before: 1101 (-3 in 4-bit 2’s complement)

After : 1110 (-2 in 4-bit 2’s complement)

Diagram: 4-Bit Combinational Shift Circuit

9.Explain selective set, selective complement and selective clear, mask and insert
operation.
Selective operations modify specific bits in a register.
1. Selective Set (OR)
• Sets bits to 1 where the second operand has 1s.
Example:
A = 1010
B = 1100
A OR B = 1110

2. Selective Complement (XOR)

• Flips bits where the second operand has 1s.
Example:

A = 1010
B = 1100
A XOR B = 0110

3. Selective Clear (AND with NOT)

• Clears bits to 0 where the second operand has 1s.
Example:

A = 1010
B = 1100
A AND B' = 0010

4. Mask Operation (AND)

• Keeps only the required bits.
Example:

A = 1010
 B = 1100
A AND B = 1000

5. Insert Operation (Mask + OR)

• Used to insert a new value into specific bits.
• First, mask the unwanted bits.
• Then, OR with the new value.
Example:

A = 01101010
Mask = 00001111
New Value = 10010000

After Masking : 00001010

After Inserting: 10011010

10. How negative integer number represented in memory? Explain with suitable example.
Negative numbers are represented using three different methods.
1. Sign-Magnitude Representation
• MSB = Sign Bit (0 = Positive, 1 = Negative)
• Example:
o +5=001012+5 = 0 0101_2+5=001012
o −5=101012-5 = 1 0101_2−5=101012

2. 1’s Complement Representation

• Invert all bits (Flip 0s to 1s and 1s to 0s).
• Example:
 o +5=01012+5 = 0101_2+5=01012
o −5=10102-5 = 1010_2−5=10102

3. 2’s Complement Representation (Preferred)

• Take 1’s complement and add 1.
• Example:
o +5=01012+5 = 0101_2+5=01012
o −5=1010+1=10112-5 = 1010 + 1 = 1011_2−5=1010+1=10112

Comparison of Negative Number Representations

Representation +5 (Binary) -5 (Binary)

Sign-Magnitude 0 0101 1 0101

1’s Complement 0101 1010

2’s Complement 0101 1011

2’s complement is used in modern computers because:

• No duplicate representation of zero.
• Simple subtraction by addition of 2’s complement.