8-bit AVR Microcontrollers

ATmega328/P

DATASHEET SUMMARY

Introduction
The Atmel®picoPower® ATmega328/P is a low-power CMOS 8-bit
microcontroller based on the AVR® enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the ATmega328/P
achieves throughputs close to 1MIPS per MHz. This empowers system
designer to optimize the device for power consumption versus processing
speed.

Feature
High Performance, Low Power Atmel®AVR® 8-Bit Microcontroller Family

• Advanced RISC Architecture

– 131 Powerful Instructions
– Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20MHz
– On-chip 2-cycle Multiplier
• High Endurance Non-volatile Memory Segments
– 32KBytes of In-System Self-Programmable Flash program
– Memory
– 1KBytes EEPROM
– 2KBytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data Retention: 20 years at 85°C/100 years at 25°C(1)
Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
• Atmel® QTouch® Library Support
– Capacitive Touch Buttons, Sliders and Wheels
– QTouch and QMatrix® Acquisition
– Up to 64 sense channels

Atmel-42735A-ATmega328/P_Datasheet_Summary-06/2016
• Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
• Temperature Measurement
– 6-channel 10-bit ADC in PDIP Package
• Temperature Measurement
– Two Master/Slave SPI Serial Interface
– One Programmable Serial USART
– One Byte-oriented 2-wire Serial Interface (Philips I2C compatible)
– Programmable Watchdog Timer with Separate On-chip Oscillator
– One On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
• Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and
Extended Standby
• I/O and Packages
– 23 Programmable I/O Lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
• Operating Voltage:
– 1.8 - 5.5V
• Temperature Range:
– -40°C to 105°C
• Speed Grade:
– 0 - 4MHz @ 1.8 - 5.5V
– 0 - 10MHz @ 2.7 - 5.5V
– 0 - 20MHz @ 4.5 - 5.5V
• Power Consumption at 1MHz, 1.8V, 25°C
– Active Mode: 0.2mA
– Power-down Mode: 0.1μA
– Power-save Mode: 0.75μA (Including 32kHz RTC)

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 Table of Contents
Introduction......................................................................................................................1

Feature............................................................................................................................1

1. Description.................................................................................................................4

2.Configuration Summary.............................................................................................5

3.Ordering Information .................................................................................................6

ATmega328 .................................................................................................................................6
3.1.
ATmega328P ...............................................................................................................................7
3.2.
Block Diagram...........................................................................................................8
4.
Pin Configurations.....................................................................................................9
5.
Pin-out..........................................................................................................................................9
5.1. Pin Descriptions..........................................................................................................................12
5.2.
6.I/O Multiplexing........................................................................................................14

Resources................................................................................................................16
7.
Data Retention.........................................................................................................17
8.
9.About Code Examples.............................................................................................18

10.Capacitive Touch Sensing.......................................................................................19

QTouch Library...........................................................................................................................19
10.1.
11.Packaging Information.............................................................................................20
32-pin 32A..................................................................................................................................20
32-pin 32M1-A............................................................................................................................21
11.1
28-pin 28M1................................................................................................................................22
.
28-pin 28P3................................................................................................................................23
11.2
.
11.3
.
11.4
.
1. Description
The Atmel AVR®core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be
accessed in a single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega328/P provides the following features: 32Kbytes of In-System Programmable Flash with
Read-While-Write capabilities, 1Kbytes EEPROM, 2Kbytes SRAM, 23 general purpose I/O lines, 32
general purpose working registers, Real Time Counter (RTC), three flexible Timer/Counters with compare
modes and PWM, 1 serial programmable USARTs , 1 byte-oriented 2-wire Serial Interface (I2C), a 6-
channel 10-bit ADC (8 channels in TQFP and QFN/MLF packages) , a programmable Watchdog Timer
with internal Oscillator, an SPI serial port, and six software selectable power saving modes. The Idle
mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to
continue functioning. The Power-down mode saves the register contents but freezes the Oscillator,
disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the
asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the
device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except
asynchronous timer and ADC to minimize switching noise during ADC conversions. In Standby mode, the
crystal/resonator oscillator is running while the rest of the device is sleeping. This allows very fast start-up
combined with low power consumption. In Extended Standby mode, both the main oscillator and the
asynchronous timer continue to run.
Atmel offers the QTouch® library for embedding capacitive touch buttons, sliders and wheels functionality
into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and
includes fully debounced reporting of touch keys and includes Adjacent Key Suppression® (AKS™)
technology for unambiguous detection of key events. The easy-to-use QTouch Suite toolchain allows you
to explore, develop and debug your own touch applications.
The device is manufactured using Atmel’s high density non-volatile memory technology. The On-chip ISP
Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a
conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega328/P is a powerful microcontroller that
provides a highly flexible and cost effective solution to many embedded control applications.
The ATmega328/P is supported with a full suite of program and system development tools including: C
Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.

Atmel ATmega328/P [DATASHEET] 4

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2. Configuration Summary
Features ATmega328/P
Pin Count 28/32 32K 2K
Flash (Bytes) 1K 1/1/2 23 2
SRAM (Bytes) 1 1 10-bit
EEPROM (Bytes) 15kSPS 8 2 1
Interrupt Vector Size (instruction word/vector)
General Purpose I/O Lines
SPI
TWI (I2C)
USART
ADC
ADC Channels
8-bit Timer/Counters
16-bit Timer/Counters

and support a real Read-While-Write Self-Programming mechanism. There is a separate Boot Loader
Section, and the SPM instruction can only execute from there. In , there is no Read-While-Write support
and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash.

Atmel ATmega328/P [DATASHEET] 5

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3. Ordering Information

3.1. ATmega328
Speed [MHz](3) Power Supply [V] Ordering Code(2) Package(1) Operational Range
20 1.8 - 5.5 ATmega328-AU 32A 32A Industrial
ATmega328-AUR 28M1 (-40°C to 85°C)
(5)
ATmega328-MMH 28M1
(4)
ATmega328-MMHR 32M1-A
(4)(5)
ATmega328-MU 32M1-A
ATmega328-MUR(5) 28P3
ATmega328-PU

Note:
1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for
detailed ordering information and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.
3.
Please refer to Speed Grades for Speed vs. VCC
4.
Tape & Reel.
5.
NiPdAu Lead Finish.

Package Type
28M1 28-pad, 4 x 4 x 1.0 body, Lead Pitch 0.45mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/
MLF)
28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)

32M1-A32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/
MLF)
32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)

Atmel ATmega328/P [DATASHEET] 6

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3.2. ATmega328P
Speed [MHz](3) Power Supply [V] Ordering Code(2) Package(1) Operational Range
20 1.8 - 5.5 ATmega328P-AU 32A 32A Industrial
ATmega328P-AUR 28M1 (-40°C to 85°C)
(5)
ATmega328P-MMH 28M1
(4)
ATmega328P-MMHR 32M1-A
(4)(5)
ATmega328P-MU 32M1-A
ATmega328P-MUR(5) 28P3
ATmega328P-PU

Industrial
ATmega328P-AN 32A
(-40°C to 105°C)
ATmega328P-ANR(5) 32A
ATmega328P-MN 32M1-A
ATmega328P-MNR(5) 32M1-A
ATmega328P-PN 28P3

Note:
1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for
detailed ordering information and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances
(RoHS directive). Also Halide free and fully Green.
3.
Please refer to Speed Grades for Speed vs. VCC
4.
Tape & Reel.
5.
NiPdAu Lead Finish.

Package Type
28M1 28-pad, 4 x 4 x 1.0 body, Lead Pitch 0.45mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/
MLF)
28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)

32M1-A32-pad, 5 x 5 x 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/
MLF)
32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)

Atmel ATmega328/P [DATASHEET] 7

Atmel-42735A-ATmega328/P_Datasheet_Summary-06/2016
4. Block Diagram
Figure 4-1. Block Diagram

SRAM
debugWire

CPU
OCD

Clock generation
PB[7:0]
XTAL1 / I/O
TOSC1 8MHz PC[6:0]
32.768kHz Calib RC NVM I PORTS PD[7:0]
XOSC
programming FLASH N
External /
XTAL2 / clock O
TOSC2 16MHz LP Power U
XOSC 128kHz int GPIOR[2:0]
osc management T
D
and clock D EEPROM A
A TC 0 T0 OC0A PD4
control T OC0B PD6
T (8-bit) PD5
A MISO0
A PB4
B MOSI0
B
VCC U EEPROMIF U SCK0 PB3
Power S SPI 0 SS0 PB5
S PB2
Supervision Watchdog AIN0
PD6
RESET Timer AIN1
POR/BOD & ADCMUX PD7
RESET AC
GND ADC[7:0] Internal ADC6, ADC7
AREF
ADC6,ADC7,PC[5:0] Reference PC[5:0]
AREF ADC

RxD0 PD
PD[7:0], PC[6:0], PB[7:0] PCINT[23:0]
EXTINT USART 0 TxD0 0
PD3, PD2 INT[1:0] XCK0 PD
1
PD
PB1, PB2 OC1A/B
TC 1 4
PD5 T1
PB0 ICP1
(16-bit)
SDA0 PC
TWI 0 SCL0 4
PB3 OC2A TC 2 PC
PD3 OC2B 5
(8-bit async)

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5. Pin Configurations

5.1. Pin-out
Figure 5-1. 28-pin PDIP

(PCINT14/RESET) PC6 1 2 PC5 (ADC5/SCL/PCINT13)

(PCINT16/RXD) PD0 2 8 PC4 (ADC4/SDA/PCINT12)
(PCINT17/TXD) PD1 3 2 PC3 (ADC3/PCINT11)
(PCINT18/INT0) PD2 4 7 PC2 (ADC2/PCINT10)
(PCINT19/OC2B/INT1) PD3 5 2 PC1 (ADC1/PCINT9)
(PCINT20/XCK/T0) PD4 6 6 PC0 (ADC0/PCINT8)
VCC 7 2
Power
GND Ground

GND 8 5 AREF Programming/debug

(PCINT6/XTAL1/TOSC1) PB6 9 2
Digital
AVCC Analog

(PCINT7/XTAL2/TOSC2) PB7 1 4 PB5 (SCK/PCINT5) Crystal/Osc

(PCINT21/OC0B/T1) PD5 0 2 PB4 (MISO/PCINT4)

(PCINT22/OC0A/AIN0) PD6 1 3 PB3 (MOSI/OC2A/PCINT3)
(PCINT23/AIN1) PD7 1 2 PB2 (SS/OC1B/PCINT2)
(PCINT0/CLKO/ICP1) PB0 1 2 PB1 (OC1A/PCINT1)
2 2
1 1
3 2
1 0
4 1
9
1
8
1
7
1
6
1
5

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Atmel-42735A-ATmega328/P_Datasheet_Summary-06/2016
Figure 5-2. 28-pin MLF Top View

PC4 (ADC4/SDA/PCINT12)
PC5 (ADC5/SCL/PCINT13)
Power

PC6 (RESET/PCINT14)

PC3 (ADC3/PCINT11)
PD2 (INT0/PCINT18)

PD0 (RXD/PCINT16)
PD1 (TXD/PCINT17)
Ground

Programming/debug

Digital

Analog

Crystal/CLK

28
27
26
25
24
23
22
(PCINT19/OC2B/INT1) PD3 1 21 PC2 (ADC2/PCINT10)
(PCINT20/XCK/T0) PD4 2 20 PC1 (ADC1/PCINT9)
VCC 3 19 PC0 (ADC0/PCINT8)
GND 4 18 GND
(PCINT6/XTAL1/TOSC1) PB6 5 17 AREF
(PCINT7/XTAL2/TOSC2) PB7 6 16 AVCC
(PCINT21/OC0B/T1) PD5 7 15 PB5 (SCK/PCINT5)
10
11
12
13
14
8
9

Bottom pad should be

soldered to ground
(PCINT22/OC0A/AIN0) PD6
(PCINT23/AIN1) PD7
(PCINT0/CLKO/ICP1) PB0
(PCINT1/OC1A) PB1
(PCINT2/SS/OC1B) PB2
(PCINT3/OC2A/MOSI) PB3
(PCINT4/MISO) PB4

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Atmel-42735A-ATmega328/P_Datasheet_Summary-06/2016
Figure 5-3. 32-pin TQFP Top View

PC4 (ADC4/SDA/PCINT12)
PC5 (ADC5/SCL/PCINT13)
Power

PC6 (RESET/PCINT14)

PC3 (ADC3/PCINT11)
PC2 (ADC2/PCINT10)
Ground

PD2 (INT0/PCINT18)

PD0 (RXD/PCINT16)
PD1 (TXD/PCINT17)
Programming/debug

Digital

Analog

Crystal/CLK

32
31
30
29
28
27
26
25
(PCINT19/OC2B/INT1) PD3 1 24 PC1
(PCINT20/XCK/T0) PD4 2 23 (ADC1/PCINT9)
GND 3 22 PC0
VCC 4 21 (ADC0/PCINT8)
GND 5 20 ADC7 GND AREF
VCC 6 19 ADC6 AVCC PB5
(PCINT6/XTAL1/TOSC1) PB6 7 18 (SCK/PCINT5)
(PCINT7/XTAL2/TOSC2) PB7 8 17
10
11
12
13
14
15
16
9 (PCINT21/OC0B/T1) PD5
PCINT22/OC0A/AIN0) PD6
(PCINT23/AIN1) PD7
(PCINT0/CLKO/ICP1) PB0
(PCINT1/OC1A) PB1
(PCINT2/SS/OC1B) PB2
(PCINT3/OC2A/MOSI) PB3
(PCINT4/MISO) PB4

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Atmel-42735A-ATmega328/P_Datasheet_Summary-06/2016
 Figure 5-4. 32-pin MLF Top View

PC4 (ADC4/SDA/PCINT12)
PC5 (ADC5/SCL/PCINT13)
Power

PC6 (RESET/PCINT14)

PC3 (ADC3/PCINT11)
PC2 (ADC2/PCINT10)
PD2 (INT0/PCINT18)

PD0 (RXD/PCINT16)
PD1 (TXD/PCINT17)
Ground

Programming/debug

Digital

Analog

Crystal/CLK

32
31
30
29
28
27
26
25
(PCINT19/OC2B/INT1) PD3 1 24 PC1 (ADC1/PCINT9)
(PCINT20/XCK/T0) PD4 2 23 PC0 (ADC0/PCINT8)
GND 3 22 ADC7 GND AREF
VCC 4 21 ADC6 AVCC PB5
GND 5 20 (SCK/PCINT5)

VCC 6 19
7 18
(PCINT6/XTAL1/TOSC1) PB6
8 17
(PCINT7/XTAL2/TOSC2) PB7
10
11
12
13
14
15
16
9

Bottom pad should be

soldered to ground
(PCINT21/OC0B/T1) PD5
(PCINT22/OC0A/AIN0) PD6
(PCINT23/AIN1) PD7
(PCINT0/CLKO/ICP1) PB0
(PCINT1/OC1A) PB1
(PCINT2/SS/OC1B) PB2
(PCINT3/OC2A/MOSI) PB3
(PCINT4/MISO) PB4

5.2. Pin Descriptions

5.2.1. VCC Digital supply voltage.

GND Ground. Port B (PB[7:0]) XTAL1/XTAL2/TOSC1/TOSC2 Port B is an 8-bit bi-directional I/O port with
5.2.2.
internal pull-up resistors (selected for each bit). The Port B
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
5.2.3. Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
B pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator
amplifier and input to the internal clock operating circuit.

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