IC Compiler II (TM)

Version T-2022.03-SP5 for linux64 - Nov 01, 2022 -SLE

Copyright (c) 1988 - 2022 Synopsys, Inc.

This software and the associated documentation are proprietary to Synopsys,
Inc. This software may only be used in accordance with the terms and conditions
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Loading user preference file /home/pd23.group9/.synopsys_icc2_gui/preferences.tcl

icc2_shell> start_gui
Load ICV ICCII menu file: /home/dipesh.panchal/icv/work/icvalidator/V-2023.12-SP3-
1/etc/tcl-u/Icc2Menu.tcl
+ VUE INFO: Please click View->IC Validator VUE in LayoutWindow menu
to launch VUE.

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

 + VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE WARNING: couldn't open socket: address already in use

+ VUE INFO: Found a usable port: 2505

Loading user favorites file /home/pd23.group9/.synopsys_icc2_gui/favorites.tcl

icc2_shell>
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14rvt_tt0p6v125c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14hvt_ss0p6v125c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14lvt_ss0p6vm40c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14slvt_ss0p72v125c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14sram_tt0p8v125c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology '1saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14io_fc_ss0p72v125c_1p62v', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14pll_tt0p8v125c', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14rvt_c_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14hvt_c_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14lvt_c_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14slvt_c_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14sram_c_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology '1saed14rvt_1p9m.tf' used for frame-view creation in library
'saed14io_v_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
Warning: Technology used to create frame-view and current technology have
inconsistency: Min spacings are different for layer 'M1'. (FRAM-054)
Warning: Technology 'saed14rvt_1p9m.tf' used for frame-view creation in library
'EXPLORE_physical_only', is inconsistent with the current technology
'saed14nm_1p9m_mw.tf' of library 'post_import_design'. Please run
derive_design_level_via_regions to generate up-do-date via region in the design
library. (NDM-102)
icc2_shell> open_block
/home/pd23.group9/MAIN_K_Y/Data_Preperation/work/post_import_design:placement_done.
design
Information: User units loaded from library 'saed14rvt_tt0p6v125c' (LNK-040)
Opening block 'post_import_design:placement_done.design' in edit mode
icc2_shell> link_block
Using libraries: post_import_design saed14rvt_tt0p6v125c saed14hvt_ss0p6v125c
saed14lvt_ss0p6vm40c saed14slvt_ss0p72v125c saed14sram_tt0p8v125c
saed14io_fc_ss0p72v125c_1p62v saed14pll_tt0p8v125c saed14rvt_c_physical_only
saed14hvt_c_physical_only saed14lvt_c_physical_only saed14slvt_c_physical_only
saed14sram_c_physical_only saed14io_v_physical_only EXPLORE_physical_only
Visiting block post_import_design:placement_done.design
Design 'ChipTop' was successfully linked.
1
icc2_shell> get_cells
{optlc_5639 optlc_5640 U7 optlc_20452 InstDecode GPRs Multiplier PwrCtrl AddressGen
MemXHier MemYHier optlc_75 tapfiller!SAEDSLVT14_CAPBTAP6!0 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!0 boundarycell!endcap!SAEDRVT14_CAPBTAP6!1 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!2 boundarycell!endcap!SAEDRVT14_CAPBTAP6!3 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!4 boundarycell!endcap!SAEDRVT14_CAPBTAP6!5 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!6 boundarycell!endcap!SAEDRVT14_CAPBTAP6!7 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!8 boundarycell!endcap!SAEDRVT14_CAPBTAP6!9 boundarycell!endcap!
SAEDRVT14_CAPBTAP6!10 boundarycell!endcap!SAEDRVT14_CAPBTAP6!11 boundarycell!
endcap!SAEDRVT14_CAPBTAP6!12 boundarycell!endcap!SAEDRVT14_CAPBTAP6!13
boundarycell!endcap!SAEDRVT14_CAPBTAP6!14 boundarycell!endcap!SAEDRVT14_CAPBTAP6!15
boundarycell!endcap!SAEDRVT14_CAPBTAP6!16 boundarycell!endcap!SAEDRVT14_CAPBTAP6!17
boundarycell!endcap!SAEDRVT14_CAPBTAP6!18 boundarycell!endcap!SAEDRVT14_CAPBTAP6!19
boundarycell!endcap!SAEDRVT14_CAPBTAP6!20 boundarycell!endcap!SAEDRVT14_CAPBTAP6!21
boundarycell!endcap!SAEDRVT14_CAPBTAP6!22 boundarycell!endcap!SAEDRVT14_CAPBTAP6!23
boundarycell!endcap!SAEDRVT14_CAPBTAP6!24 boundarycell!endcap!SAEDRVT14_CAPBTAP6!25
boundarycell!endcap!SAEDRVT14_CAPBTAP6!26 boundarycell!endcap!SAEDRVT14_CAPBTAP6!27
boundarycell!endcap!SAEDRVT14_CAPBTAP6!28 boundarycell!endcap!SAEDRVT14_CAPBTAP6!29
boundarycell!endcap!SAEDRVT14_CAPBTAP6!30 boundarycell!endcap!SAEDRVT14_CAPBTAP6!31
boundarycell!endcap!SAEDRVT14_CAPBTAP6!32 boundarycell!endcap!SAEDRVT14_CAPBTAP6!33
boundarycell!endcap!SAEDRVT14_CAPBTAP6!34 boundarycell!endcap!SAEDRVT14_CAPBTAP6!35
boundarycell!endcap!SAEDRVT14_CAPBTAP6!36 boundarycell!endcap!SAEDRVT14_CAPBTAP6!37
boundarycell!endcap!SAEDRVT14_CAPBTAP6!38 boundarycell!endcap!SAEDRVT14_CAPBTAP6!39
boundarycell!endcap!SAEDRVT14_CAPBTAP6!40 boundarycell!endcap!SAEDRVT14_CAPBTAP6!41
boundarycell!endcap!SAEDRVT14_CAPBTAP6!42 boundarycell!endcap!SAEDRVT14_CAPBTAP6!43
boundarycell!endcap!SAEDRVT14_CAPBTAP6!44 boundarycell!endcap!SAEDRVT14_CAPBTAP6!45
boundarycell!endcap!SAEDRVT14_CAPBTAP6!46 boundarycell!endcap!SAEDRVT14_CAPBTAP6!47
boundarycell!endcap!SAEDRVT14_CAPBTAP6!48 boundarycell!endcap!SAEDRVT14_CAPBTAP6!49
boundarycell!endcap!SAEDRVT14_CAPBTAP6!50 boundarycell!endcap!SAEDRVT14_CAPBTAP6!51
boundarycell!endcap!SAEDRVT14_CAPBTAP6!52 boundarycell!endcap!SAEDRVT14_CAPBTAP6!53
boundarycell!endcap!SAEDRVT14_CAPBTAP6!54 boundarycell!endcap!SAEDRVT14_CAPBTAP6!55
boundarycell!endcap!SAEDRVT14_CAPBTAP6!56 boundarycell!endcap!SAEDRVT14_CAPBTAP6!57
boundarycell!endcap!SAEDRVT14_CAPBTAP6!58 boundarycell!endcap!SAEDRVT14_CAPBTAP6!59
boundarycell!endcap!SAEDRVT14_CAPBTAP6!60 boundarycell!endcap!SAEDRVT14_CAPBTAP6!61
boundarycell!endcap!SAEDRVT14_CAPBTAP6!62 boundarycell!endcap!SAEDRVT14_CAPBTAP6!63
boundarycell!endcap!SAEDRVT14_CAPBTAP6!64 boundarycell!endcap!SAEDRVT14_CAPBTAP6!65
boundarycell!endcap!SAEDRVT14_CAPBTAP6!66 boundarycell!endcap!SAEDRVT14_CAPBTAP6!67
boundarycell!endcap!SAEDRVT14_CAPBTAP6!68 boundarycell!endcap!SAEDRVT14_CAPBTAP6!69
boundarycell!endcap!SAEDRVT14_CAPBTAP6!70 boundarycell!endcap!SAEDRVT14_CAPBTAP6!71
boundarycell!endcap!SAEDRVT14_CAPBTAP6!72 boundarycell!endcap!SAEDRVT14_CAPBTAP6!73
boundarycell!endcap!SAEDRVT14_CAPBTAP6!74 boundarycell!endcap!SAEDRVT14_CAPBTAP6!75
boundarycell!endcap!SAEDRVT14_CAPBTAP6!76 boundarycell!endcap!SAEDRVT14_CAPBTAP6!77
boundarycell!endcap!SAEDRVT14_CAPBTAP6!78 boundarycell!endcap!SAEDRVT14_CAPBTAP6!79
boundarycell!endcap!SAEDRVT14_CAPBTAP6!80 boundarycell!endcap!SAEDRVT14_CAPBTAP6!81
boundarycell!endcap!SAEDRVT14_CAPBTAP6!82 boundarycell!endcap!SAEDRVT14_CAPBTAP6!83
boundarycell!endcap!SAEDRVT14_CAPBTAP6!84 boundarycell!endcap!SAEDRVT14_CAPBTAP6!85
boundarycell!endcap!SAEDRVT14_CAPBTAP6!86 ...}
icc2_shell> get_macro
Error: Required argument '-group' was not found (CMD-007)
icc2_shell> get_macro_group_packing_clone_candidates
Error: Required argument '-group' was not found (CMD-007)
icc2_shell> get_pin MemXHier
Warning: No pin objects matched 'MemXHier' (SEL-004)
icc2_shell> get_pin MemXHier MemYHier
Error: extra positional option 'MemYHier' (CMD-012)
icc2_shell> get_pin MemYHier\/MemXb
Warning: No pin objects matched 'MemYHier/MemXb' (SEL-004)
icc2_shell> get_pins MemYHier\/MemXb
Warning: No pin objects matched 'MemYHier/MemXb' (SEL-004)
icc2_shell> get_cells -hierarchical -filter "is_hard_macro == true"
{MemXHier/MemXa MemXHier/MemXb MemYHier/MemXa MemYHier/MemXb}
icc2_shell> get_pins -hierarchical -of_objects MemXHier/Memxa
Error: Cannot specify '-hierarchical' with '-of_objects'. (CMD-001)
icc2_shell> get_pins -of_objects MemXHier/Memxa
Warning: Nothing implicitly matched 'MemXHier/Memxa' (SEL-003)
Error: Nothing matched for of_objects (SEL-005)
icc2_shell> get_pins *MemXHier/Memxa*
Warning: No pin objects matched '*MemXHier/Memxa*' (SEL-004)
icc2_shell> get_pins
{optlc_5661/X optlc_5661/VDD optlc_5661/VSS optlc_5662/X optlc_5662/VDD
optlc_5662/VSS U7/A1 U7/A2 U7/X U7/VDD U7/VSS optlc_15655/X optlc_15655/VDD
optlc_15655/VSS optlc_80/X optlc_80/VDD optlc_80/VSS optlc_81/X optlc_81/VDD
optlc_81/VSS optlc_5639/X optlc_5639/VDD optlc_5639/VSS optlc_83/X optlc_83/VDD
optlc_83/VSS optlc_5640/X optlc_5640/VDD optlc_5640/VSS optlc_85/X optlc_85/VDD
optlc_85/VSS optlc_86/X optlc_86/VDD optlc_86/VSS optlc_87/X optlc_87/VDD
optlc_87/VSS optlc_88/X optlc_88/VDD optlc_88/VSS optlc_89/X optlc_89/VDD
optlc_89/VSS optlc_119/X optlc_119/VDD optlc_119/VSS optlc_120/X optlc_120/VDD
optlc_120/VSS HFSINV_110_187/A HFSINV_110_187/X HFSINV_110_187/VDD
HFSINV_110_187/VSS HFSBUF_122_190/A HFSBUF_122_190/X HFSBUF_122_190/VDD
HFSBUF_122_190/VSS HFSINV_111_191/A HFSINV_111_191/X HFSINV_111_191/VDD
HFSINV_111_191/VSS HFSINV_110_193/A HFSINV_110_193/X HFSINV_110_193/VDD
HFSINV_110_193/VSS HFSINV_110_195/A HFSINV_110_195/X HFSINV_110_195/VDD
HFSINV_110_195/VSS HFSINV_110_197/A HFSINV_110_197/X HFSINV_110_197/VDD
HFSINV_110_197/VSS HFSBUF_213_200/A HFSBUF_213_200/X HFSBUF_213_200/VDD
HFSBUF_213_200/VSS optlc_15646/X optlc_15646/VDD optlc_15646/VSS HFSBUF_191_206/A
HFSBUF_191_206/X HFSBUF_191_206/VDD HFSBUF_191_206/VSS HFSBUF_221_209/A
HFSBUF_221_209/X HFSBUF_221_209/VDD HFSBUF_221_209/VSS HFSBUF_251_212/A
HFSBUF_251_212/X HFSBUF_251_212/VDD HFSBUF_251_212/VSS HFSBUF_181_215/A
HFSBUF_181_215/X HFSBUF_181_215/VDD HFSBUF_181_215/VSS HFSBUF_186_218/A
HFSBUF_186_218/X HFSBUF_186_218/VDD ...}
icc2_shell> get_pins *VDD*
Warning: No pin objects matched '*VDD*' (SEL-004)
icc2_shell> get_pins *optlc_5661/VDD*
{optlc_5661/VDD}
icc2_shell> get_pins *MemXHier/Memxa/VDD*
Warning: No pin objects matched '*MemXHier/Memxa/VDD*' (SEL-004)
icc2_shell> q
Error: ambiguous command 'q' matched 13 commands:
(query_cell_instances, query_cell_mapped, query_map_power_switch ...) (CMD-
006)
icc2_shell> get_pins *
{optlc_5661/X optlc_5661/VDD optlc_5661/VSS optlc_5662/X optlc_5662/VDD
optlc_5662/VSS U7/A1 U7/A2 U7/X U7/VDD U7/VSS optlc_15655/X optlc_15655/VDD
optlc_15655/VSS optlc_80/X optlc_80/VDD optlc_80/VSS optlc_81/X optlc_81/VDD
optlc_81/VSS optlc_5639/X optlc_5639/VDD optlc_5639/VSS optlc_83/X optlc_83/VDD
optlc_83/VSS optlc_5640/X optlc_5640/VDD optlc_5640/VSS optlc_85/X optlc_85/VDD
optlc_85/VSS optlc_86/X optlc_86/VDD optlc_86/VSS optlc_87/X optlc_87/VDD
optlc_87/VSS optlc_88/X optlc_88/VDD optlc_88/VSS optlc_89/X optlc_89/VDD
optlc_89/VSS optlc_119/X optlc_119/VDD optlc_119/VSS optlc_120/X optlc_120/VDD
optlc_120/VSS HFSINV_110_187/A HFSINV_110_187/X HFSINV_110_187/VDD
HFSINV_110_187/VSS HFSBUF_122_190/A HFSBUF_122_190/X HFSBUF_122_190/VDD
HFSBUF_122_190/VSS HFSINV_111_191/A HFSINV_111_191/X HFSINV_111_191/VDD
HFSINV_111_191/VSS HFSINV_110_193/A HFSINV_110_193/X HFSINV_110_193/VDD
HFSINV_110_193/VSS HFSINV_110_195/A HFSINV_110_195/X HFSINV_110_195/VDD
HFSINV_110_195/VSS HFSINV_110_197/A HFSINV_110_197/X HFSINV_110_197/VDD
HFSINV_110_197/VSS HFSBUF_213_200/A HFSBUF_213_200/X HFSBUF_213_200/VDD
HFSBUF_213_200/VSS optlc_15646/X optlc_15646/VDD optlc_15646/VSS HFSBUF_191_206/A
HFSBUF_191_206/X HFSBUF_191_206/VDD HFSBUF_191_206/VSS HFSBUF_221_209/A
HFSBUF_221_209/X HFSBUF_221_209/VDD HFSBUF_221_209/VSS HFSBUF_251_212/A
HFSBUF_251_212/X HFSBUF_251_212/VDD HFSBUF_251_212/VSS HFSBUF_181_215/A
HFSBUF_181_215/X HFSBUF_181_215/VDD HFSBUF_181_215/VSS HFSBUF_186_218/A
HFSBUF_186_218/X HFSBUF_186_218/VDD ...}
icc2_shell> get_pins *VDD
Warning: No pin objects matched '*VDD' (SEL-004)
icc2_shell> get_pins -of [get_cells MemXHier/MemXa] -filter "pin_direction == in"
{{MemXHier/MemXa/A[0]} {MemXHier/MemXa/A[1]} {MemXHier/MemXa/A[2]}
{MemXHier/MemXa/A[3]} {MemXHier/MemXa/A[4]} {MemXHier/MemXa/A[5]}
{MemXHier/MemXa/A[6]} {MemXHier/MemXa/A[7]} MemXHier/MemXa/CE MemXHier/MemXa/CSB
{MemXHier/MemXa/I[0]} {MemXHier/MemXa/I[10]} {MemXHier/MemXa/I[11]}
{MemXHier/MemXa/I[12]} {MemXHier/MemXa/I[13]} {MemXHier/MemXa/I[14]}
{MemXHier/MemXa/I[15]} {MemXHier/MemXa/I[16]} {MemXHier/MemXa/I[17]}
{MemXHier/MemXa/I[18]} {MemXHier/MemXa/I[19]} {MemXHier/MemXa/I[1]}
{MemXHier/MemXa/I[20]} {MemXHier/MemXa/I[21]} {MemXHier/MemXa/I[22]}
{MemXHier/MemXa/I[23]} {MemXHier/MemXa/I[24]} {MemXHier/MemXa/I[25]}
{MemXHier/MemXa/I[26]} {MemXHier/MemXa/I[27]} {MemXHier/MemXa/I[28]}
{MemXHier/MemXa/I[29]} {MemXHier/MemXa/I[2]} {MemXHier/MemXa/I[30]}
{MemXHier/MemXa/I[31]} {MemXHier/MemXa/I[3]} {MemXHier/MemXa/I[4]}
{MemXHier/MemXa/I[5]} {MemXHier/MemXa/I[6]} {MemXHier/MemXa/I[7]}
{MemXHier/MemXa/I[8]} {MemXHier/MemXa/I[9]} MemXHier/MemXa/OEB MemXHier/MemXa/WEB
MemXHier/MemXa/VDD MemXHier/MemXa/VSS}
icc2_shell> get_nets -of [MemXHier/MemXa/VDD]
Error: unknown command 'MemXHier/MemXa/VDD' (CMD-005)
icc2_shell> get_nets -of [get_pins -of [get_cells MemXHier/MemXa] -filter
"pin_direction == in"]
{{MemXHier/common_address[0]} {MemXHier/common_address[1]}
{MemXHier/common_address[2]} {MemXHier/common_address[3]}
{MemXHier/common_address[4]} {MemXHier/common_address[5]}
{MemXHier/common_address[6]} {MemXHier/common_address[7]} MemXHier/clock
MemXHier/p38 {MemXHier/Product[0]} {MemXHier/Product[10]} {MemXHier/Product[11]}
{MemXHier/Product[12]} {MemXHier/Product[13]} {MemXHier/Product[14]}
{MemXHier/Product[15]} {MemXHier/Product[16]} {MemXHier/Product[17]}
{MemXHier/Product[18]} {MemXHier/Product[19]} {MemXHier/Product[1]}
{MemXHier/Product[20]} {MemXHier/Product[21]} {MemXHier/Product[22]}
{MemXHier/Product[23]} {MemXHier/Product[24]} {MemXHier/Product[25]}
{MemXHier/Product[26]} {MemXHier/Product[27]} {MemXHier/Product[28]}
{MemXHier/Product[29]} {MemXHier/Product[2]} {MemXHier/Product[30]}
{MemXHier/Product[31]} {MemXHier/Product[3]} {MemXHier/Product[4]}
{MemXHier/Product[5]} {MemXHier/Product[6]} {MemXHier/Product[7]}
{MemXHier/Product[8]} {MemXHier/Product[9]} MemXHier/p81 MemXHier/WrtEnbX
MemXHier/VDD MemXHier/VSS}
icc2_shell> gui_show_man_page get_nets
icc2_shell> connect_pg_nets -nets{VDD} - MemXHier/VDD
Error: unknown command 'connect_pg_nets' (CMD-005)
icc2_shell> connect_pg_net -nets{VDD} - MemXHier/VDD
Error: unknown option '-nets{VDD}' (CMD-010)
Error: extra positional option 'MemXHier/VDD' (CMD-012)
icc2_shell> connect_pg_net -nets{VDD} -MemXHier/VDD
Error: unknown option '-nets{VDD}' (CMD-010)
Error: unknown option '-MemXHier/VDD' (CMD-010)
icc2_shell> connect_pg_net -net{VDD} -MemXHier/VDD
Error: unknown option '-net{VDD}' (CMD-010)
Error: unknown option '-MemXHier/VDD' (CMD-010)
icc2_shell> connect_pg_net -net{VDD} -MemXHier/VDD
Error: unknown option '-net{VDD}' (CMD-010)
Error: unknown option '-MemXHier/VDD' (CMD-010)
icc2_shell> connect_pg_net -nets{VDD} -MemXHier/VDD
Error: unknown option '-nets{VDD}' (CMD-010)
Error: unknown option '-MemXHier/VDD' (CMD-010)
icc2_shell> gui_show_man_page connect_pg_net
icc2_shell> connect_pg_nets -automatic
Error: unknown command 'connect_pg_nets' (CMD-005)
icc2_shell> connect_pg_net -automatic
****************************************
Report : Power/Ground Connection Summary
Design : ChipTop
Version: T-2022.03-SP5
Date : Tue Apr 15 18:15:27 2025
****************************************
P/G net name P/G pin count(previous/current)
--------------------------------------------------------------------------------
Power net VDD 15206/15206
Ground net VSS 15186/15186
--------------------------------------------------------------------------------
Information: connections of 0 power/ground pin(s) are created or changed.
1
icc2_shell> gui_show_man_page connect_pg_net
icc2_shell> connect_pg_net -net VDD [get_pins MemXHier/MemXa/VDD]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -net VSS [get_pins MemXHier/MemXa/VSS]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -net VSS [get_pins MemXHier/MemXb/VSS]
1
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemYb/VSS]
Warning: No pin objects matched 'MemYHier/MemYb/VSS' (SEL-004)
Error: Nothing matched for port_pin_list (SEL-005)
Error: bad value specified for option port_pin_list
Use error_info for more info. (CMD-013)
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXb/VSS]
1
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
 Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -automatic
****************************************
Report : Power/Ground Connection Summary
Design : ChipTop
Version: T-2022.03-SP5
Date : Tue Apr 15 18:20:03 2025
****************************************
P/G net name P/G pin count(previous/current)
--------------------------------------------------------------------------------
Power net VDD 15206/15206
Ground net VSS 15186/15186
--------------------------------------------------------------------------------
Information: connections of 0 power/ground pin(s) are created or changed.
1
icc2_shell> gui_show_man_page connect_pg_net
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS] -
report_connection_summary
Error: value not specified for option '-report_connection_summary' (CMD-008)
Error: Cannot specify '-report_connection_summary' with '-net'. (CMD-001)
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS] -
report_connection_summary true
Error: Cannot specify '-report_connection_summary' with '-net'. (CMD-001)
icc2_shell> connect_pg_net -report_connection_summary true
****************************************
Report : Power/Ground Connection Summary
Design : ChipTop
Version: T-2022.03-SP5
Date : Tue Apr 15 18:21:38 2025
****************************************
P/G net name P/G pin count(previous/current)
--------------------------------------------------------------------------------
Power net VDD 15206/15206
Ground net VSS 15186/15186
--------------------------------------------------------------------------------
Information: connections of 0 power/ground pin(s) are created or changed.
1
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS MemYHier/MemXb/VSS
MemXHier/MemXa/VSS MemXHier/MemXa/VSS ]
Error: extra positional option 'MemYHier/MemXb/VSS' (CMD-012)
Error: extra positional option 'MemXHier/MemXa/VSS' (CMD-012)
Error: extra positional option 'MemXHier/MemXa/VSS' (CMD-012)
icc2_shell> connect_pg_net -net VSS [get_pins {MemYHier/MemXa/VSS
MemYHier/MemXb/VSS MemXHier/MemXa/VSS MemXHier/MemXa/VSS} ]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -net VSS -create_nets_only [get_pins
MemYHier/MemXa/VSS]
Error: Cannot specify '-create_nets_only' with '-net'. (CMD-001)
Error: Cannot specify '-create_nets_only' with 'port_pin_list'. (CMD-001)
icc2_shell> connect_pg_net -net VSS [get_nets [get_pins MemYHier/MemXa/VSS]]
Warning: No objects from '_sel21914' were of the correct class. (SEL-010)
Warning: No net objects matched '_sel21914' (SEL-004)
Error: Nothing matched for port_pin_list (SEL-005)
Error: bad value specified for option port_pin_list
Use error_info for more info. (CMD-013)
icc2_shell> get_nets [get_pins MemYHier/MemXa/VSS]
Warning: No objects from '_sel21991' were of the correct class. (SEL-010)
Warning: No net objects matched '_sel21991' (SEL-004)
icc2_shell> get_net [get_pins MemYHier/MemXa/VSS]
Warning: No objects from '_sel22030' were of the correct class. (SEL-010)
Warning: No net objects matched '_sel22030' (SEL-004)
icc2_shell> get_nets -of [get_pins MemYHier/MemXa/VSS]
{MemYHier/VSS}
icc2_shell> connect_pg_net -net VSS [get_nets -of [get_pins MemYHier/MemXa/VSS]]
Warning: Collection '_sel22186 (*)' has inappropriate type (net). (SEL-002)
Error: Nothing matched for port_pin_list (SEL-005)
Error: bad value specified for option port_pin_list
Use error_info for more info. (CMD-013)
icc2_shell> connect_pg_net -net VSS [MemYHier/VSS]
Error: unknown command 'MemYHier/VSS' (CMD-005)
icc2_shell> connect_pg_net -net VSS MemYHier/VSS
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -create_nets_only
****************************************
Report : Power/Ground Connection Summary
Design : ChipTop
Version: T-2022.03-SP5
Date : Tue Apr 15 18:32:55 2025
****************************************
P/G net name P/G pin count(previous/current)
--------------------------------------------------------------------------------
Power net VDD 15206/15206
Ground net VSS 15186/15186
--------------------------------------------------------------------------------
Information: connections of 0 power/ground pin(s) are created or changed.
1
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS MemXHier/MemXa/VSS
MemXHier/MemXb/VSS]
Error: extra positional option 'MemXHier/MemXa/VSS' (CMD-012)
Error: extra positional option 'MemXHier/MemXb/VSS' (CMD-012)
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> connect_pg_net -net VSS [get_pins MemYHier/MemXa/VSS] -verbose
1
icc2_shell> report_pg_strategies
#------------------------------------------#
name: S_default_vddvss
region:
Region: core area
Coordinate: {{15.0000 15.0000} {15.0000 414.6000} {414.9700 414.6000}
{414.9700 15.0000} }

Pattern Expression :
pattern: P_top_two
nets: VDD VSS
parameters:
offset: undefined undefined
offset start: boundary
pitch: undefined undefined
repeat: undefined undefined

Instantiated Pattern :
Pattern Name: P_top_two
Type: Mesh Pattern
Parameters:
Layers:
{ {horizontal_layer : M8} {width : {0.4 }} {spacing : interleaving} {trim : true}
{track_alignment : none} {pitch : 20} {offset : 4} }
{ {vertical_layer : M9} {width : {0.4 }} {spacing : interleaving} {trim : true}
{track_alignment : none} {pitch : 20} {offset : 2} }
Via Rules:
{intersection: all} {via_master : {default}}
Extension:
Nets:
Layers:
Sides:
Direction: LRTB
Stop: design boundary and generate pin

Blockage:
#------------------------------------------#
name: std_rail_1
region:
Region: core area
Coordinate: {{15.0000 15.0000} {15.0000 414.6000} {414.9700 414.6000}
{414.9700 15.0000} }

Pattern Expression :
pattern: std_rail_conn1
nets: VDD VSS
parameters:
offset: undefined undefined
offset start: boundary

Instantiated Pattern :
Pattern Name: std_rail_conn1
Type: Standard Cell Rail Pattern
Rail Width: undefined undefined
Rail Layers: M1
Rail Shift: undefined undefined
Rail Masks: no_mask no_mask
Rail pin DRC option: false
Mark as follow pin option: false
Parameters:

Extension:

Blockage:
#------------------------------------------#
icc2_shell> connect_pg_net -net {VSS} [get_pins MemYHier/MemXa/VSS] -verbose
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
 Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 2 seconds.
icc2_shell> get_nets VSS
{VSS}
icc2_shell> get_nets VDD
{VDD}
icc2_shell> get_pins MemYHier/MemXa/VSS
{MemYHier/MemXa/VSS}
icc2_shell> get_pins MemXHier/MemXa/VSS
{MemXHier/MemXa/VSS}
icc2_shell> get_pins MemXHier/MemXb/VSS
{MemXHier/MemXb/VSS}
icc2_shell> connect_pg_net -net VSS -reconnect true -verbose [get_pins
MemYHier/MemXa/VSS]
1
icc2_shell> check_pg_connectivity
Information: The command 'check_pg_connectivity' cleared the undo history. (UNDO-
016)
Checking secondary net through power switch is enabled.
Secondary net will be checked together from primary net. They will be treated as
the same net
Primary Net : VDD Secondary Net:
Primary Net : VSS Secondary Net:
Loading cell instances...
Number of Standard Cells: 15182
Number of Macro Cells: 4
Number of IO Pad Cells: 0
Number of Blocks: 0
Loading P/G wires and vias...
Number of VDD Wires: 926
Number of VDD Vias: 45020
Number of VDD Terminals: 80
**************Verify net VDD connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 0
Number of floating I/O pads: 0
 Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Loading cell instances...
Loading P/G wires and vias...
Number of VSS Wires: 925
Number of VSS Vias: 44848
Number of VSS Terminals: 80
**************Verify net VSS connectivity*****************
Number of floating wires: 0
Number of floating vias: 0
Number of floating std cells: 0
Number of floating hard macros: 4
Number of floating I/O pads: 0
Number of floating terminals: 0
Number of floating hierarchical blocks: 0
************************************************************
Overall runtime: 1 seconds.
icc2_shell> gui_show_man_page connect_net
icc2_shell> save_block -as placement_done
Information: Saving block 'post_import_design:placement_done.design'
1
icc2_shell> close_blocks
Closing block 'post_import_design:placement_done.design'
1
icc2_shell> stop_gui
icc2_shell> close_lib
Closing library 'post_import_design'
1
icc2_shell> exit
Maximum memory usage for this session: 1007.28 MB
Maximum memory usage for this session including child processes: 1007.28 MB
CPU usage for this session: 1033 seconds ( 0.29 hours)
Elapsed time for this session: 9851 seconds ( 2.74 hours)
Thank you for using IC Compiler II.