Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

EXPERIMENT – 8
PRACTICAL OP-AMP APPLICATIONS - II
(SIGNAL PROCESSING CIRCUITS)

8.1 INTRODUCTION
This experiment explores the design, implementation, and analysis of precision analog
circuits, including:
• Precision Half-Wave Rectifier (HWR)
• Precision Full-Wave Rectifier (FWR)
• Precision Positive Peak Clipper
• Precision Negative Clamper
The objectives will guide you through designing, simulating, building, and testing each
circuit.

8.2. OBJECTIVES
Upon completion of this experiment, students will be able to:
1. Design each circuit mentioned above as per the specific performance
requirements.
2. Simulate each designed circuit in LTspice to verify its functionality and predict its
performance.
3. Construct each circuit on a breadboard using the designed schematic and
selected component values.
4. Measure key voltage levels, waveforms, and circuit parameters (e.g., rectification
efficiency, clipping levels, clamping voltage) using appropriate test equipment
(multimeter, oscilloscope).
5. Plot the measured data on linear graph paper or using a computer plotting tool to
visualize circuit behavior.
6. Compare the experimental measurements with the LTspice simulation results
and the initial design calculations. Analyze any discrepancies and identify
potential sources of error.
7. Solve advanced problems related to the circuits as part of the post-lab work.
Address challenging questions and scenarios related to the circuit behavior,
component variations, and non-ideal effects.
8. Document the entire experimental process, including:
▪ Design calculations and LTspice simulation results.
▪ Detailed schematic diagrams.
▪ Breadboard implementation details.
▪ Measured data and graphs.
▪ Analysis of results and comparison with simulations.
▪ Solutions to advanced problems and overall conclusions.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

8.3. EXPECTED OUTCOMES

By the end of this experiment, you will have a practical understanding of precision
rectifier, clipper, and clamper circuits and their applications in signal processing. You will
also enhance your skills in circuit design, simulation, breadboarding, measurement, and
technical reporting.

Note: Please read through the entire experiment and come prepared for your lab
session. This will help you to effectively use your lab time and meet the objectives
effectively.

8.4. HARDWARE REQUIRED

a. Power supply : Variable regulated low voltage DC source
b. Equipment : AFO, DSO, DMM
c. Resistors :
d. Capacitors :
e. Semiconductors : IC741, General-purpose diode 1N4001, 5.1 V Zener
diode
f. Miscellaneous : Breadboard and wires

8.5. THEORY
The use of op-amps can improve the performance of a wide variety of signal-processing
circuits. For one thing, the op-amp can eliminate the effect of diode offset voltage,
allowing us to rectify, peak-detect, clip, and clamp low-level signals (those with
amplitudes smaller than the offset voltage). And because of their buffering action op-
amps can eliminate the effects of source and load on diode circuits. Circuits that
combine op-amps and diodes are called active diode circuits.
The major limitation of an ordinary diode is that it cannot rectify voltages below Vϒ
(≈0.6V) the cut-in voltage of the diode. A circuit that acts like an ideal diode can be
designed by placing a diode in the feedback loop of an op-amp as in Fig. 8.1. Here the
cut-in voltage is divided by the open loop gain AOL (≈ 104) of the op-amp so that Vϒ is
virtually eliminated. This circuit is called the precision diode and is capable of rectifying
input signals of the order of millivolt. Some typical applications of a precision diode will
be tested in this experiment:
1. Half-wave rectifier
2. Full-wave rectifier
3. Clipper
4. Clamper

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

Fig. 8.1: Precision Diode Circuit

While the input waveform is in its negative half-cycle, the output of the op-amps in Fig.
8.1 is saturated in a negative direction. Some time is required to get the op-amp out of
saturation, and this will limit the frequency response of the circuit. For high-frequency
performance, a non-saturating precision rectifier circuit must be used.

8.5.1. Non-Saturating Precision Half-Wave Rectifier

An inverting amplifier can be converted into an ideal half-wave rectifier by adding two
diodes as shown in Fig. 8.2. When Vi is positive, diode D1 conducts causing VOA (output of
op-amp) to go negative by one diode drop (≈ 0.6 V). Hence diode D2 is reverse-biased. The
output voltage Vo is zero, because, for all practical purposes, no current flows through RF
and the input current flows through D1. For negative input, i.e., Vi < 0, diode D2 conducts
and D1 is off. The negative input Vi forces the op-amp output VOA positive and causes D2
to conduct. The circuit then acts like an inverter for RF = R1 and output Vo becomes
positive.

Fig. 8.2: Precision Half-Wave Rectifier Circuit

The op-amp in the circuit of Fig. 8.2 must be a high-speed op-amp since it
alternates between open-loop and closed-loop operations. The principal limitation of
this circuit is the slew rate of the op-amp. As the input passes through zero, the op-amp
output VOA must change from 0.6 V to - 0.6 V or vice-versa as quickly as possible in order
to switch over the conduction from one diode to the other. The circuit of Fig. 8.2 provides
a positive output. However, if both the diodes are reversed, then only a positive input
signal is transmitted and gets inverted. The circuit then provides a negative output.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

Advantages of op-amp precision rectifier circuits over simple diode rectifiers:

1. No diode voltage drop between input and output.
2. The ability to rectify very small voltages (much smaller than the typical 0.7 V
diode forward voltage drop).
3. Amplification, if required.
4. Low output impedance.

8.5.2. Precision Full-Wave Rectifier

The left side of the circuit in Fig. 8.3 is a precision half-wave rectifier as in Fig. 8.2, but
with the diodes reversed. The right side is an inverting summing amplifier circuit (as you
have done in experiment 7). The input voltage is applied to the terminal a of the summing
amplifier and to the input of the precision rectifier. Note that resistor R2 in the precision
half-wave rectifier circuit has twice the resistance of R1, so the rectified voltage applied
to terminal b of the summing amplifier is —2Vi, as illustrated.

Fig. 8.3: Precision Full-Wave Rectifier Circuit

During the positive half-cycle of the input, the voltage at terminal a is +Vi, while that at
terminal b is -2V. The output from the summing circuit with R5 = R4 is
R6 R R
Vo = − (Va + Vb ) = − 6 (Vi − 2Vi ) = 6 Vi
R4 R4 R4
During the negative half-cycle of the input, Va = —Vi and Vb = 0. Consequently, the output
is
R6 R
Vo = − ( −Vi + 0 ) = 6 Vi
R4 R4
It is seen that the output is a full-wave rectified version of the input voltage.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

Design Considerations:
▪ If resistor R6 = R4 = R5, the circuit has an overall voltage gain of 1.
▪ When R6 is > R4 and R5, amplification and rectification both occur.
▪ A precision full-wave rectifier circuit is also known as an absolute value circuit.
This means the circuit output is the absolute value of the input peak voltage
regardless of the input polarity.
▪ To present a high input impedance to the signal source, a precision full-wave
rectifier that uses a non-inverting configuration can be used.

8.5.3. Precision Clipper Circuits

A clipper circuit, also known as a limiter, is an electronic circuit designed to prevent a
signal from exceeding a predetermined voltage level. It "clips" off the portion of a
waveform above or below a certain voltage. Clipper circuits use diodes to perform this
function, leveraging the diode's forward voltage drop to conduct and limit the voltage.
Clippers can be classified as:
1. Positive Clippers: These circuits clip off the positive portion of the input
waveform above a certain voltage level.
2. Negative Clippers: These circuits clip off the negative portion of the input
waveform below a certain voltage level.
3. Peak Clippers: These circuits limit both the positive and negative peaks of the
input waveform. This is achieved by clipping both the positive and negative
portions of the waveform at predetermined voltage levels. Peak clippers are
sometimes referred to as combination clippers or dual clippers.

Fig. 8.4 (a) shows an active positive clipper, a circuit that removes positive parts of the
input signal. The clipping level is determined by the reference voltage Vref.

(a)

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

(b) (c)

Fig 8.4: (a) Active Positive Clipper, (b) input & output waveforms with +Vref,
(c) input & output waveforms with -Vref

The positive clipper of Fig. 8.4 can be easily converted into a negative clipper by simply
reversing the diode D and changing the polarity of the reference voltage Vref. The negative
clipper clips off the negative parts of the input signal below the reference voltage.
Peak clippers use back-to-back connected Zener diodes (and sometimes bias
voltages too) to clip off both the positive and negative peaks of the signal. Fig. 8.5 shows
a peak clipper circuit that is basically an inverting amplifier with a clipping network in the
feedback path. The clipping network consists of two back-to-back Zener diodes (D1 and
D2) in series. This circuit takes an input signal and amplifies it, but the output voltage is
limited (clipped) to the range of -(VZ + VF) to +(VZ + VF).

Fig. 8.5: Peak Clipper Circuit

When the output voltage (Vo) is between the Zener breakdown voltage (VZ) plus the
forward voltage drop of a diode (VF) (i.e., - (Vz+VF) < Vo < (VZ+VF), both Zener diodes are
effectively open circuits. In this region, the op-amp acts as a standard inverting amplifier.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

The gain of the amplifier is approximately -R2/R1. The output voltage is an amplified and
inverted version of the input voltage (Vi).
When the output voltage (Vo) tries to exceed +(VZ + VF), Zener diode D2 breaks down
and D1 conducts in the forward direction. This effectively clamps the voltage at the op-
amp's inverting input to a voltage close to the ground. The op-amp output voltage is
limited to VZ + VF. Any further increase in the input signal will not cause the output to
increase beyond this level.
When the output voltage (Vo) tries to go below -(VZ + VF), Zener diode D1 breaks
down and D2 conducts in the forward direction. Again, this clamps the voltage at the op-
amp's inverting input to a voltage close to the ground. The op-amp output voltage is
limited to -(VZ + VF). Any further decrease in the input signal will not cause the output to
decrease beyond this level.

Design ideas:
▪ To design a peak clipper circuit, the Zener diodes are first selected to limit the
output voltage at the desired level, bearing in mind that VF is typically 0.7 V. Then,
the inverting amplifier is designed to have the required voltage gain.
▪ Note that when the output reaches the limiting level, part of the current goes
through resistor R2, and part flows through the diodes. The resistor current must
be greater than the minimum level required for Zener breakdown, typically
around 0.5 mA.

8.5.4. Precision Clamper

A clamper circuit, also known as a DC restorer, shifts the entire waveform up or down to
a different DC level. An op-amp-based clamper is designed to achieve this DC shift with
higher precision and control compared to simpler diode-based clampers. The main
purpose of a clamper is to add a DC level to an AC signal. Op-amp clampers can be
classified based on the direction of the DC shift they introduce:
1. Positive Clamper: This circuit shifts the input waveform upwards, so the lowest
point of the waveform is clamped to a certain voltage level (ideally 0V, but it can
be a different voltage if a reference voltage is used).
2. Negative Clamper: This circuit shifts the input waveform downwards, so the
highest point of the waveform is clamped to a certain voltage level.
3. Peak Clamper:

A clamper circuit with a variable DC level is shown in Fig. 8.6 (a). Here, the circuit shifts
the entire input waveform upwards so that its minimum value is at 0V, effectively
"clamping" the waveform to the 0V level or to a different voltage if a reference voltage is
used. Hence, the circuit is called a positive clamper.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

(a)

(b) (c) (d)

Fig 8.6: (a) Peak clamper circuit, (b, c, d) Input and output waveforms (i) with Vref=0V, (ii) with
+Vref, (iii) with -Vref
The input signal (Vin) is AC-coupled to the circuit through the capacitor C1. This means
that only the AC component of the input signal passes through; any DC component is
blocked. When the input signal goes negative, the diode D1 becomes forward biased and
conducts. This allows the capacitor C1 to charge up to approximately the peak negative
voltage (-Vp) of the input signal, minus the diode forward voltage drop (VF). We'll assume
VF is negligible for simplicity.
When the input signal goes positive, the diode D1 becomes reverse-biased and
does not conduct. The capacitor C1 holds its charge (ideally if we ignore any leakage). The
voltage at the output (Vo) is now the sum of the input voltage (Vin) and the voltage stored
on the capacitor (approximately Vp). Because the capacitor is charged to approximately
the peak negative voltage (-Vp) of the input, the output voltage (Vo) is shifted upwards by
this amount. The lowest point of the output waveform is clamped to approximately 0V
(ideally, but it will be slightly more due to the diode drop).
The op-amp is configured as a non-inverting buffer. Its purpose is to provide a high
input impedance and a low output impedance. This prevents the load (RL) from
discharging the capacitor C1, which would disrupt the clamping action. The non-inverting
configuration isolates the clamping circuit from the load, ensuring it functions properly.
For precision clamping C1Rd<<T/2, where Rd is the forward resistance of the diode D1 (100

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

 typically) and T is the time period of Vin. The input and output waveforms are shown in
Fig. 8.6 (b, c & d).

Important Design Considerations:

• Negative Clamping: Negative clamping at a negative voltage is accomplished
by reversing diode D1 and using the negative reference voltage –Vref.
• Time constant: Like other RC circuits, clamper circuits feature a characteristic
time constant ‘τ=RC’. This time constant is an indication of the time it takes for
the capacitor to charge and discharge. If the time constant is much less than
the period of the AC source, the capacitor will function as a voltage source
through each cycle.
• Op-Amp Configuration: The specific configuration of the op-amp (inverting,
non-inverting, etc.) and the placement of the clamping components (diode,
capacitor, and any reference voltages) determine the behaviour of the clamper.
• Precision: Op-amp-based clampers offer better precision and control over the
clamping level than simple diode-based clampers.
• Applications: Clamping circuits are used in various applications, including
video signal processing, signal conditioning, and power supplies.

A peak clamper (also known as a DC restorer) is a circuit that shifts an AC signal so that
either its positive or negative peak is clamped to a specific DC voltage level. The circuit
of a peak clamper is depicted in Fig. 8.7, and it’s an example of a negative peak clamper,
where the negative peak is clamped to near 0V.

Fig. 8.7: Negative Peak Clamping Circuit

The input signal (Vi) is AC-coupled to the circuit through capacitor C1. The op-amp is
configured to act as a comparator, controlling the conduction of diodes D1 and D2. It compares
the voltage at its inverting input (derived from the output voltage and the voltage across C 1)

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

with the voltage at its non-inverting input (which is effectively ground due to R2). The resistors
R1 and R2 provide negative feedback, stabilizing the circuit.
When the input signal (Vi) goes positive, the voltage at the inverting input of the op-
amp tends to go more positive (because the op-amp inverting input is connected to the output
through resistor R1) with respect to the grounded non-inverting input terminal. This causes the
op-amp output to go negative (-VEE). This forward biases diode D2 and reverse biases D1. Now,
the negative feedback via D2 and R1 keeps the op-amp inverting input terminal close to 0 V (or
within microvolts of the ground level). So, the circuit output is held close to ground level (Vo
= 0 V). This causes C1 to charge to the positive peak value of the input signal Vi.
When the input signal (Vi) goes negative, the voltage at the inverting input of the op-
amp tends to go negative with respect to the grounded non-inverting input terminal. This causes
the op-amp output to go positive (+VCC). This forward biases diode D1 and reverse biases D2.
Now, the negative feedback via D1 keeps the op-amp inverting input terminal close to 0 V (or
within microvolts of the ground level). With D2 reverse biased, the circuit output is connected
to the circuit input via C1 (which is already charged to the positive peak value of the input
signal), giving an output of
Vo = Vi + VC1 = −VP + (−VP ) = −2VP
Thus, the input waveform is reproduced at the output with its upper level clamped precisely at
the ground. That is, the output waveform is a replica of the input waveform, but shifted
downwards so that its positive peak is clamped to 0V. The entire signal is now below 0V. The
signal is "riding" on a DC level equal to the peak voltage.

Design ideas:
• Reversing the polarities of D1 and D2 in Fig. 8.7 produces a clamping of the lower
level of the output waveform.
• Including a bias voltage (VB) at the op-amp non-inverting input terminal allows the
output to be clamped at the level of VB.
• Recall that in a resistive-capacitive circuit, the time constant of the circuits is τ = RC.
Only at a period of five time constants, i.e., τ = 5RC, is the capacitor fully charged.
So, in any clamping circuit, 5C1 RS = 5 T 2 , where RS is the signal source resistance
(which is the only resistance in series with the capacitor when it is charging) and T
is the time period of the waveform.

8.6. CIRCUIT DESIGN

8.6.1. Precision Half-Wave Rectifier
Design a non-saturating precision half-wave rectifier (as in Fig. 8.2) to produce a 2 V peak
output from a 100 Hz sine wave input with a 0.5 V peak value. Use a bipolar op-amp with
a supply voltage of ±15 V.

Solution
Select I1 = 500 µA (for adequate diode current)

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

Vi
R1 = =
I1
Vo
R2 = =
I1
R3 = R1 R2 =

8.6.2. Precision Full-Wave Rectifier

Design a precision full-wave rectifier (as in Fig. 8.3) to produce a 2 V peak output from a
100 Hz sine wave input with a 0.5 V peak value. Use a bipolar op-amp with a supply
voltage of ±15 V.

Solution
Select I1 = 500 µA (for adequate diode current)
Vi
R1 = =
I1
R2 = 2 R1 =
R3 = R1 R2 =
R4 = R5 = R1 =
For the output to be 2 V when the input is 0.5 V,
Vo
R6 =  R5 =
Vi
R7 = R4 R5 R6 =

8.6.3. Precision Clipper Circuit

Design an adjustable peak clipping circuit (as in Fig. 8.5) to clip at approximately ±5.9 V.
The circuit is to have unity voltage gain before clipping. Use a bipolar op-amp with a
supply voltage of ±15 V.

Solution
Vo (max) = VZ + VF = 5.8V
VZ = Vo (max) − VF = 5.8V − 0.7V = 5.1V (use a 5.1 V Zener diode)
Since ACL = 1, R2 = R1 =
R3 = R1 R2 =

8.6.4. Precision Clamper Circuit

A ±5 V, 10 KHz sine / square wave from a signal source with a resistance of 50 Ω is to have
its positive peak clamped precisely at ground level. The circuit is to have unity voltage

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

gain before clipping. Design a suitable clamping circuit as in Fig. 8.7. Use a bipolar op-
amp with a supply voltage of ±15 V.

Solution
In any clamping circuit,
5C1 RS = 5 T 2
where RS is the signal source resistance (which is the only resistance in series with the
capacitor when it is charging) and T is the time period of the waveform.
T 1
C1 = = =
2 Rs 2 Rs f
When C1 is discharging via R1, the voltage across R1 is
Vo = 2Vp
Select I1 = 500 µA. The voltage across R1 can also be expressed as
Vo = 2Vp = I1  R1
2Vp 25
R1 = = =
I1 500
Since ACL = 1, R2 = R1 =

8.7. PRE-LAB WORK

General Instructions for Pre-Lab Simulation
1. For each problem statement, create the circuit schematic in LTspice using the
designed component values.
2. Use a general-purpose op-amp model (e.g., the LT1014 model available in
LTspice) if a specific model is not specified.
3. Use appropriate voltage sources for +VCC and -VEE (e.g., +15V and -15V DC
sources).
4. Run transient simulations to observe the input and output waveforms.
5. Clearly label all nodes in your schematic to facilitate waveform analysis.
6. Record all relevant simulation results (waveforms, voltage levels) and save your
LTspice schematic for inclusion in your lab report.

Problem Statements
1. Precision Half-Wave Rectifier: Simulate the precision half-wave rectifier circuit
shown in Fig. 8.2 using LTspice. Apply a 100 Hz sine wave input signal (Vi) with an
amplitude of ±0.5V. Observe and plot the input waveform (Vi) and the output
waveform (Vo). Determine the peak voltage of the rectified output and compare it
with the expected theoretical value. Explain the effect of R3.

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2. Precision Full-Wave Rectifier: Simulate the precision full-wave rectifier circuit

shown in Fig. 8.3 using LTspice. Assume R1 = 1 kΩ, therefore, R2 = 2 kΩ. Choose
suitable values for R3, R4, R5, R6, and R7 to obtain a gain of -1 in both the inverting
amplifier stage (A1) and the summing amplifier stage (A2). Apply a 100 Hz sine
wave input signal (Vi) with an amplitude of ±0.5V. Observe and plot the waveforms
at the input (Vi), at point 'a' (Va), at point 'b' (Vb), and at the output (Vo). Determine
the peak voltage of the full-wave rectified output and explain the purpose of the
summing amplifier stage.
3. Precision Clipper: Simulate the precision positive peak clipper circuit shown in
Fig. 8.5 using LTspice. Apply a 1 kHz sine wave input signal (V i) with an amplitude
of ±8V. Select Zener diodes D1 and D2 with a Zener voltage (Vz) of 5.1V. Observe
and plot the input waveform (Vi) and the output waveform (Vo). Determine the
clipping voltage level and compare it with the expected value based on the Zener
voltage. Explain how this circuit clips the positive peak of the input signal.
4. Precision Clamper: Simulate the precision negative peak clamper circuit shown
in Fig. 8.7 using LTspice. Apply a 10 KHz sine wave input signal (Vi) with an
amplitude of ±5V. Observe and plot the input waveform (Vi) and the output
waveform (Vo). Verify that the negative peak of the output waveform is clamped to
approximately 0V. Measure the peak-to-peak voltage of the output waveform (Vp-
p). Explain the function of capacitor C1 and how it contributes to the clamping

action.

8.8. EXPERIMENTAL WORK

(1) Precision Half-Wave Rectifier (HWR) Circuit
1.1 Design the HWR circuit using the design approach given in Section 8.6.1.
1.2 Construct the non-saturating precision HWR circuit shown in Fig. 8.2 on a
breadboard using the designed schematic and selected component values.
Ensure proper wiring and component placement for reliable circuit operation.
1.3 Use a ±15 V supply, and connect the sinusoidal signal generator, power supply,
and oscilloscope as illustrated.
1.4 Adjust the signal generator to produce a 100 Hz, ±0.5 V sinusoidal wave input.
1.5 Observe the input and half-wave rectified output waveform on an oscilloscope.
1.6 Record the values of peak amplitude, period and frequency of both input and
output waveforms in Table 8.1.
1.7 Plot the waveforms on a graph sheet or using a computer plotting tool to visualize
the circuit behaviour.
1.8 Compare the experimental measurements with the LTspice simulation results
and the initial design calculations. Analyze any discrepancies and identify
potential sources of error.
1.9 Comment on the relationship between the frequency of input and rectified
output waveforms.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

(2) Precision Full-Wave Rectifier (FWR) Circuit

2.1 Design the FWR circuit using the design approach given in Section 8.6.2.
2.2 Construct the non-saturating precision FWR circuit shown in Fig. 8.3 on a
breadboard using the designed schematic and selected component values.
Ensure proper wiring and component placement for reliable circuit operation.
2.3 Use a ±15 V supply, and connect the sinusoidal signal generator, power supply,
and oscilloscope as illustrated.
2.4 Adjust the signal generator to produce a 100 Hz, ±0.5 V sinusoidal wave input.
2.5 Observe the input and full-wave rectified output waveform on an oscilloscope.
2.6 Measure and record the values of peak amplitude, period and frequency of both
input and output waveforms in Table 8.1.
2.7 Plot the waveforms on a graph sheet or using a computer plotting tool to visualize
the circuit behaviour.
2.8 Compare the experimental measurements with the LTspice simulation results
and the initial design calculations. Analyze any discrepancies and identify
potential sources of error.
2.9 Comment on the relationship between the frequency of input and rectified
output waveforms.

(3) Precision Clipper Circuit

3.1 Design the peak clipper circuit using the design approach given in Section 8.6.3.
3.2 Construct the clipping circuit shown in Fig. 8.5 using the designed schematic
and component values determined.
3.3 Use a ±15 V supply, and connect the signal generator, power supply, and
oscilloscope as illustrated.
3.4 Adjust the signal generator to produce a 1 kHz, ±8 V sine wave input.
3.5 Observing the input and output waveforms on the oscilloscope.
3.6 Measure and record in Table 8.2 the key signal parameters such as peak
amplitude, period, frequency and clipping levels at each extreme.
3.7 Plot the waveforms on a graph sheet or using a computer plotting tool to visualize
the circuit behaviour.
3.8 Compare the experimental measurements with the LTspice simulation results
and the initial design calculations. Analyze any discrepancies and identify
potential sources of error.

(4) Precision Clamper Circuit

4.1 Design the peak clamper circuit using the design approach given in Section
8.6.4.

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 Experiment 8: Practical Op-amp Applications – II (Signal Processing Circuits)

4.2 Construct the clamping circuit shown in Fig. 8.7 using the designed schematic
and component values determined.
4.3 Use a ±15 V supply, and connect the signal generator, power supply, and
oscilloscope as illustrated.
4.4 Adjust the signal generator to produce a 10 KHz, ±5 V sine / square wave input.
4.5 Observing the input and output waveforms on the oscilloscope.
4.6 Measure and record in Table 8.2 the key signal parameters such as peak-to-peak
amplitude, period, frequency, and clamping levels.
4.7 Plot the waveforms on a graph sheet or using a computer plotting tool to visualize
the circuit behaviour.
4.8 Compare the experimental measurements with the LTspice simulation results
and the initial design calculations. Analyze any discrepancies and identify
potential sources of error.

Table 8.1 – Measurements for HWR and FWR Circuits: Expected vs. Measured Values
Output Voltage
Input Voltage Output Voltage (Measured
(Expected)
Circuit
Vi(P) Period Frequency Vo(P) Period Frequency Vo(P) Period Frequency

HWR

FWR

Table 8.2 – Measurements for Clipper and Clamper Circuits: Expected vs. Measured Values

Circuit Vi(p-p) Period Frequency Clipping / Clamping Level

+ve Clipping -ve Clipping

Clipper
Level = Level =

Clamper Clamping Level = ________ DC

Inferences
1.

2.

3.

4.

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8.9. POST-LAB WORK

1. Reverse the polarity of the two diodes in the precision HWR circuit. What would be
the output? Justify your observations with the simulation. Submit plots of the input
and output voltages.
2. Reverse the polarity of the two diodes in the precision FWR circuit. What would be the
output? Justify your observations with the simulation. Submit plots of the input and
output voltages.
3. Modify the peak clipper circuit of Fig. 8.5 to adjust the output limiting voltage. Include
a potentiometer R4 in the peak clipper circuit to adjust the output voltage limits.
Submit plots of the input and output voltages for different settings of the
potentiometer.

4. Reverse the polarity of D1 and D2 in the negative peak clamper circuit of Fig. 8.7. What
would be the output? Justify your observations with the simulation. Submit plots of
the input and output voltages.

21ECC222L Lab Manual 16