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CURRENT MIRROR

Layout of current mirror

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Kedhar Malla
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0% found this document useful (0 votes)
40 views

CURRENT MIRROR

Layout of current mirror

Uploaded by

Kedhar Malla
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 12

PROJECT 2: Design and Analysis of Current

Mirror by using Cadence Virtuoso


A Comprehensive Study of Analog Circuits
By: Krishna Gupta
Chapters:

List of Figures…………………………...…………. 3
1. Introduction …………………………………….. 4
2. Brief Description………………………………… 5
3. Circuit Design……………………………………. 6-7
1. Schematic Design…………………………... 6
2. Simulation Setup...………………………….. 6
3. Circuit Diagram.……..…….……...…….….. 7
4. Simulation Results……………………………….. 8
5. Advantages and Disadvantages………………….. 9
1. Advantages…………………………………. 9
2. Disadvantages………………………………. 9
6. Conclusion……………………………………….. 10
7. Frequently Asked Questions (FAQs)…………….. 11
LIST OF FIGURES

Figure 3.1 Circuit of Current Mirror………………………….7


Figure 4.1 Simulation Results of Current Mirror………….….8
1. INTRODUCTION

A current mirror is a fundamental circuit in analog electronics used


to replicate a reference current and produce a stable output current. It
plays a crucial role in integrated circuits (ICs), where precise current
control is required for biasing, signal processing, and amplification.
The primary objective of a current mirror is to ensure that the output
current closely follows the reference current, regardless of changes in
supply voltage or load conditions.
The basic structure of a current mirror consists of two identical
transistors, typically MOSFETs (Metal-Oxide-Semiconductor Field-
Effect Transistors) or BJTs (Bipolar Junction Transistors). One
transistor is configured to establish a reference current, while the
other mirrors it by maintaining the same voltage and operating
conditions. This is achieved through current-steering properties,
ensuring minimal deviation between the input and output currents..
Current mirrors offer several advantages, including high output
impedance, excellent current regulation, and independence from
voltage fluctuations. Several variations, such as Wilson current
mirror, cascode current mirror, and Widlar current mirror, improve
accuracy and performance by reducing mismatch errors and
increasing output resistance
These circuits are extensively used in operational amplifiers (op-
amps), voltage references, active load circuits, and analog signal
processing applications. Their ability to provide stable and predictable
currents makes them a vital component in modern analog circuit
design, ensuring reliable performance in various electronic systems.
In this document, we explore the design and analysis of a Current
Mirror using Cadence Virtuoso, including their circuit implementation,
advantages, disadvantages, and simulation results.
2. BRIEF DESCRIPTION

A current mirror circuit is a key building block in analog


electronics, designed to copy a reference current from one branch to
another while maintaining stability and accuracy. It operates using
matched transistors, typically MOSFETs or BJTs, where one
transistor sets the reference current, and the others mirror it by
maintaining equal voltage and operating conditions.

The circuit ensures that the output current remains nearly identical to
the reference current, making it an ideal current source in various
applications. It provides high output resistance, reducing sensitivity
to voltage variations. Advanced designs, such as Wilson current
mirrors, improve accuracy by minimizing mismatch errors.

Current mirror circuits are commonly used in biasing networks,


operational amplifiers, differential amplifiers, voltage regulators, and
analog filters. Their ability to provide a stable and controlled current
makes them indispensable in integrated circuit (IC) design and
precision analog systems, ensuring reliable performance across a
wide range of electronic applications
3. CIRCUIT DESIGN

1. Schematic Design
The schematic design of the Current Mirror consists of:
 Current Source (I7):
• This is the tail current source, providing a fixed bias current of
100µA.
• It ensures proper operation of the differential pair by defining the
total current.

 Differential Pair (NM1 & NM3) [NMOS Transistors]:


• The two NMOS transistors form the core of the differential
amplifier.
• Their sources are connected together and tied to the tail current
source (I7).
• Their drains are connected to a supply voltage (V2 = 1.8V) via a
load.

 Load Resistors or Active Loads:


• The circuit may use either resistive loads or current mirrors to
convert differential current into voltage.

 Input Signals:
• One of the NMOS transistors has a DC bias at its gate.
• The other NMOS transistor receives an AC input signal (V1) at
its gate.

 Current Mirror (Possible PMOS or NMOS Configuration):


• The mirrored current is seen in the circuit, helping to mirror the
drain current of the differential pair transistors.
• This helps in achieving differential-to-single-ended conversion.
4. SIMULATION SETUP

1. DC Analysis (I-V Characteristics)


• Set up a DC Sweep:
• Sweep the gate-source voltage (V_GS) or drain-source
voltage (V_DS) of the output transistor.
• Choose a voltage range (e.g., 0V to 1.8V for a 1.8V CMOS
process).
• Run the DC Simulation:
• Observe how the drain current (I_D) varies with V_DS.
• Verify that the current mirror is properly replicating the
reference current.
• Expected Results:
• The output current (I_OUT) should closely match the
reference current (I_REF).
• Saturation region operation should be achieved for accurate
mirroring.

2. AC Analysis (Frequency Response)


• Apply an AC Small-Signal Input:
• Introduce a small AC signal (e.g., 1mV) to test frequency
response.
• Apply this to the input side of the circuit.
• Configure Frequency Sweep:
• Sweep from 1 Hz to 1 GHz (or suitable range).
• Set logarithmic scaling for better visualization.
• Run the AC Simulation:
• Measure the magnitude of the mirrored current across
frequencies.
• Observe bandwidth limitations caused by parasitic
capacitances.
• Expected Results:
• At low frequencies, the current should remain stable.
• At high frequencies, parasitic effects may cause a drop in
accuracy.
3.3 Circuit Diagram

Figure 3.1 Circuit of Current Mirror


4. SIMULATION RESULTS

Figure 4.1: Simulation results of Current Mirror


5. ADVANTAGES AND DISADVANTAGSES

1. Advantages
i. Accurate Current Replication – Ensures stable and
predictable current mirroring.
ii. High Output Resistance – Maintains a constant current despite
voltage variations.
iii. Low Power Consumption – Ideal for low-power analog
circuits.
iv. Compact Design – Easily integrated into ICs with minimal
components.
v. Temperature Compensation – Advanced designs reduce
temperature effects.
vi. Multiple Outputs – A single reference current can be mirrored
to multiple branches.

2. Disadvantages:
i. Voltage Headroom Requirement – Needs a minimum voltage
for proper operation.
ii. Mismatch Issues – Process variations affect current accuracy.
iii. Limited High-Frequency Performance – Parasitic
capacitances limit bandwidth.
iv. Finite Output Resistance – Basic designs have lower
accuracy.
v. Temperature Sensitivity – Current drift due to V_BE or V_GS
variations.
6. CONCLUSION

The designed current mirror circuit in Cadence successfully replicates


a reference current with high accuracy, demonstrating its
effectiveness as a stable current source. DC analysis confirms that the
output current closely follows the reference current, ensuring proper
mirroring. AC analysis highlights the circuit’s frequency response,
showing stable operation at low frequencies but degradation at higher
frequencies due to parasitic effects.

The circuit maintains high output resistance, making it ideal for


analog applications like biasing circuits and differential amplifiers.
However, process variations and temperature sensitivity can impact
performance, necessitating advanced designs like Wilson current
mirrors for improved accuracy.

Simulation results validate the circuit’s efficiency in maintaining a


constant current, reinforcing its importance in integrated circuit (IC)
design. Optimizing transistor sizing and layout techniques can further
enhance matching and reduce errors.

The overall design demonstrates a balance between simplicity,


accuracy, and performance, making it a crucial component in analog
and mixed-signal systems.
7. FREQUENTLY ASKED QUESTIONS (FAQs)

1. What is the purpose of a Current Mirror Circuit?


A current mirror circuit is designed to replicate a reference current
from one branch to another while maintaining a stable and constant
output current. It is commonly used in analog integrated circuits
(ICs), amplifier biasing, and voltage reference circuits to ensure
consistent performance.

2. How does a Current Mirror Circuit work?


The circuit operates using two or more transistors, where their bases
or gates are connected together to enforce the same voltage. The
reference current is set by one transistor, and due to the matching
characteristics of the transistors, the same current is mirrored in the
output transistor. This allows the circuit to provide a stable current
regardless of load variations.

3. What are the key applications of a Current Mirror Circuit?


Current mirror circuits are widely used in biasing amplifiers,
ensuring a stable operating current. They are also used in operational
amplifier (Op-Amp) designs as active loads, in voltage reference
circuits to stabilize performance, and in analog and mixed-signal IC
designs for efficient chip fabrication.

4. What are the limitations of a Current Mirror Circuit?


One of the main limitations is transistor mismatch due to fabrication
variations, which can affect current accuracy. Additionally, the
circuit requires a minimum voltage headroom to operate correctly.

5. How can the accuracy of a Current Mirror be improved?


The accuracy of a current mirror can be enhanced by using advanced
designs such as Wilson current mirrors, which provide higher output
resistance and improved performance. Ensuring that transistors are
well-matched during fabrication helps reduce mismatches.

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