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The document provides an overview of the 8085 microprocessor architecture, including its pin diagram, control signals, and programming model. It details the operations that can be performed by the microprocessor, such as memory read/write and I/O operations, as well as the role of various registers like the accumulator and flags. Additionally, it outlines the significance of the program counter and stack pointer in executing instructions.

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Divyanshu Dubey
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0% found this document useful (0 votes)
10 views

L2_8085_architecture_Part1-Copy

The document provides an overview of the 8085 microprocessor architecture, including its pin diagram, control signals, and programming model. It details the operations that can be performed by the microprocessor, such as memory read/write and I/O operations, as well as the role of various registers like the accumulator and flags. Additionally, it outlines the significance of the program counter and stack pointer in executing instructions.

Uploaded by

Divyanshu Dubey
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Microprocessors and

Microcontrollers (EC3L007)

8085 Architecture – Part 1 & Programming Model


Summary of Last Class

• Definition of μp
• Bit, Nibble, Byte, Word
• μp ≡ ALU + Control Unit + Registers
• How to talk to a μp?
• Instruction, Mnemonic, Program
• Machine Language, Assembly Language, Low-level
Language, High-level Language,
• Compiler, Interpreter, Assembler
• Microcomputer, Microprocessors and Microcontrollers

2
Outline
• Pin diagram and function of these pins
• Architecture (brief)
• Common microprocessor operations
• Programming model
• Registers, Accumulator, Flags
• Program Counter
• Stack Pointer

3
Facts About 8085

• 8 bit general purpose μp with NMOS technology


• Up to 64k memory
• 40 pins
• + 5 V power supply
• Max clock frequency: 3 MHz
• Upward compatible

4
8085 Pin Diagram

5
8085 Pin Diagram
Address Bus
• 16 bit address bus.
• Two segments: A15 ‐ A8
and AD7 ‐ AD0
• A15 ‐ A8 are unidirectional
and are used to carry
high‐order address of
16‐bit address.
• AD7 ‐ AD0 are used for
dual purpose.

6
8085 Pin Diagram
Multiplexed Address/Data Bus

• Signal lines AD7‐AD0 are


bidirectional and serve dual
purpose.

• They are used as low‐order


address bus as well as data bus.

• The low order address bus can


be separated from these signals
by using a latch.

7
8085 Pin Diagram
Control & Status Signals
• To identify nature of operation
• Two Control Signals
RD(Read)
WR(Write)
• Three Status Signals
S1
S0
IO/M
• To indicate beginning of operation
ALE (Address Latch Enable)

8
8085 Pin Diagram
Control & Status Signals
ALE : Pin 30
• This is positive going pulse
generated every time the 8085
begins an operation (machine
cycle)
• It indicates that the bits on
AD7‐AD0 are address bits
• This signal is used primarily to latch
the low‐address from multiplexed
bus & generate a separate set of
address lines A7‐A0.

9
8085 Pin Diagram
Control & Status Signals
RD : Pin 32
• This is a read control signal
• This signal indicates that the
selected I/O or Memory device is to
be read & data is available on data
bus.
WR : Pin 31
• This is a write control signal
• This signal indicates that the
selected I/O or Memory device is to
be written & data is available on
data bus.
10
8085 Pin Diagram
Control & Status Signals
IO/M : Pin 34
• This is a status signal used to
differentiate I/O and memory
operation
• When it is high, it indicates an I/O
operation, when it is low, it
indicates a memory operation
• This signal is combined with RD’
and WR’ to generate I/O & memory
control signals

11
8085 Pin Diagram
Control & Status Signals
S1 & S0: Pin 29, Pin 33
• These status signals can identify
various operations.

12
8085 Pin Diagram

13
8085 Pin Diagram
Power Supply & Frequency Signal
• VCC : Pin 40
5V Supply
• VSS : Pin 20
Ground Reference
• X1, X2 Pin 1 & 2
Crystal Oscillator is connected
at these two pins.
• The frequency is internally divided
by two; therefore, to operate a
system at 3MHz, the crystal should
have a frequency of 6MHz.
14
8085 Pin Diagram
Power Supply & Frequency Signal

CLK(OUT) : Pin 37
Clock output

• This signal can be used as the


system clock for other devices.

15
8085 Pin Diagram
Externally Initiated Signals
including Interrupts

INTR(Input) Interrupt Request


It is used as general purpose interrupt

INTA (Output) Interrupt Acknowledge.


It is used to acknowledge an interrupt.

16
8085 Pin Diagram
Externally Initiated Signals
including Interrupts

RST7.5, RST6.5, RST5.5 (Input)


Restart Interrupts.
• These are vector interrupts that
transfer the program control to
specific memory locations.
• They have higher priorities than
INTR interrupt.
• Among these 3 interrupts, the
priority order is RST7.5,
RST6.5,RST5.5

17
8085 Pin Diagram
Externally Initiated Signals
including Interrupts

TRAP (Input)
• This is a non maskable interrupt &
has the highest priority.

18
8085 Pin Diagram
Externally Initiated Signals
including Interrupts

HOLD(Input) This signal indicates that


a peripheral such as DMA Controller is
requesting the use of address & data
buses

HLDA(Output) Hold acknowledge. This


signal acknowledges the HOLD request

19
8085 Pin Diagram
Externally Initiated Signals
including Interrupts

READY(Input)
• This signal is used to delay the
microprocessor read or write cycles
until a low‐responding peripheral is
ready to send or accept data.

• When the signal goes low, the


microprocessor waits until it goes high.

20
8085 Pin Diagram
Externally Initiated Signals
including Interrupts
RESET IN (Input): Pin 3
• When the signal on this pin goes
low, the Program Counter is set to
zero, the buses are tri‐stated &
microprocessor is reset.

RESET OUT (Output): Pin 36


• This signal indicates that
microprocessor is being reset. The
signal can be used to reset other
devices.
21
8085 Pin Diagram
Serial I/O Ports

• Two pins for serial transmission


SID (Serial Input Data)
SOD (Serial Output Data)

• In serial transmission, data bits are


sent over a single line, one bit at a
time.

22
8085 Pin Diagram

23
Architecture, Operation, and Programming

24
Bus Organization of 8085

25
Address Bus

• 16 bit address
• Unidirectional i.e. bits flow from μp to peripheral devices
• Can address 65536 memory locations, i.e. 64K memory
locations

26
Data Bus

• 8 lines; hence called 8-bit μp


• Bidirectional
• 8 lines can carry numbers from 00H to FFH (28=256 numbers)

27
Control Bus

• Synchronization, timing & control signals


• Unidirectional or Bidirectional ?

28
Operations in a μp Based System
The operations in a μp based system can be:

1. Microprocessor initiated operations


2. Internal operations
3. Peripheral (or externally initiated) operations

29
Operations in a μp Based System
The operations in a μp based system can be:

1. Microprocessor initiated operations


2. Internal operations
3. Peripheral (or externally initiated) operations

30
1) Microprocessor-Initiated Operations
The µp performs primarily four operations

1. Memory Read: Reads data (or instructions) from memory


2. Memory Write: Writes data into memory
3. I/O Read: Accepts data from input devices
4. I/O Write: Sends data to output devices

31
1) Microprocessor-Initiated Operations
Three steps for µp to communicate with a peripheral (or a memory
location)

1. Identify the peripheral or the memory location (with its


address) .
2. Transfer binary information (data and instructions).
3. Provide timing or synchronization signals.

32
Operations in a μp Based System
The operations in a μp based system can be:

1. Microprocessor initiated operations


2. Internal operations
3. Peripheral (or externally initiated) operations

33
2) Internal Data Operations
The µp architecture determines how and what operations can be
performed with the data.

These operations are:


• Store 8-bit data.

• Perform arithmetic and logical operations.

• Test for conditions.

• Sequence the execution of instructions.

34
Operations in a μp Based System
The operations in a μp based system can be:

1. Microprocessor initiated operations


2. Internal operations
3. Peripheral (or externally initiated) operations

35
3) Peripheral or Externally Initiated Operations
• External devices (or signals) can initiate the following
operations, for which individual pins on the
microprocessor chip are assigned:

• Reset

• Interrupt

• Ready

• Hold.

36
8085 Hardware Model
• Has two segments

• One segment includes ALU, Accumulator, instruction


decoder, and flags

• The second segment has 8-bit and 16-bit registers.

• Both segments are connected with various internal


connections called an internal bus.
37
8085 Programming Model
• Programming model is the information needed to write
programs; consists of some segments of the ALU and
the registers.

38
8085 Programming Model
• Registers

• Accumulator

• Flags

• Program Counter

• Stack Pointer

39
8085 Programming Model

40
Registers
• 6 general purpose registers to store 8‐bit data B, C, D,
E, H & L.

• Can be combined as register pairs – BC, DE, HL to


perform 16‐bit operations.

• Used to store or copy data using data copy instructions.

41
8085 Programming Model

42
Accumulator
• 8 ‐ bit register, identified as A

• Part of ALU

• Used to store 8‐bit data to perform arithmetic & logical


operations.

• Result of operation is stored in it.

43
8085 Programming Model

44
Flag Register

S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset

• 8 bit register –shows the status of the microprocessor


before/after an operation

45
Flag Register

S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset

Z ‐Zero Flag
Set to 1 when
result is zero;
otherwise reset

• 8 bit register –shows the status of the microprocessor


before/after an operation

46
Flag Register

S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset

Z ‐Zero Flag AC ‐Auxiliary Carry Flag


Set to 1 when Set to 1 when carry bit is
result is zero; generated by bit D3 &
otherwise reset passed to bit D4

• 8 bit register –shows the status of the microprocessor


before/after an operation

47
Flag Register

S ‐Sign Flag P ‐Parity Flag


Set to 1 if bit D7 Set to 1 if result has even no. of 1’s
of result is 1; & Reset if result has odd no. of 1’s
otherwise reset

Z ‐Zero Flag AC ‐Auxiliary Carry Flag


Set to 1 when Set to 1 when carry bit is
result is zero; generated by bit D3 &
otherwise reset passed to bit D4

• 8 bit register –shows the status of the microprocessor


before/after an operation

48
Flag Register

S ‐Sign Flag P ‐Parity Flag


Set to 1 if bit D7 Set to 1 if result has even no. of 1’s
of result is 1; & Reset if result has odd no. of 1’s
otherwise reset
CY ‐Carry Flag
Z ‐Zero Flag AC ‐Auxiliary Carry Flag Set to 1 if arithmetic
Set to 1 when Set to 1 when carry bit is operation results in
result is zero; generated by bit D3 & carry; otherwise
otherwise reset passed to bit D4 reset

• 8 bit register –shows the status of the microprocessor


before/after an operation

49
Flag Register
• ALU has 5 Flag Register that set‐reset after an operation
according to data conditions of the result in accumulator
& other registers.

• Helpful in decision making process of μP

• Conditions are tested through software instructions

• For e.g.
• JC (Jump On Carry) is implemented to change the
sequence of program when CY is set.

50
Example: Zero Flag

• Z=1,The Zero flag is set because the ALU operation


result in 0
Picture Source: http://www.editsworld.com
51
Example: Parity Flag

• P=1, After an arithmetic and logic operation the result


has an even number of 1s, the Parity flag is set

Picture Source: http://www.editsworld.com


52
Example: Carry Flag
• Is set if there is a carry or borrow from arithmetic
operation.

• CY=1, After ALU operation D7 bit of the result generate carry


(bit no nine is 1), the Carry flag is set
Picture Source: http://www.editsworld.com
53
Example: Auxiliary Flag

Picture Source: http://www.editsworld.com


54
Example: Auxiliary Flag

• AC=1, In an arithmetic operation D3 bit borrow a carry


from D4 bit. So the auxiliary flag is set.
Picture Source: http://www.editsworld.com
55
8085 Programming Model

56
Program Counter (PC)

• μp uses PC register to sequence the execution of


instructions.
• Points to the memory address from which next byte is to
be fetched.

0000 H PC (16 bit)

FFFF H

57
Program Counter (PC)

• μp uses PC register to sequence the execution of


instructions.
• Points to the memory address from which next byte is to
be fetched.
• After a byte is fetched, PC is incremented by 1 to point
to next memory location.

0000 H
PC (16 bit)

FFFF H

58
Stack Pointer
• Used as memory pointer
• Points to the memory location in R/W memory, called
Stack.
• Beginning of stack is defined by loading a 16‐bit address
in the stack pointer.

0000 H

FFFF H SP (16 bit)

59
References
• Ramesh Gaonkar, “Microprocessor, Architecture,
Programming, & Applications with the 8085 6/e”

• Various online resources.

• Reading:
Chapter 2 & 3, Ramesh Gaonkar

60

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