L2_8085_architecture_Part1-Copy
L2_8085_architecture_Part1-Copy
Microcontrollers (EC3L007)
• Definition of μp
• Bit, Nibble, Byte, Word
• μp ≡ ALU + Control Unit + Registers
• How to talk to a μp?
• Instruction, Mnemonic, Program
• Machine Language, Assembly Language, Low-level
Language, High-level Language,
• Compiler, Interpreter, Assembler
• Microcomputer, Microprocessors and Microcontrollers
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Outline
• Pin diagram and function of these pins
• Architecture (brief)
• Common microprocessor operations
• Programming model
• Registers, Accumulator, Flags
• Program Counter
• Stack Pointer
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Facts About 8085
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8085 Pin Diagram
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8085 Pin Diagram
Address Bus
• 16 bit address bus.
• Two segments: A15 ‐ A8
and AD7 ‐ AD0
• A15 ‐ A8 are unidirectional
and are used to carry
high‐order address of
16‐bit address.
• AD7 ‐ AD0 are used for
dual purpose.
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8085 Pin Diagram
Multiplexed Address/Data Bus
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8085 Pin Diagram
Control & Status Signals
• To identify nature of operation
• Two Control Signals
RD(Read)
WR(Write)
• Three Status Signals
S1
S0
IO/M
• To indicate beginning of operation
ALE (Address Latch Enable)
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8085 Pin Diagram
Control & Status Signals
ALE : Pin 30
• This is positive going pulse
generated every time the 8085
begins an operation (machine
cycle)
• It indicates that the bits on
AD7‐AD0 are address bits
• This signal is used primarily to latch
the low‐address from multiplexed
bus & generate a separate set of
address lines A7‐A0.
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8085 Pin Diagram
Control & Status Signals
RD : Pin 32
• This is a read control signal
• This signal indicates that the
selected I/O or Memory device is to
be read & data is available on data
bus.
WR : Pin 31
• This is a write control signal
• This signal indicates that the
selected I/O or Memory device is to
be written & data is available on
data bus.
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8085 Pin Diagram
Control & Status Signals
IO/M : Pin 34
• This is a status signal used to
differentiate I/O and memory
operation
• When it is high, it indicates an I/O
operation, when it is low, it
indicates a memory operation
• This signal is combined with RD’
and WR’ to generate I/O & memory
control signals
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8085 Pin Diagram
Control & Status Signals
S1 & S0: Pin 29, Pin 33
• These status signals can identify
various operations.
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8085 Pin Diagram
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8085 Pin Diagram
Power Supply & Frequency Signal
• VCC : Pin 40
5V Supply
• VSS : Pin 20
Ground Reference
• X1, X2 Pin 1 & 2
Crystal Oscillator is connected
at these two pins.
• The frequency is internally divided
by two; therefore, to operate a
system at 3MHz, the crystal should
have a frequency of 6MHz.
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8085 Pin Diagram
Power Supply & Frequency Signal
CLK(OUT) : Pin 37
Clock output
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
TRAP (Input)
• This is a non maskable interrupt &
has the highest priority.
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
READY(Input)
• This signal is used to delay the
microprocessor read or write cycles
until a low‐responding peripheral is
ready to send or accept data.
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8085 Pin Diagram
Externally Initiated Signals
including Interrupts
RESET IN (Input): Pin 3
• When the signal on this pin goes
low, the Program Counter is set to
zero, the buses are tri‐stated &
microprocessor is reset.
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8085 Pin Diagram
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Architecture, Operation, and Programming
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Bus Organization of 8085
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Address Bus
• 16 bit address
• Unidirectional i.e. bits flow from μp to peripheral devices
• Can address 65536 memory locations, i.e. 64K memory
locations
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Data Bus
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Control Bus
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Operations in a μp Based System
The operations in a μp based system can be:
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Operations in a μp Based System
The operations in a μp based system can be:
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1) Microprocessor-Initiated Operations
The µp performs primarily four operations
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1) Microprocessor-Initiated Operations
Three steps for µp to communicate with a peripheral (or a memory
location)
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Operations in a μp Based System
The operations in a μp based system can be:
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2) Internal Data Operations
The µp architecture determines how and what operations can be
performed with the data.
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Operations in a μp Based System
The operations in a μp based system can be:
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3) Peripheral or Externally Initiated Operations
• External devices (or signals) can initiate the following
operations, for which individual pins on the
microprocessor chip are assigned:
• Reset
• Interrupt
• Ready
• Hold.
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8085 Hardware Model
• Has two segments
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8085 Programming Model
• Registers
• Accumulator
• Flags
• Program Counter
• Stack Pointer
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8085 Programming Model
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Registers
• 6 general purpose registers to store 8‐bit data B, C, D,
E, H & L.
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8085 Programming Model
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Accumulator
• 8 ‐ bit register, identified as A
• Part of ALU
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8085 Programming Model
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Flag Register
S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset
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Flag Register
S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset
Z ‐Zero Flag
Set to 1 when
result is zero;
otherwise reset
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Flag Register
S ‐Sign Flag
Set to 1 if bit D7
of result is 1;
otherwise reset
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Flag Register
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Flag Register
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Flag Register
• ALU has 5 Flag Register that set‐reset after an operation
according to data conditions of the result in accumulator
& other registers.
• For e.g.
• JC (Jump On Carry) is implemented to change the
sequence of program when CY is set.
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Example: Zero Flag
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Program Counter (PC)
FFFF H
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Program Counter (PC)
0000 H
PC (16 bit)
FFFF H
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Stack Pointer
• Used as memory pointer
• Points to the memory location in R/W memory, called
Stack.
• Beginning of stack is defined by loading a 16‐bit address
in the stack pointer.
0000 H
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References
• Ramesh Gaonkar, “Microprocessor, Architecture,
Programming, & Applications with the 8085 6/e”
• Reading:
Chapter 2 & 3, Ramesh Gaonkar
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