DLD_Lab_Exp-02_Kabirul_117
DLD_Lab_Exp-02_Kabirul_117
Department of CSE
Assignment
Course Code CSE0612216S
Course tittle Digital Logic Design Lab
Experiment No 02
Experiment Name Implementation of Basic Gates AND, OR, NOT
with universal gates NAND and NOR IC.
Submitted By-
MD. Kabirul Hasan
ID-0432410005101117
Batch: 55th
Section: C
Submitted To-
Ratri Datta
Lecturer
University of Information Technology
& Sciences
Pin Diagram:
NAND to OR Gate:
Circuit Diagram:
NOR gate: A NOR gate is a digital logic gate that outputs a high signal
only when both of its inputs are low. It's also known as a Negated OR
gate.
Circuit Diagram:
Pin Diagram:
Page 5 of 7
NOR to OR Gate:
Circuit Diagram:
Page 6 of 7
Circuit Diagram:
Discussion:
The results obtained from the experiment match the expected outcomes
based on the truth tables of
the basic gates. This confirms that NAND and NOR gates can be effectively
utilized to implement AND,
OR, and NOT gates, making them universal gates.
By constructing logic circuits using only NAND gates, we achieved the same
functionality as the basic
gates AND, OR, and NOT. Similarly, using NOR gates, we realized the
same results. This experiment
demonstrated the practicality of universal gates in digital circuit design.
Conclusion:
The experiment successfully showcased the realization of basic gates (AND,
OR, and NOT) using
universal gates (NAND and NOR). The results validated the application of
NAND and NOR gates as
universal gates in digital circuitry. This concept has significant implications
for reducing the complexity
and component count in circuit design.