ECE 252: FUNDAMENTALS

OF ELECTRONICS
Course Description
Bipolar Junction Transistor (BJT)
❖ Introduction
❖ BJT Structure and operation
❖ Transistor configurations (Common emitter, common base, common collector),
❖ Biasing Techniques [fixed bias, self-bias, voltage divider bias]
❖ DC circuit analysis, load line, operating point and bias stabilization

Field-Effect Transistor (FET)

❖ JFET
▪ Structure
▪ JFET Characteristic curves
▪ JFET Configurations {Common drain, common source and common gate}
▪ JFET biasing techniques [fixed bias, self-bias, voltage divider bias]
▪ JFET Applications
❖ Metal Oxide Silicon FET (MOSFET)
D-MOSFET {Structure, characteristics, Applications}
E-MOSFET {Structure, characteristics, Applications}
Introduction
Transistors is derived from the two terms:

𝑻𝒓𝒂𝒏𝒔𝑓𝑒𝑟 + 𝑟𝑒𝑠𝒊𝒔𝒕𝒐𝒓 → 𝑻𝒓𝒂𝒏𝒔𝒊𝒔𝒕𝒐𝒓

This draws from its basic function of
transfering current from low resistance to
high resitance circuit. NPN symbol PNP symbol
Emitter
They are used for amplification or
switching of electrical signals. ▪ Its most heavily doped region so as to
supply majority charge carriers to the
There are two basic types of transistors: base-emitter junction.
a) bipolar junction transistor (BJT) For PNP transistor, the P-type emitter
b) Field effect transistor (FET) supplies holes, whereas for NPN transistor,
N-type emitter supplies electrons to the base-
Bipolar Junction Transistor emitter junction.
(BJT)
▪ Has moderate thickness.
“Bi” means “two” and “polar” refers to ▪ Always forward biased
the polarities. Therefore, BJTs conduct
Collector
current using two types of charge
carriers, electrons (−) and holes (+). • Moderately doped region and hence
collects charges from the collector-
BJT Structure
base junction.
It has three doped regions separated by
For PNP transistor, the P-type collector
two pn junctions of two types, NPN and
receives holes from the collector-base junction,
PNP.
while the N-type collector in NPN transistor
receives electrons from the collector-base
junction.

• It is the widest region to permit

collection of charges.
• Always reverse biased
Base:
▪ It’s the thinnest region between two
pn-junctions and lightly doped
▪ It passes the emitter injected charges
NPN transistor PNP transistor
to the collector.
Transistor Biasing
Transistor biasing is application of dc
signal to a transistor, to maintain
sufficient base emitter voltage (𝑉𝐵𝐸 ),
quiscent collector current (𝐼𝐶𝑄 ) and
collector-emitter voltage levels (𝑉𝐶𝐸𝑄 )

Biasing can be achieved by a bias battery

or biasing circuit (more efficient)

In order to transfer current from low b) PNP forward-reverse biasing

resistance to high resistance circuit, the
base-emitter (BE) junction is forward- Transistor Action
biased and the base-collector (BC) NPN transistor operation:
junction is reverse-biased.
The forward bias causes electrons to flow
The forward biased base-emitter junction from the n-type emitter towards the base,
offers low resistance for the emitter hence emitter current 𝐼𝐸 . Since the p-type
circuit, while the reverse biased collector- base is lightly doped and very narrow,
base junction offers high resistance in the very few incoming electrons combine
collector circuit. with the holes, to form valence electrons,
which conctitutes base current 𝐼𝐵 . The
rest cross over the BC junction into the
collector region, hence forming collector
current 𝐼𝐶 . Thus much of 𝐼𝐸 flows into the
collector to become 𝐼𝐶 .

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 … (𝑖)
𝐼𝐵 is usually very small and therefore 𝐼𝐸 ≅
𝐼𝐶
NB: The converse operation applies for PNP
a) NPN forward-reverse biasing transitor.
 A transistor can be connected in a circuit
by making any of the three terminals
common to both input and output in the
following ways:

a) Common base connection

b) Common emitter connection
c) Common collector connection
a) Common base [CB] connection
Flow of charge carries through npn transistor. Input applied between the emitter and
base, and output obtained between
collector and base, hence the base is
common.

The current directions for NPN and PNP

a) Common base NPN transistor
types transistors

Transistor as an Amplifier: The ability of

transistor to transfer current from low
resistance input circuit to high resistance
output circuit is utilised in amplification.
A small change in input voltage causes
significant change in 𝐼𝐸 , which causes almost
same change in 𝐼𝐶 due to transistor action. A
load resistance 𝑅𝐶 [connected in series with b) Common base PNP transistor
collector] produces a high voltage across it
when 𝐼𝐶 flows through. Current amplification factor (𝜶𝑫𝑪 ):The
ratio of collector current (output) to
Thus small fluctuations in 𝑉𝐵𝐸 cause 𝐼𝐶 emitter current (input).
variations resulting in high voltage changes
across 𝑅𝐶 . 𝑰𝑪
𝜶𝑫𝑪 = … (𝒊𝒊)
𝑰𝑬
Transistor configurations
For ac conditions; The ratio of change in However, for power transistors, 𝐼𝐶𝐵𝑂 is
collector current (output) to change in significant and should be considered.
emitter current (input) at constant base Furthermore, 𝐼𝐶𝐵𝑂 is temperature
emitter voltage 𝑽𝑪𝑩 dependent [increases with increase in
temperature] and hence significant at
∆𝑰𝑪
𝜶𝒂𝒄 = higher temperatures.
∆𝑰𝑬
at constant 𝑽𝑪𝑩
Example 1: For the circuit in Figure
The value of αDC is less than 1, ranging
below, 𝛼 = 0.95. The voltage-drop across
from (0.9 to 0.99) and can be increased by
𝑅𝐶 is 2𝑉. Determine the base current:
decreasing 𝐼𝐵 .

The total collector current (𝑰𝑪 ) consists of:

Part of the emitter current that reaches

the collector circuit (𝛼𝐼𝐸 ) and the leakage
currents due to minority charges that
flow through the reverse biased collector-
base junction (𝐼𝐶𝐵𝑂 )

𝑰𝑪 = 𝜶𝑰𝑬 + 𝑰𝑪𝑩𝑶 … . (𝒊𝒊𝒊)

If the emitter is open, (𝐼𝐸 = 0) leakage
current still flows in the collector circuit, 𝑉𝐶 2𝑉
hence collector-base current with emitter open 𝐼𝐶 = = = 1𝑚𝐴
𝑅𝐶 2𝑘Ω
(𝐼𝐶𝐵𝑂 )
𝐼𝐶 1
𝐼𝐶 = 𝛼𝐼𝐸 + 𝐼𝐶𝐵𝑂 𝐼𝐶 = = = 1.0526𝑚𝐴
𝛼 0.95
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶 = 1.0526 − 1 = 0.0526𝑚𝐴
𝐼𝐶 = 𝛼(𝐼𝐵 + 𝐼𝐶 ) + 𝐼𝐶𝐵𝑂 Example 2: In the circuit shown,
determine 𝐼𝐶 and 𝑉𝐶𝐵 . Take 𝑉𝐵𝐸 = 0.7𝑉.
𝐼𝐶 (1 − 𝛼) = 𝛼𝐼𝐵 + 𝐼𝐶𝐵𝑂
𝜶𝑰𝑩 𝑰𝑪𝑩𝑶
𝑰𝑪 = + … (𝒊𝒗)
(𝟏 − 𝜶) (𝟏 − 𝜶)
Collector current can be controlled by either
𝐼𝐸 or 𝐼𝐵
Solution
For signal transistors, 𝐼𝐶𝐵𝑂 is usually very
small and may be neglected in Applying KCL on the emitter circuit loop,
calculations.
𝑉𝐸𝐸 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐵𝐸
 𝑉𝐸𝐸 − 𝑉𝐵𝐸 8𝑉 − 0.7𝑉
𝐼𝐸 = = = 4.867𝑚𝐴
𝑅𝐸 1.5𝑘Ω
𝐼𝐶 ≅ 𝐼𝐸 = 4.867𝑚𝐴
Applying KVL;

𝑉𝐶𝐶 = 𝐼𝐶 𝑅𝐶 + 𝑉𝐶𝐵
𝑉𝐶𝐵 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
18𝑉 − (4.867𝑚𝐴 × 1.2𝑘Ω) = 12.16𝑉

V-I characteristics of Common

base connection The graph of 𝐼𝐶 vs 𝑉𝐶𝐵 at constant 𝐼𝐸 .

Input characteristics ▪ 𝐼𝐶 changes parabolically at low levels of

𝑉𝐶𝐵 , then becomes constant above the knee
voltage (1V). The transistor is always
operated beyond the knee voltage.
▪ Large changes in 𝑉𝐶𝐵 producing low levels
of 𝐼𝐶 implies the output resistance is very
high.
▪ 𝐼𝐶 is independent of 𝑉𝐶𝐵 , but dependent on
𝐼𝐸 .

∆𝑉𝐶𝐵
𝑟𝑜𝑢𝑡 = ⌋
∆𝐼𝐶 𝐼𝐸

Key features of a CB Amplifier:

▪ Current gain 𝜶 < 𝟏
The graph of 𝐼𝐸 vs 𝑉𝐸𝐵 at constant 𝑉𝐶𝐵 . ▪ Large voltage gain (𝐴𝑣 ≈ 1500)
𝐼𝐸 increases rapidly with increase in 𝑉𝐸𝐵 ▪ Power gain (𝐴𝑝 ≤ 30𝑑𝐵)
implying low input resistance. ▪ Very low input impedance (typically 30 −
150𝛺)
𝐼𝐸 is almost independent of 𝑉𝐶𝐵 .
▪ Very high output impedance (up to
Input resistance 𝑟𝑖 500𝑘𝛺)
▪ input and output voltages are in phase
∆𝑉𝐸𝐵
𝑟𝑖 = ⌋
∆𝐼𝐸 𝑉𝐶𝐵 Application: Impedance matching in
high frequency applications.
Output characteristics
Common Emitter (CE) Configuration
The emitter is common between the input V-I Characteristics
and output circuits.
Input Characteristics

Base current amplification factor 𝜷

𝐼𝐶
𝛽= The graph of 𝐼𝐵 vs 𝑉𝐵𝐸 at constant 𝑉𝐶𝐸 .
𝐼𝐵
Since 𝐼𝐵 increases less rapidly in the common
Relationship between 𝜷 and 𝜶 emitter circuit, input resistance is higher than
𝐼𝐶 for CB circuit.
𝛼=
𝐼𝐸 Input resistance 𝑟𝑖
𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶 ∆𝑉𝐵𝐸
𝑟𝑖 = ⌋
𝐼𝐶 𝐼𝐶 /𝐼𝐶 1 ∆𝐼𝐵 𝑉𝐶𝐸
𝛽= = =
𝐼𝐸 − 𝐼𝐶 𝐼𝐸 /𝐼𝐶 − 𝐼𝐶 /𝐼𝐶 1 − 1
𝛼 Output Characteristics
𝜶
𝜷= It’s a curve of variations in 𝐼𝐶 vs 𝑉𝐶𝐸 at
𝟏−𝜶
constant 𝐼𝐵
As 𝛼 → 1 then 𝛽 → ∞
Since equation (iv);
𝜶𝑰𝑩 𝑰𝑪𝑩𝑶
𝑰𝑪 = +
𝟏−𝜶 𝟏−𝜶
The collector-emitter current with base open
(𝑰𝑩 = 𝟎) is;
𝑰𝑪𝑩𝑶
𝑰𝑪𝑬𝑶 =
𝟏−𝜶
𝑰𝑪 = 𝜷𝑰𝑩 + 𝑰𝑪𝑬𝑶
i) variations in 𝐼𝐶 vs 𝑉𝐶𝐸 at constant 𝐼𝐵 = ▪ Very high current gain (50 ≤ 𝛽 ≤ 300)
5𝜇𝐴 ▪ Very high voltage gain (up to 1500 or
more)
▪ Very high power-gain (up to 40dB)
▪ input and output voltages have 𝟏𝟖𝟎°
phase shift
▪ input and output currents are in phase.
▪ Moderately low input impedance
(0.5𝑘𝛺 to 2𝑘𝛺)
▪ Relatively large output impedance
(around 50𝑘𝛺)

Applications: Amplifiers due to large

ii) variations in 𝐼𝐶 vs 𝑉𝐶𝐸 at constant 𝐼𝐵 = voltage, current and power gains.
10𝜇𝐴
Common collector configuration
Collector terminal is common between the
input and output circuits.
The input current is 𝐼𝐵 and output current is
𝐼𝐸 .

iii) Family of curves at different levels of 𝐼𝐵

𝐼𝐶 varies with values of 𝑉𝐶𝐸 from 0V up to
knee voltage of 1V, beyond which 𝐼𝐶 becomes
almost constant and independent of 𝑉𝐶𝐸 .
Common collector NPN circuit
Transistors are operated in the region beyond
the knee voltage (where 𝐼𝐶 is relatively Current amplification factor (𝜸)
constant, given by 𝐼𝐶 = 𝛽𝐼𝐵 ). 𝐼𝐸
𝛾=
∆𝑉𝐶𝐸 𝐼𝐵
𝑟𝑜𝑢𝑡 = ⌋
∆𝐼𝐶 𝐼𝐵 Relationship between 𝛾 and 𝛼
NB: 𝑟𝑜𝑢𝑡 for CE is less than 𝑟𝑜𝑢𝑡 for CB 𝐼𝐶
𝛼=
Key features of a CE Amplifier: 𝐼𝐸
𝐼𝐵 = 𝐼𝐸 − 𝐼𝐶
 𝐼𝐸 𝐼𝐸 /𝐼𝐸 ▪ The CB amplifier provides only voltage
𝛾= =
𝐼𝐸 − 𝐼𝐶 𝐼𝐸 /𝐼𝐸 − 𝐼𝐶 /𝐼𝐸 and power gain (moderate).
1 ▪ For all the three configurations, the
𝛾= input and output currents are in phase.
1−𝛼
Expression for 𝐼𝐶 Cut-off, saturation and active
𝐼𝐶 = 𝛼𝐼𝐸 + 𝐼𝐶𝐵𝑂
region

𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 = 𝐼𝐵 + (𝛼𝐼𝐸 + 𝐼𝐶𝐵𝑂 ) A transistor can operate in three states Cut-

off, saturation and active states, depending on
𝐼𝐸 (1 − 𝛼) = 𝐼𝐵 + 𝐼𝐶𝐵𝑂 the biasing of the emitter-base and collector-
𝐼𝐵 𝐼𝐶𝐵𝑂 base junctions.
𝐼𝐸 = +
1−𝛼 1−𝛼
For CC configuration, 𝐼𝐸 ≈ 𝐼𝐶
𝛼
Since 𝛽 = 1−𝛼

𝛼 1
∴𝛽+1 = +1= =𝛾
1−𝛼 1−𝛼
∴ 𝐼𝐶 ≈ 𝐼𝐸 = (𝛽 + 1)𝐼𝐵
𝐼𝐶𝐵𝑂
Neglecting the term 1−𝛼

Key features of a CC amplifier:

• High current gain (50 ≤ 𝛾 ≤ 500)

• Voltage gain < 𝟏 CE circuit
• Power gain of 10 𝑡𝑜 20𝑑𝐵
• very high input impedance (20 −
750𝑘𝛺)
• Low output impedance (50 − 1000𝛺)
Applications: Impedance matching due to
very high input impedance and very low
output impedance

In summary:

▪ the CE amplifier exhibits very high I, V,

and power gains.
CE output characteristics curves
▪ The CC amplifier provides only
current and power gain Cut-off: Intersection between the load
line and the curve of 𝐼𝐵 = 0.
▪ Both emitter-base and collector-base Suppose an ac input signal gives a peak
junctions are reverse biased 𝑖𝐶 of 1mA, then 𝐼𝐶𝑄 ≥ 𝑖𝐶 , so that the entire
▪ 𝐼𝐵 = 0 thus 𝐼𝐶 = 0; and 𝑉𝐶𝐸(𝑐𝑢𝑡−𝑜𝑓𝑓) ≈ the portion of the −1⁄2 cycle of the
𝑉𝐶𝐶 output signal 𝑖𝐶 appears [Fig. (i)].
▪ The transistor is OFF

Saturation: Intersection between the load

line and the curve of 𝐼𝐵 = 𝐼𝐵(𝑠𝑎𝑡)

▪ Both emitter-base and collector-base

junctions are forward biased
▪ 𝐼𝐵 and hence 𝐼𝐶 is maximum at;
𝑉𝐶𝐶
𝐼𝐶(𝑠𝑎𝑡) =
𝑅𝐶
𝑉𝐶𝐸(𝑠𝑎𝑡) ≈ 𝑉𝑘𝑛𝑒𝑒 Fig. (i)
Transistors are applied as switching devices
in saturation and cut-off conditions.
Active/ Linear amplification region:
Regions between the cut-off and saturation
To achieve active region operation, the
emitter-base junction is forward biased
while the collector-base junctions is reverse
biased [Forward-reverse biasing]
A transistor works as an amplifier in
active region.
Fig. (ii)
Importance of forward-reverse biasing
However, if 𝐼𝐶𝑄 < 𝑖𝐶 e.g., 𝐼𝐶𝑄 = 0.5 𝑚𝐴 a
in amplification
portion of the −1⁄2 cycle of output signal
The emitter-base is sufficiently forward (𝑖𝐶 ) is cut-off [Fig. (ii)].
biased while the collector-base junctions
sufficiently reverse biased such that: 2. The base-emitter voltage should be at
least equal to the barrier potential i.e.,
1. The zero-signal current/(DC) collector for silicon transistors 𝑉𝐵𝐸 = 0.7𝑉 [0.5V
current/quiescent current (ICQ ) should for Germanium].
be at least equal to the peak value of
ac collector current.
𝑰𝑪𝑸 ≥ 𝒊𝑪 (𝒑)
 If 𝑉𝐶𝐸 < 𝑉𝑘𝑛𝑒𝑒 the collector-base junction is
insufficiently reverse biased, causing
more charge carriers to flow to the base,
than to the collector, thus increasing 𝐼𝐵
and decreasing 𝐼𝐶 , hence deceasing 𝛽
resulting to improper amplification.

NB: silicon transistors are preferred to

germanium due to:

Fig. (iii) ▪ Smaller reverse leakage currents [𝐼𝐶𝐵𝑂 ]

at room temperature {Typically, for Si:
Notably, 𝐼𝐵 values are very low for 𝑉𝐵𝐸
0.001𝜇𝐴 − 1𝜇𝐴 and Ge: 2𝜇𝐴 − 15𝜇𝐴}
below 0.7V, however, when the potential
▪ smaller variation in 𝐼𝐶𝐵𝑂 with
barrier is overcome, 𝐼𝐵 and hence 𝐼𝐶
increase sharply. temperature
▪ greater working temperature [up to
Therefore, if 𝑉𝐵𝐸 < 0.7𝑉 for any part of
150℃]
the input signal, it will be less amplified
▪ higher Peak Inverse Voltage rating.
due to small 𝐼𝐶 , hence unfaithful
amplification. Stabilization of the Operating
3. Collector-emitter voltage should be point
greater than knee voltage (𝑉𝐶𝐸 > 𝑉𝑘𝑛𝑒𝑒 )
Transistor parameters such as 𝛽 and 𝑉𝐵𝐸
at any instant of the output signal
may vary for transistors of same type
[𝑉𝑘𝑛𝑒𝑒 = 1𝑉 for silicon]
[due to shortcomings in manufacturing
This ensures that collector-base
techniques]. Thus, replacing a transistor
junction is properly reverse biased,
with another of the same type causes
resulting to constant 𝛽, hence proper
shift in the operating point (𝐼𝐶𝑄 , 𝑉𝐶𝑄 ),
amplification.
causing improper amplification.
Moreover, temperature variations also
shift operating point, by changing 𝐼𝐶 .
Since 𝐼𝐶𝐵𝑂 increases with increase in
temperature it increases 𝐼𝐶 according to
𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 .
𝑉𝐵𝐸 decreases when temperature
increases.
The process of making the operating
point independent of parameter
Fig. (iv) variations due to temperature changes
and transistor replacements is called 𝑑𝐼𝐶𝐵𝑂 1
=
stabilization of operating point. 𝑑𝐼𝐶 𝑆
Biasing circuits are more efficient in 𝛽𝑑𝐼𝐵 (𝛽 + 1)
1= +
stabilizing the Q-point than bias 𝑑𝐼𝐶 𝑆
battery.
𝛽+1
𝑆=
Importance of stabilization 𝑑𝐼
1−𝛽 𝐵
𝑑𝐼𝐶
• Stabilizes the operating point
• Eliminates thermal runaway It indicates the number of times 𝐼𝐶
changes with respect to 𝐼𝐶𝐵𝑂 .
Considering that 𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 .
Transistor biasing methods
The flow of 𝐼𝐶 raises the temperature
within the transistor. Since collector Among several biasing techniques, the
leakage current (𝐼𝐶𝐵𝑂 ) is temperature most common methods are:
sensitive, thus increasing 𝐼𝐶𝐵𝑂 , which in
turn increases 𝐼𝐶 , further raising the ▪ Fixed bias/base bias
temperature. The cumulative effect of ▪ Emitter bias
the currents causes a burn out. ▪ Collector-feedback bias
▪ Voltage divider bias
The self-destruction of a transistor
due to cumulative effect of 𝐼𝐶 and 𝐼𝐶𝐵𝑂 is
a) Fixed /base bias method
called Thermal runaway. Consists of a base resistor 𝑅𝐵 of high
Stability Factor: The rate of change of 𝐼𝐶 value that provides base biasing.
w.r.t. collector leakage current (𝐼𝐶𝐵𝑂 ) at
constant 𝛽 and 𝐼𝐵 .
𝑑𝐼𝐶
𝑆= |
𝑑𝐼𝐶𝐵𝑂 𝐼𝐵 ,𝛽

The lower the stability factor, the greater

the thermal stability of a transistor circuit.
Ideally, 𝑆 = 1, but practically, it hardly
reaches 1 due to design considerations.

For CE configuration, stability factor is:

Fig. (a). Transistor with fixed bias circuit
𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂
𝑉𝐶𝐶 − 𝑉𝐵𝐸
Differentiating w.r.t. 𝐼𝐶 (assuming 𝛽 is 𝑅𝐵 =
𝐼𝐵
constant)
𝛽𝑑𝐼𝐵 𝑑𝐼𝐶𝐵𝑂
1= + (𝛽 + 1)
𝑑𝐼𝐶 𝑑𝐼𝐶
Since 𝑉𝐶𝐶 and 𝐼𝐵 are preset circuit 𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐸 ≈ 𝐼𝐶 = 𝐼𝐶𝑄 =
parameters, 𝑉𝐵𝐸 is specified for a transistor, 𝑅𝐸 + 𝑅𝐵 /𝛽
thus 𝑅𝐵 has a fixed value, hence fixed biasing.
𝑉𝐶𝐸𝑄 by KVL in the collector emitter loop
In fixed bias, 𝐼𝐵 is independent of 𝐼𝐶 , thus
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 + 𝑉𝐸𝐸 − 𝐼𝐶𝑄 (𝑅𝐸 + 𝑅𝐶 )
𝑑𝐼𝐵 ⁄𝑑𝐼𝐶 = 0, making 𝑆 = 𝛽 + 1.
𝐼𝐶 depends on 𝑉𝐵𝐸 and 𝛽, which change
[∆𝐼𝐶 changes 𝛽 + 1 times as much as ∆𝐼𝐶𝐵𝑂 ]
with temperature.
The large value of S implies poor thermal
If 𝑅𝐸 ≫ 𝑅𝐵 /𝛽 then 𝐼𝐶 is independent of 𝛽;
stability.
𝑉𝐸𝐸 − 𝑉𝐵𝐸
b) Emitter bias Circuit 𝐼𝐶 =
𝑅𝐸
If 𝑉𝐸𝐸 ≫ 𝑉𝐵𝐸 then 𝐼𝐶 is independent of 𝑉𝐵𝐸
𝑉𝐸𝐸
𝐼𝐶 =
𝑅𝐸
Thus if the two conditions are met by
proper circuit design, it attains
appreciable thermal stability.

c) Collector feedback bias

Emitter bias circuit Has a feedback path from collector to
Uses two separate DC sources (+𝑉𝐶𝐶 and base. The base bias voltage is provided by
−𝑉𝐸𝐸 ) and emitter resistor 𝑅𝐸 . 𝑉𝐶𝐵 .

Obtaining the Q-point values Collector -feedback biasing circuit

𝐼𝐶𝑄 from KVL in the base emitter loop Q-point values for collector feedback
circuit;
 𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑅2 𝑉𝐶𝐶
𝐼𝐶𝑄 = 𝑉𝑅2 =
𝑅 𝑅2 + 𝑅1
𝑅𝐶 + 𝐵
𝛽
Applying KVL to the BE loop;
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
𝑉𝑅2 − 𝑉𝐵𝐸
It can be proved that stability factor; 𝑰𝑪𝑸 ≈ 𝐼𝐸 =
𝑅𝐸
𝑆 <𝛽+1 𝐼𝐶 is independent of 𝛽, and in practice,
Suppose temperature increases, It 𝑉𝑅2 ≫ 𝑉𝐵𝐸 also making 𝐼𝐶 independent of
increases collector leakage current and 𝑉𝐵𝐸 , thus ensuring good stabilisation.
hence 𝐼𝐶 , decreasing 𝑉𝐶𝐸 due to increased 𝑉𝑅2 = 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸
𝐼𝐶 𝑅𝐶 [from 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ], thus 𝑉𝐶𝐵
decreases [according to 𝑉𝐶𝐵 = 𝑉𝐶𝐸 − 𝑉𝐵𝐸 ], Suppose 𝐼𝐶 increases due to temperature
thus 𝐼𝐵 decreases [according to 𝐼𝐵 = rise, 𝐼𝐸 𝑅𝐸 increases (𝐼𝐶 ≈ 𝐼𝐸 ); since 𝑉𝑅2 is
𝑉𝐶𝐵 ⁄𝑅𝐵 ], hence decreasing (restoring) 𝐼𝐶 independent of 𝐼𝐶 , 𝑉𝐵𝐸 decreases, hence
to original value. decreasing 𝐼𝐵 , thus decreasing (restoring)
𝐼𝐶 to original value (𝐼𝐶 = 𝛽𝐼𝐵 ).
Provides better stabilization than fixed
and emitter bias methods. Voltage divider biasing has the smallest
possible value of 𝑆, hence maximum
d) Voltage divider bias possible stability.

The most widely used biasing technique. It can be proven that;

Voltage divider resistors 𝑅1 and 𝑅2 divide 𝑅
1 + 𝑅0
supply 𝑉𝐶𝐶 , with voltage drop across 𝑅2 𝑆 = (𝛽 + 1) 𝐸
𝑅
providing the base bias 𝑉𝑅2. 𝛽 + 1 + 𝑅0
𝐸
𝑅𝐸 provides thermal stability. Where 𝑅0 is the Thevenin’s equivalent
resistance;
𝑅1 𝑅2
𝑅0 =
𝑅1 + 𝑅2
In practice, 𝑆 ≅ 10

Design of transistor Biasing

circuits
1. 𝑅𝐸 should be as large as possible
(500Ω − 1𝑘Ω). Increasing 𝑅𝐸 , improves
stabilisation. However, very large 𝑅𝐸
Voltage divider biasing circuit leads to large drop across it hence
 reduces the collector load voltage, and Construction of the DC Loadline
consequently the voltage gain.
From the linear equation:
2. Zero signal current 𝐼𝐶 should be
atleast the peak value of the ac signal ▪ 𝑉𝐶𝐸 is maximum at 𝐼𝐶 = 0 [cut-off
current (𝐼𝐶 ≥ 𝑖𝐶(𝑝) ) condition].
𝐼𝐶 < 𝑖𝐶(𝑝) , it may cut-off a portion of
𝑉𝐶𝐸𝑚𝑎𝑥 = 𝑉𝐶𝐶 − 0(𝑹𝑪 + 𝑹𝑬 );
the negative ½ cycle of the ac signal. If
𝐼𝐶 is too big, results in overheating the 𝑉𝐶𝐸𝑚𝑎𝑥 = 𝑉𝐶𝐶 [point B]
transistor and reduced voltage gain. ▪ 𝐼𝐶 is maximum when 𝑉𝐶𝐸 = 0𝑉 [at
For most transistors 𝐼𝐶 ≥ 1𝑚𝐴 is saturation]
preferred, since output impedance is
very high at 1mA. 0 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 )
3. 𝑅1 and 𝑅2 are chosen such that 𝐼1 ≥ 𝑉𝐶𝐶
10𝐼𝐵 , to achieve good stabilisation. 𝐼𝐶𝑚𝑎𝑥 = [𝑝𝑜𝑖𝑛𝑡 𝐴]
𝑅𝐶 + 𝑅𝐸

Load Line analysis ▪ By joining points A and B, a DC

Loadline is constructed.
A loadline is the linear relationship
between 𝑉𝐶𝐸 and 𝐼𝐶 on the BJT output
characteristics.

There are two types of load lines

depending on signal conditions:

i) DC loadline determined under zero

signal conditions
ii) AC loadline determined under ac signal
conditions

DC loadline: is the linear relationship

between 𝑉𝐶𝐸 and 𝐼𝐶 on the BJT output Fig 3. DC Loadline
characteristics under DC biasing
Quiscent-point (Q-point) determination
conditions. (before application of ac signal).
The Q-point which defines the operating
By applying KVL on the output loop:
level of the circuit is determined at the point
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 where the DC Loadline intersects the
output curve at a chosen base current level
Since 𝐼𝐸 ≈ 𝐼𝐶
for a given circuit.
𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 (𝑹𝑪 + 𝑹𝑬 )
For instance, if the circuit operates at a
Since 𝑉𝐶𝐶 and (𝑅𝐶 + 𝑅𝐸 ) are constants, the base bias level of 𝐼𝐵 = 5𝜇𝐴 [Fig. 3], then the
linear equation defines the DC loadline. intersection between output curve due to
𝐼𝐵 = 5𝜇𝐴 and the loadline is the operating
point (Q-point).

Deriving the expression for Q-point

Applying KVL around the base input loop;
𝑉𝑅2 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑽𝑹𝟐 − 𝑽𝑩𝑬
𝑰𝑬 ≈ 𝑰𝑪𝑸 =
𝑹𝑬
𝑅2 𝑉𝐶𝐶
𝑉𝑅2 =
𝑅2 + 𝑅1
Applying KVL around the collector output
loop;
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐸 𝑅𝐸 Fig. 4 Centered Q-point

Since 𝐼𝐸 ≈ 𝐼𝐶
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) Example 1: For the circuit in Fig. 1, if 𝑅1 =
10𝑘𝛺; 𝑅2 = 5𝑘𝛺; 𝑅𝐶 = 1𝑘𝛺; 𝑅𝐸 = 2𝑘𝛺;
𝑽𝑪𝑬𝑸 = 𝑽𝑪𝑪 − 𝑰𝑪𝑸 (𝑹𝑬 + 𝑹𝑪 ) 𝑉𝐵𝐸 = 0.7𝑉; 𝑉𝐶𝐶 = 15𝑉
𝑵𝑩: Q-point is NOT determined using 𝛽 Determine:
since its value changes with temperature, (i) the d.c. loadline
(ii) The operating point
causing the Q-point shift.

When a transitor is used as an amplifier, it

is always designed for midpoint bias,
where the Q-point lies at the center of the
d.c. load line, to provide largest possible
output.
𝑰𝑪(𝒎𝒂𝒙)
𝑰𝑪𝑸 =
𝟐
𝑉𝐶𝐶(𝑚𝑎𝑥)
𝑽𝑪𝑬𝑸 =
2

Fig. 1
Solution
(i) the d.c. loadline requires points 𝑉𝐶𝐸 and 𝐼𝐶
𝑉𝐶𝐸 = 𝑉𝐶𝐶 = 𝟏𝟓𝑽
 𝑉𝐶𝐶 15 1.837𝑉 − 0.7𝑉
𝐼𝐶 = = = 𝟓𝒎𝑨 ∴ 𝐼𝐸 = = 6.315𝑚𝐴
𝑅𝐶 + 𝑅𝐸 (1 + 2)𝑘𝛺 180𝛺
(ii) By KVL around the base-emitter loop 𝑰𝑪𝑸 = 𝐼𝐸 = 𝟔. 𝟑𝟏𝟓𝒎𝑨

𝑉𝑅2 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0 By KVL in the output (C-E)loop

𝑉𝑅2 − 𝑉𝐵𝐸 5 − 0.7 𝑽𝑪𝑬𝑸 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 (𝑅𝐸 + 𝑅𝐶 )
𝐼𝐸 = = = 2.15𝑚𝐴
𝑅𝐸 2𝑘𝛺
= 10𝑉 − (6.315𝑚𝐴 × 0.8𝑘𝛺)
𝑅2 𝑉𝐶𝐶 5
𝑉𝑅2 = = × 15𝑉 = 5𝑉 = 𝟒. 𝟗𝟒𝟕𝑽
𝑅2 + 𝑅1 15
Q-point (𝑉𝐶𝐸𝑄 , 𝐼𝐶𝑄 ) = (4.947𝑉, 6.315𝑚𝐴)
𝑰𝑪𝑸 = 𝐼𝐸 = 2.15𝑚𝐴
Since 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 ⁄2the circuit is midpoint
By KVL in the output (C-E)loop
biased.
𝑽𝑪𝑬𝑸 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 (𝑅𝐸 + 𝑅𝐶 )

= 15 − (2.15𝑚𝐴 × 3𝑘𝛺) = 8.55𝑉

Example 3: For the circuit in Fig. 3, 𝐼𝐶𝑄 =
Q-point (𝑉𝐶𝐸𝑄 , 𝐼𝐶𝑄 ) 2𝑚𝐴, 𝑉𝐶𝐸𝑄 = 3𝑉. If 𝛽 = 50. Determine
𝑅1 , 𝑅2 , 𝑅𝐸 . Take 𝑉𝐵𝐸 = 0.7𝑉 and 𝐼1 = 10𝐼𝐵
= (8.55𝑉, 2.15𝑚𝐴 )
Example 2: Determine whether the
circuit (below) is midpoint biased.

Fig. 3
𝐼𝐶𝑄 2𝑚𝐴
Fig. 2 𝐼𝐵 = = = 0.04𝑚𝐴
𝛽 50
𝑉𝑅2 − 𝑉𝐵𝐸 𝐼1 = 10𝐼𝐵 = 0.4𝑚𝐴
𝐼𝐸 =
𝑅𝐸
𝑉𝑅1
𝑅2 𝑉𝐶𝐶 2.7𝑘𝛺 𝑅1 =
𝑉𝑅2 = = × 10𝑉 𝐼1
𝑅2 + 𝑅1 14.7𝑘𝛺
𝑉𝑅1 = 𝑉𝐶𝐶 − 𝑉𝑅2
= 1.837𝑉
 𝑉𝑅2 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐵𝐸 𝑉𝑅2 4.7𝑉
∴ 𝐼1 = = = 0.235𝑚𝐴
𝑉𝐶𝐶 − 𝑉𝐶𝐸𝑄 − 𝐼𝐶𝑄 𝑅𝐶 𝑅2 20𝑘𝛺
𝑅𝐸 =
𝐼𝐶𝑄 11.3𝑉
∴ 𝑅1 = = 𝟒𝟖. 𝟎𝟖𝟓𝒌𝜴
0.235𝑚𝐴
9𝑉 − 3𝑉 − 2𝑚𝐴 × 2.2𝑘𝛺
∴ 𝑹𝑬 = = 𝟎. 𝟖𝒌𝜴 Determination of 𝑅𝐶 ;
2𝑚𝐴
∴ 𝑉𝑅2 = 0.7𝑉 + (2𝑚𝐴 × 0.8𝑘𝛺) = 2.3𝑉 𝑉𝐶𝐶 − 𝑉𝐶𝐸𝑄 − 𝐼𝐶𝑄 𝑅𝐸
𝑅𝐶 =
𝐼𝐶𝑄
∴ 𝑉𝑅1 = 9𝑉 − 2.3𝑉 = 6.7𝑉
16 − 6𝑉 − (2𝑚𝐴 × 2𝑘𝛺)
6.7𝑉 𝐼𝐶𝑄 𝑅𝐶 =
∴ 𝑹𝟏 = = 𝟏𝟔. 𝟕𝟓𝒌𝜴 2𝑚𝐴
0.4𝑚𝐴
𝑉𝑅2 2.3𝑉 𝑅𝐶 = 𝟑𝒌𝜴
𝑹𝟐 = = = 𝟓. 𝟕𝟓𝒌𝜴
𝐼1 0.4𝑚𝐴 Example 5: Design a biasing circuit of an
amplifier such that Q (𝑉𝐶𝐸𝑄 , 𝐼𝐶𝑄 ) =
(6𝑉, 1𝑚𝐴), by dertimining 𝑅1 , 𝑅2 , 𝑅𝐸 , 𝑅𝐶 .
Example 4: For the circuit in Fig. 3, Take 𝑉𝐵𝐸 = 0.7.
determine the circuit components 𝑅1 and 𝑅𝐶
such that Q-point (𝑉𝐶𝐸𝑄 , 𝐼𝐶𝑄 ) = (6𝑉, 2𝑚𝐴)
and 𝑉𝐵𝐸 = 0.7.

Fig. 5
For good design;
Fig. 4 𝑉𝐶𝐶 16
𝑉𝐸 = = = 1.6𝑉
𝑉𝑅1 10 10
𝑅1 = 𝑉𝐸 𝑉𝐸 1.6𝑉
𝐼1 𝑹𝑬 = = = = 𝟏. 𝟔𝒌𝜴
𝐼𝐸 𝐼𝐶𝑄 1𝑚𝐴
𝑉𝑅1 = 𝑉𝐶𝐶 − 𝑉𝑅2
𝑉𝐶𝐶 = 𝑉𝐶𝐸𝑄 + 𝐼𝐶𝑄 (𝑅𝐸 + 𝑅𝐶 )
𝑉𝑅2 = 𝐼𝐸 𝑅𝐸 + 𝑉𝐵𝐸 = 0.7 + (2𝑚𝐴 × 2𝑘𝛺)
𝑉𝐶𝐶 − 𝑉𝐶𝐸𝑄 − 𝐼𝐸 𝑅𝐸
= 4.7𝑉 𝑅𝐶 =
𝐼𝐶𝑄
∴ 𝑉𝑅1 = 16𝑉 − 4.7𝑉 = 11.3𝑉
 16 − 6 − 1.6
𝑹𝑪 = = 𝟖. 𝟒𝒌𝜴
1𝑚𝐴
𝑉𝑅2 = 𝑉𝐵𝐸 + 𝐼𝐸 𝑅𝐸 = 1.6 + 0.7 = 2.3𝑉
𝐼𝐶𝑄 1
𝐼𝐵 = = 𝑚𝐴
𝛽 150
1
𝐼1 = 10𝐼𝐵 = 𝑚𝐴
15
𝑉𝑅2 2.3𝑉
𝑹𝟐 = = = 𝟑𝟒. 𝟓𝒌𝜴
𝐼1 1⁄15𝑚𝐴
𝑉𝑅1
𝑅1 =
𝐼1
𝑉𝑅1 = 𝑉𝐶𝐶 − 𝑉𝑅2 = 16𝑉 − 2.3𝑉 = 13.7𝑉
13.7
∴ 𝑹𝟏 = = 𝟐𝟎𝟓. 𝟓𝒌𝜴
1⁄15𝑚𝐴