Lab3
Lab3
Practice Lab - 3
Date: 26th Feb 2021.
Not graded. Deadline: 4th Mar 2021. Attempt at the earliest.
Working with RISC - V using Venus
This is our third lab with RISC-V ISA and Venus simulator. Below tasks are not
exhaustive but are only indicative for your practise. Keep up the practice of arranging
your code using the assembler directives. Also, continue to preload the data you want to
work with.
As you start exploring with control instructions, having a visual of PC of each instruc-
tion will be very handy. So, start observing PC in Venus https://venus.cs61c.org/ (Dont
worry about Cache right now, we’ll look at it in-depth in Module 3 of the course).
Few of the tasks are repeat of tasks you attempted in Lab 2, with a small change. So
you need not explicitly work on Lab 2 tasks if you have not completed them.
Task 1: Task 1 of Lab 2 was to load the value 0xdeadbeef at the memory location
0x1000000. Most likely you would have used instructions like li and la to fill the registers
with such 32bit values. Try to do the same task by avoiding li and la instructions as they
are pseudo instructions.
a) Think about using logical instructions for this (Task 4 in Lab 2 ?).
b) Use instructions lui and auipc.
In this lab, write a single code to perform one (selected as a number read from a memory
location) of the five tasks, using a switch statement. Further, write each of the tasks as a
procedure. You can reuse your code of previous lab.
Task 9: Once you are finished with all the above tasks, upload a single text file docu-
menting your learnings and interesting aspects that you have noticed in Lab3. Write point-
wise statements and not paragraphs. You can also mention any of the programs/logics that
you have (or want to) explore with RISC-V ISA. Upload the file by 4th Mar 2021 11.55PM.