Chapter 2

Boolean Algebra and

Minimization of Functions

LEARNING OBJECTIVES

 Logic gates  K-map method

 Boolean algebra  Prime implicant
 AXIOMS and Laws of Boolean algebra  Implementation of function by using NAND-NOR
 Properties of Boolean algebra Gates
 Conversion from Min term to Max term  EX-OR, EX-NOR GATE
 Minimization of Boolean function

logic gates Table 2 Truth Table

1. Inverter or NOT gate (7404 IC): The inverter performs a Input Output
basic logic operation called inversion or complementation. A B Y
The purpose of the inverter is to change one logic level to the 0 0 0
opposite level. In terms of digital circuits, it converts 1 to 0 0 1 0
and 0 to 1.
1 0 0
A Y
1 1 1

Symbol
Y=A 3. OR gate (logical adder 7432 IC): The OR gate performs
logical, addition commonly known as OR function.
Table 1 Truth Table
A
Input Output Y
B
A Y Symbol
0 1 Y=A+B
1 0 Figure 2 2 input OR gate
2. AND gate (logical multiplier 7408 IC): The AND gate per-
forms logical multiplication more commonly know as AND Table 3 Truth Table
function. The AND gate is composed of 2 or more inputs and Input Output
a single output A B Y
2 i/p AND Gate 0 0 0
A A·B 0 1 1
B
1 0 1
Y = A·B
1 1 1
Figure 1 2 input AND gate
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.15

4. NAND gate (7400 IC): The NAND gate’s function is if both inputs are unequal, then the output will be low.
basically AND + NOT function. Other name for X-NOR gate is equivalent gate.
A Y A
Y
B B
Y = A·B Symbol
Y = A  B = AB + A B
Figure 3 2 input NAND gate
Figure 6 2 input X-NOR Gate
Table 4 Truth Table
Input Output Table 7 Truth Table
A B A B Y
A⋅B A + B (Y)
0 0 1
0 0 0 1
0 1 0
0 1 0 1 1 0 0
1 0 0 1 1 1 1
1 1 1 0
X-NOR Gate is complement of X-OR Gate.
5. NOR gate (7402 IC): The NOR gate is basically OR
+ NOT function. Boolean Algebra
A Boolean algebra is a system of mathematical logic. It
Y
B is an algebraic system consisting of the set of elements
Y=A+B (0, 1), two binary operators OR and AND and one
Figure 4 2 input NOR gate unary operator NOT. The Boolean algebra is governed
by certain well-developed rules and laws.
Table 5 Truth Table
Input Output AXIOMS and Laws of Boolean Algebra
A B A+B A + B (Y) 1. AXIOMS
0 0 0 1
(a) AND operation
 (1) 0 ⋅ 0 = 0
0 1 1 0
 (2) 0 ⋅ 1 = 0
1 0 1 0  (3) 1 ⋅ 0 = 0
1 1 1 0  (4) 1 ⋅ 1 = 1
(b) OR operation
6. Exclusive OR gate X-OR (7486 IC): X-OR is a gate
 (5) 0 + 0 = 0
in which unequal inputs create a high logic level out-
 (6) 0 + 1 = 1
put and if both inputs are equal, the output will be low.
 (7) 1 + 0 = 1
Other name for EX-OR gate is unequivalent gate.
 (8) 1 + 1 = 1
2 input X-OR Gate
(c) NOT operation
A   (9) 1 = 0
Y
B
Symbol
  (10) 0 = 1
Y = A ⊕ B = AB AB 2. Laws
Figure 5 2 input X-OR Gate (a) Complementation law
(1) 0 = 1
Table 6 Truth Table (2) 1= 0
A B Y (3) If A = 0, then A = 1
0 0 0 (4) If A = 1, then A = 0
0 1 1 (5)
A= A
1 0 1
(b) AND laws
1 1 0 (1) A ⋅ 0 = 0 (NULL Law)
(4) A ⋅ 1 = A (Identity Law)
7. Exclusive NOR gate (X-NOR): X-NOR is a gate in (3) A ⋅ A = A
which equal inputs create a high logic level output; and (4) A ⋅ A = 0
1.16 | Unit 1 • Digital Logic

(c) OR laws = 0 + AC + AB + BC
(1) A + 0 = A (NULL Law)
(2) A + 1 = 1 (Identity Law) = AC + AB + BC ( A + A)
(3) A + A = A = AB + ABC + AC + ABC
(4) A + A = 1 = AB + AC
(d) Commutative laws = LHS
(1) A + B = B + A
(2) A ⋅ B = B ⋅ A (c) De Morgan’s theorem
(e) Associative laws Law 1: A + B = A ⋅ B
(1) (A + B) + C = A + (B + C)
This law states that the complement of a sum of
(2) (A ⋅ B)C = A( B ⋅ C)
variable is equal to the product of their individual
(f) Distributive laws
complements.
(1) A(B + C) = AB + AC
(2) A + BC = (A + B) (A + C) Law 2: AB = A + B
(g) Redundant literal rule (RLR) This law states that the complement of the product
(1) A + AB = A + B of variables is equal to the sum of their individual
(2) A( A + B ) = AB complements.
(h) Idempotence laws Example 1: Simplify the Boolean function Y = A( A + B )
(1) A ⋅ A = A
(2) A + A = A Y = A ⋅ A + A⋅ B
(i) Absorption laws Solution: Y = A + AB
(1) A + A ⋅ B = A = A(1 + B )
(2) A (A + B) = A =A
3. Theorems Example 2: Simplify the Boolean function Y = A + AB
(a) Consensus theorem
Theorem 1: Solution: Y = A ⋅ ( B + 1) + A ⋅ B
AB + AC + BC = AB + AC = A ⋅ B + A + AB
Proof:
= B ( A + A) + A
LHS = AB + AC + BC
= AB + AC + BC ( A + A) = A+ B
Example 3: Simplify the Boolean function
= AB + AC + BCA + BCA
= AB(1 + C ) + AC (1 + B ) Y = A( A + B) + B( A + B)

= AB(1) + AC (1) Solution: Y = A ⋅ A + A ⋅ B + B ⋅ A + B ⋅ B
= AB + AC = A + B ( A + A) + B
= RHS. = A + B ⋅1 + B
Theorem 2:
( A + B) ( A + C ) ( B + C ) = ( A + B) ( A + C ) = A+ B + B
Proof: = A+ B
LHS = ( A + B) ( A + C ) ( B + C ) Example 4: Simplify the Boolean function
= ( AA + AC + BA + BC ) ( B + C ) Y = ABC + ABC + ABC + ABC
= ( AC + BC + AB ) ( B + C ) Solution: Y = AC ( B + B) + AC ( B + B )
= ABC + BC + AB + AC + BC + ABC = AC + AC
= AC + BC + AB = C ( A + A)
RHS = ( A + B) ( A + C ) =C
= AA + AC + BC + AB Example 5: Simplify the Boolean function
Y = ABC + ABC + ABC
= AC + BC + AB
= LHS. Solution: = AC ( B + B ) + ABC
(b) Transposition theorem = AC + ABC
AB + AC = ( A + C ) ( A + B)
= A(C + BC )
Proof:
RHS = ( A + C ) ( A + B) = A(C + B)
= AA + CA + AB + CB = A+C B
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.17

Example 6: Simplify the Boolean function So the expression inside the parentheses must be evalu-
Y = AB + C B + CA + ABD ated before all the operations. The next operation to be
performed is the complement and then follows AND and
Solution: Y = AB(1 + D ) + C B + CA finally the OR.
= AB + CB + CA Complement of function The complement of a function F
= AB + CB is F′ is obtained from an interchange of 0s for 1s and 1s for
0s in the value of F. The complements of a function may be
derived algebraically through De Morgan’s theorems.
Properties of Boolean Algebra (x1 . x2 . x3… xn)′ = x1′ + x′2 + x3′ + … + xn′
n
With n variables, maximum possible distinct functions = 22 . (x1 + x2 + x3+ … +xn)′ = x′1 . x2′ . x′3 . x′4 … x′n
Duality consider the distributive law
Example 10: The complement of function F = a(b′c + bc′)
1. x (y + z) = xy + xz is?
2. x + yz = (x + y) (x + z)
Solution: (F)′ = [a(b′c + bc′)]′
Second one can be obtained from the first law if the binary = a′ + (b′c + bc′)′
operators and the identity elements are interchanged. This = a′ + (b′c)′ ⋅ (bc′)′
important property of Boolean algebra is called the duality = a′ + (b + c)′ (b′ + c)
principle. F′ = a′ + bc + b′c′
The dual of an algebraic expression can be written by
interchanging OR and AND operators, 1s by 0, and 0s x x
xy x·y
by 1s. y y
x x
x·y = x + y x+y
Example 7: x + x ′ = 1 ←
Dual
→ x ⋅ x′ = 0 y y
x x
Solution: xy + xy ′ = x ←
Dual
→ ( x + y ) ( x + y ′) = x x+y x+y
y y
x x
x + y = xy xy
x + x ′y = x + y ←
Dual
→ x( x ′ + y ) = xy y y
x x
Example 8: The dual of F = xy + xz + yz is? y
x + y = xy
y
xy

x x
Solution: Dual of F = (x + y) (x +z) (y + z) x+y=x+y x+y
y y
= (x + xz + xy + yz) (y + z) = xy + yz + xz
So dual of xy + xz + yz is same as the function itself; Figure 7 Gates with inverted inputs
For N variables maximum possible self-dual functions
n−1 n
= 2 2 = 2( 2 / 2 )
Boolean Functions, Min Terms
Example 9: Which of the following statement/s is/are true
S1: The dual of NAND function is NOR and Max Terms
S2: The dual of X-OR function is X-NOR The starting point for designing most logic circuits is the truth
(A) S1 and S2 are true table, which can be derived from the statement of problem.
(B) S1 is true The truth table is then converted into a Boolean expression
(C) S2 is true and finally create the assembly of logic gates accordingly.
(D) None of these Let us consider the example of majority circuit. This cir-
cuit takes three inputs (A, B, C) and have one output (Y)
Solution: (A)
which will give the majority of the inputs, i.e., if A, B, C are
NAND = (xy)′ = x′ + y′ having more number of zeros. Y = 0 else if A, B, C are hav-
Dual of NAND = (x + y)′ = x′ y′ ing more number of 1s, Y = 1.
X-OR = xy′ + x′y So from the statements we can derive the truth table as
Dual of X-OR = (x + y′) (x′ + y) = xy + x′y′ = X-NOR follows:
Both S1 and S2 are true
A
Operator precedence The operator precedence for evaluat- Majority
B Y
circuit
ing Boolean expression is C
1. Parentheses
2. NOT As we are using three Boolean variables A, B, C,
3. AND total number of combinations in truth table are
4. OR 23 = 8.
1.18 | Unit 1 • Digital Logic

Similarly for n variables, the truth table will have total of Min Term and Max Term
2n combinations, for a Boolean function. All the Boolean expressions can be expressed in a standard
Input Output sum of product (SOP) form or in a standard product of sum
(POS) form.
Sl. no. A B C Y
1 0 0 0 0 → Y = 0, If inputs •• A standard SOP form is one in which a number of prod-
2 0 0 1 0 are having more uct terms, each contains all the variables of the func-
3 0 1 0 0
zeros. tion either in complement or non-complement form are
summed together.
4 0 1 1 1 → Y = 1, If inputs
•• A standard POS form is one in which a number of sum
5 1 0 0 0 are having
more 1’s terms, each one of which contain all the variable of he
6 1 0 1 1 function either in complemented or non-complemented
7 1 1 0 1 form are multiplied together.
8 1 1 1 1 •• Each of the product term in standard SOP form is called
a min term.
For some combinations, output Y = 1, and for others Y = 0. •• Each of the sum term in the standard POS form is called
The input combinations for which output Y = 1 are called a max term.
as min terms.
Similarly the input combinations for which output Y = 0
are called as max terms. Conversion from min terms to
Min terms are expressed as product terms, Similarly, max terms representation
max terms are expressed as sum terms.
The output Y = 1, only in rows 4, 6, 7, 8. Y = ABC + ABC + ABC + ABC
So the min terms combinations are 011, 101, 110, 111 in Y ′ = ( ABC + ABC + ABC + ABC )′
Boolean Algebra, 1 input will be written as A, B, C and 0 input
= ( ABC )′( ABC )′( ABC )′( ABC )′
will be written as A, B , C in complement form, we express
(Y ′)′ = [( A + B + C )( A + B + C )( A + B + C )( A + B + C )]′
these min terms as product terms, ABC , ABC , ABC , ABC .
= [p(3, 5, 6, 7)]1 = p(0, 1, 2 ,4)
To express Y as Boolean expression, we can write it as
sum of the min terms. Y = ( A + B + C )( A + B + C )( A + B + C )( A + B + C )
Y = AB C + AB C + ABC + ABC or Y = S(3, 5, 6, 7) = p(0, 1, 2, 4)
We know that AND operation is a product while OR is sum.
So the above equation is a sum of the products (SOP), (or) Conversion from normal SOP/POS form
min terms expression.
to canonical SOP/POS
The other way of expressing Y is Y = Sm (3, 5, 6, 7).
Y = m3 + m5 + m6 + m7. Let us consider f ( A, B, C ) = A + BC + AC
The min term numbers are the decimal equivalent of input The above function is in normal (minimized) SOP
binary combinations. from, to convert this function to standard SOP(or) canoni-
Similar to SOP we can have product of sums (POS) cal SOP form, include missing variable in each and every
Boolean expression. term, to make it complete. First term A, Missing literals
The output Y = 0 for the input combinations 000, 001, are B, C. Consider A X X, so possible combinations are
010, 100. For max terms 1 input will be indicated as A, B , C ABC , ABC , ABC , ABC or we can write
in complement form, 0 input will be indicated as A, B, C
and max terms are expressed as sum terms. A = A = A( B + B)(C + C ) = ABC + ABC + ABC + ABC
Second term BC-missing literal is A. Consider XBC ⇒ So
A + B + C, A + B + C , A + B + C , A + B + C
possible combinations are ABC, ABC or we can write
Any function can be expressed as product of max terms.
BC = ( A + A) BC
So Y = ( A + B + C ) ( A + B + C ) ( A + B + C ) ( A + B + C )
= ABC + ABC
The above equation is a product of sum expression (POS) or
max terms expression. Third term AC = missing literal is B. Consider AXC → so
In other way Y = pM (0, 1, 2, 4) possible combinations are ABC , A, BC or we can write
= M0 ⋅ M1 ⋅ M2 ⋅ M4
AC = A( B + B )C
The max term numbers are decimal equivalents of cor-
responding input binary combinations. = ABC + ABC
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.19

Now, f ( A, B, C ) = ABC + ABC + ABC + ABC + ABC , after m0 m1 m3 m2

removing the redundant terms. m4 m5 m7 m6
Now consider
yz
f ( A, B, C ) = ( A + B ) ( A + C ) x 00 01 11 10
0 x ′y ′z x ′y ′z x ′yz x ′y z ′
To convert this expression to canonical form or standard
1 xy ′z ′ xy ′z xyz xyz ′
POS form we can write
3-variable K-map
f ( A, B, C ) = ( A + B + C ⋅ C ) ( A + B ⋅ B + C )

Here the C variables is absent from first term and B from Four-variable K-maps
second term. So add C ⋅ C = (0) to first, and B ⋅ B to second, The K-map for four variables is shown here, 16 min terms
and using distributive law arrive at the result. are assigned to 16 squares.
yz
f ( A, B, C ) = ( A + B + C ) ( A + B + C ) ( A + B + C )( A + B + C ) 00 01 11 10
wx
00 0 1 3 2

Minimization of Boolean Functions 01 4 5 7 6

11 12 13 15 14
Simplification Procedure 10 8 9 11 10
•• Obtain truth table, and write output in canonical form or
standard form The map is considered to lie on a surface with the top
•• Generate K-map! and bottom edges as well as the right and left edge touching
•• Determine Prime implicants. each other to form adjacent squares.
•• Find minimal set of prime implicants. •• One square → a min term of four literals
•• Two adjacent square → a term of three literals
Karnaugh Map (K-map) Method •• Four adjacent square → a term of two literals
Karnaugh map method is a systematic method of simplify- •• Eight adjacent square → a term of one literal
ing the Boolean expression. K-map is a chart or a graph •• Sixteen adjacent square → The constant one
composed of an arrangement of adjacent cell, each repre-
senting a particular combination of variable in sum or prod-
uct form. (i.e., min term or max term). Don’t-care Combinations
It can often occur that for certain input combinations, the
Two-variable K-map value of the output is unspecified either because the input
combination are invalid or because the precise value of the
x y F output is of no consequence. The combination for which
0 0 m0 y 0 the values of the expression are not specified are called
0 1 m1 x 1
don’t-care combinations. During the process of design
1 0 m2 m0 m1 0 x ′y ′ x ′y
using an SOP, K-map, each don’t-care is treated as a 1 if
1 1 m3 m2 m3 1 xy ′ xy
        it is helpful in Map Reduction, otherwise it is treated as
a 0 and left alone. During the process of design using a
POS K-map, each Don’t-care is treated as a 0 if it is useful
Three-variable K-map in Map Reduction, otherwise it is treated as a 1 and left
A three-variable map will have eight min terms (for three alone.
variables 23 = 8) represented by 8 squares
Example 11: Find the Minimal expression
x y z F Sm (1, 5, 6, 12, 13, 14) + d (2, 4)
0 0 0 m0
m1
Solution: CD
0 0 1 00 01 11 10
AB
0 1 0 m2 00 1 ×
0 1 1 m3 01 × 1 1
1 0 0 m4 11 1 1 1
1 0 1 m5 10
1 1 0 m6
1 1 1 m7 ∴ F = BC + BD + ACD
1.20 | Unit 1 • Digital Logic

Pairs, Quads and Octets Octet

BC The group of eight cells will form one octet.
A 00 01 11 10
0 1 1 ZW
XY 00 01 11 10
1
00
The map contains a pair of 1s those are horizontally adja- 01 1 1 1 1
cent. Those cells represent A BC , ABC . 11 1 1 1 1
For these two min terms, there is change in the form of 10
variable B. By combining these two cells we can form a F=Y
pair, which is equal to A BC + ABC = AC ( B + B) = AC .
If more than one pair exists on K-map, OR the simplified Other variable X, Z, W changes their form in octet. Octet
products to get the Boolean function. can eliminate three variables and their complements.
CD CD
AB 00 01 11 10 AB 00 01 11 10
00 1 1 1 00 1 1
BC
A 00 01 11 10 01 1 01 1 1
0 1 1 11 1 11 1 1
1 1 1 10 1 1 1 10 1 1

F = AC + AC F = AC D + A BD + AB C + AC D F=D
Other variable A, B, C are vanished.
So Pair eliminates one variable by minimization.
Eliminating Redundant Groups
Quad
Quad is a group of four 1s those are horizontally or verti- BC BC
A 00 01 11 10 A 00 01 11 10
cally adjacent.
0 1 1 0 1 1
BC BC
00 01 11 10 00 01 11 10 1 1 1     1 1 1
A A
0 1 1 0 1 1
AB + AC + BC             AB + AC
1 1 1           1 1 1

      F = C           F = AC + AC = ( A + A)C = C Here BC is redundant pair, which covers already covered
min terms of AB, AC .
By considering two pairs also it will be simplified to C.
Quad eliminates two variables from the function RS
CD PQ 00 01 11 10
AB 00 01 11 10 00 1
00 1 1 1 1 1
01
01 1 1 11 1 1 1
11 1 1
10 1
10 1 1
This K-map gives fourpairs and one quad.
F = BD + BD
RS
Corner min terms can from a Quad PQ 00 01 11 10
RS 00 1
PQ 00 01 11 10 01 1 1 1
00 1 1 11 1 1 1
01 10 1
11
10 1 1 But only four pairs are enough to cover all the min times,
Quad is not necessary.

F = QS P RS + PQR + PQR + PRS is minimized function.

 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.21

Prime Implicant A B C

The group of adjacent min terms is called a Prime Implicant,

i.e., all possible pairs, quads, octets, etc.
BC
A 00 01 11 10
0 1 1 1
1 1 1 F

Prime implicants are B C , BC , C , A B. Minimized function

is C + A B

Essential Prime Implicant

The prime implicant which contains at least one min term
Figure 8 Logic diagram
which cannot be covered by any other prime implicant is
called Essential prime implicant. Example 13: Find the minimal expression for Sm (2, 3, 6,
BC
7, 8, 10, 11, 13, 14)
A 00 01 11 10
0 1 1
Solution: K-map is:
1 1 1 1 CD
AB 00 01 11 10
Min term 0, 6 can be grouped with only one pair each. 0 1 3 2
00 1 1
The total possible prime implicants are A B, BC , AC , AB
4 5 7 6
but min term 0, 6 can be covered with A B, AB . So we call 01 1 1
them as essential prime implicants. Min term 5 can be 12 13 15 14
paired with any of 1 or 7 min term. 11 1 1
ZW 8 9 11 10
XY 00 01 11 10 10 1 1 1
00 1 1
01 1 1
∴ F ( A, B, C , D ) = ABCD + ABD + AC + BC + CD
11 1 1
10 1 Example 14: Three Boolean functions are defined as below
f1 = Sm(0, 1, 3, 5, 6), f2 = Sm(4, 6, 7) f3 = Sm(1, 4, 5, 7),
The essential prime Implicants are XZW , X Y Z then find f.

Redundant Prime Implicant f1

f
The prime implicant whose min terms are already cov- f2
ered by at least one min term is called redundant prime
f3
implicants.
BC
A 00 01 11 10 Solution: When two Boolean functions are ANDed, the
0 1 1 resultant will contain the common min terms of both of
1 1 1
the functions (like, intersection of min terms). If two
Boolean functions are ORed, then resultant is the combi-
Here prime implicants are A B , AC , BC . But BC is nation of all the min terms of the functions (like union of
already covered by other min terms So BC is redundant min terms)
prime implicant. Here f = f1 f 2 ⋅ f 3 = f1 f 2 + f 3
Example 12: Find the minimal expression for Sm(1, 2, 4,
6, 7) and implement it using Basic gates. Here f1 ⋅ f2 = Common min terms in f1 and f2 = Sm(6)
f1 ⋅ f2 + f3 = Combination of min terms of f1 ⋅ f2 and f3
Solution: K-map is
BC
= ∑(1, 4, 5, 6, 7)
A 00 01 11 10 Example 15: What is the literal count for the minimized
0 1 1 SOP, and minimized POS form for the following function?
1 1 1 1 f(A, B, C, D) = ∑m(0, 1, 2, 5, 12) + fd(7, 8, 10, 13, 15)
Solution: f(A, B, C, D) = ∑m(0, 1, 2, 5, 12) + f (7, 8, 10,
F = AC + AB + BC + BC + ABC 13, 15)
1.22 | Unit 1 • Digital Logic

CD
00 01 11 10
Implementation of Function
AB
00 1 1 1 by Using Nand–Nor Gates
01 1 × NAND or NOR gates are called as universal gates, because
11 1 × × any function can be implemented by using only NAND
10 × ×
gates or only using NOR gates.
A AB
AB AND gate
B

f = 1 quad + 2 pairs A A · B = A + B OR gate

A
Literal count = 1 × 2 + 2 × 3 = 8
f (A, B, C, D) = pM(3, 4, 6, 9, 11, 14) + f(7, 8, 10, 13, 15) B
B
CD A
AB 00 01 11 10 A·A
A = A NOT gate
00 1 0 1 A
01 0 × 0 A · AB
11 × × 0
A AB A · AB + B · AB = A ⊕ B
10 × 0 0 × B
AB

f will consists of 3 quads + 1pair B · AB

=3×2+1×3=6+3=9 Figure 9 Implement of basics gates by using NAND gates

A A + A = A NOT gate

A
A A + B = AB AND gate

B
B

A A+B
A + B OR gate
B

A·A+B

A A−B (A + A + B )(B + A + B ) = AB + A B = A  B
B EX–OR, EX-NOR gate
AB + AB ) = A ⊕ B

(B · A + B)

Figure 10 Implementation of basic gates by using NOR gates

Any function which is in the SOP form can be imple- B

mented by using AND-OR gates, which is also equivalent A f = AB + AC
to NAND–NAND gates.

F = AB + AC
B AB C
A f = AB + AC Now the circuit is in completely in NAND – NAND form
So the functions expressed in SOP form, can be imple-
AC mented by using AND – OR, (or) NAND–NAND gates.
Any function in POS from, can be implemented by using
C
OR–AND gates, which is similar to NOR–NOR gate.
By considering bubble at AND gate output and OR gate Example 16: How many number of NAND gates are
input, and by changing NOT gates to NAND gates the cir- required to implement f (A, B, C) = AB + BC + AC
cuit becomes as, (A) 3 (B) 4 (C) 5 (D) 6
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.23

Solution: A Now the circuit consists of all NOR gates. Three NOR
B Gates are required.
B f (A, B, C)
C Example 19: How many number of two-input NAND–
A NOR gates are required to implement three-input NAND–
C NOR gates respectively?
By considering bubbles at output of AND gate and input of (A) 2, 2 (B) 2, 3
OR gate. (C) 3, 2 (D) 3, 3
A
B Solution: f ( A, B, C ) = ABC = AB + C
B f (A, B, C) (1) Implement above function by using two-inputs gates
C
A
A
C B

So four NAND gates are required. C

Example 17: Number of NAND gates required for
implementation of f ( A, B) = A + BC is Now convert each gate to NAND gate
(A) 3 (B) 4 (C) 5 (D) 6 A AB AB
ABC =
Solution: A B
f (A, B ) C = f (A, B, C)

B Three two-input NAND gates are required.

C (2) G ( A, B, C ) = A + B + C Implement it by using two-
To convert the all gates into NAND gates, place bubble input gates
output of AND, and inputs of OR gates. Now, the circuit A
can be drawn as B
A C
f (A, B )
Now convert each gate to NOR gate
B A
C B
Four NAND gates are required.
C
Example 18: f = A + BC, the number of NOR gates required
to implement f, are? Three two-input, NOR gates are required.
(A) 3 (B) 4 (C) 5 (D) 2
Solution: A + BC is in SOP form. EX-OR, EX-NOR Gates
To implement this function by using NOR gates, we can Inverted inputs for EX OR, EX-NOR gates
write f (A, B, C) = A + BC = (A + B) (A + C)
Which is in the form of POS? A
B
A
B A ⊕ B = AB + A B = AB + A B = A  B
f (A, B, C )
A
A B
C A ⊕ B = AB + A B = AB + A B = A  B
By including bubbles at output of OR gate, and input of
AND gate, the circuit becomes A
B
A
B A ⊕ B = A B + A B = AB + AB = A ⊕ B

f (A, B, C ) A
B
A
C A  B = AB + A B = AB + AB = A ⊕ B
1.24 | Unit 1 • Digital Logic

A Example 20: For the logic circuit shown in figure, the

B required input condition (A, B, C) to make the output X = 0 is?
A  B = AB + A B = AB + AB = A ⊕ B A
B
A
X
B
C
A  B = A B + AB = A B + AB = A  B

From the above discussions we can conclude that inverted (A) 1, 1, 1 (B) 1, 0, 1
input EXOR gate is EX-NOR gate. (C) 0, 1, 1 (D) 0, 0, 1
Similarly, inverted input EX-NOR gate is EX-OR gate. If Solution: (D)
both inputs are inverted the EX-OR / EX-NOR will remain To get output X = 0, all inputs to the NAND gate should be
as it is. 1, so C = 1.
Consider a three-inputs X-OR gates by using two-input When C = 1, the output of X-OR gate B⊕C = 1 only when
XOR gates. B = 0.
If B = 0 the output of X-NOR gate A ⊙ B = 1.
A Only when A = 0
A⊕B⊕C
B So X = 1, only when (A, B, C) = (0, 0, 1).
C Example 21: The minimized expression of
A
A ·B ·C ( A + B) ( AB + AC ) ( AC + B) is
B
Solution: ( A + B) ( AB + AC ) ( AC + B)
C
= ( A + B ) ( AB ⋅ AC + AB ⋅ B + AC ⋅ AC + AC ⋅ B)
A
B
A⊕B · C = ( A + B) ( AB + ABC ) = ( A + B) AB(1 + C )
= AB + AB = AB
C
Example 22: The Boolean function f is independent of
A
A ⊕B ⊕C (A) a (B) b
B
(C) c (D) None of these
C Solution: (A)
So we can conclude that A ⊕ B ⊕ C = A ⊙ B ⊙ C A
B F
A⊕ B ⊕C = A B C
A C
B
F = ab ⋅ bc
C
= ab + bc = ab + b + c
A
A⊕B · C
B = b + c is independent of ‘a’.
Example 23:
C
A
A
A B
A · B⊕C
B

C B
C
A⊕ B ⊕C = A B C = A⊕ B C f=?
A
=A⊙B⊕C
C
A⊕B⊕C⊕D=A⊕B⊙C⊙D=A⊙B⊙C⊕D=A
⊙B⊕C⊙D
A B C  D = A⊕ B ⊕C ⊕ D A

A⊙B⊙C⊙D=A⊕B⊕C⊙D=A⊕B⊙C⊕D B
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.25

Y = ( A ⋅ B ⋅ AB ) = ( A + B ) ( A + B) ∵ ( A ⋅ B = A + B )
Solution: f = {A ⊕ B ⊕ B ⊕ C } ⊕ {A ⊕ C ⊕ B ⊕ A}
={A ⊕ 0 ⊕ C} ⊕ {0 ⊕ C ⊕ B} = ( A + B) + ( A + B) = A ⋅ B + A ⋅ B

=A ⊕ C ⊕ C ⊕ B = A ⊕ 0 ⊕ B = A ⊕ B = A⋅ B + A⋅ B = A ⊕ B

Example 4: Simplify the Boolean function A ⊕ A B ⊕ A

Solved Examples Solution: A ⊕ A B ⊕ A
Example 1: Simplify the Boolean function, x y + x′z + y z
Associativity
Solution: x y + x′ z+ y z
By using consensus property = 1 ⊕ AB = A B
xy + x′z + yz = xy + x′z = A + B (∵ De Morgan’s)
Y = xy + x′z
Example 5: AB
Example 2: The output of the given circuit is equal to CD 00 01 11 10
A 00 0 0 1 1
B 01 0 × × 1
11 × × 1 ×
10 1 0 1 1
A
The minimized expression for the given K–map is
B
Solution: AB
CD 00 01 11 10
Solution: A  B = AB + AB
00 0 0 1 1
A 01 0 × × 1
1
B 11 × × 1 ×

3 y 10 1 0 1 1

A
2 X OR gate = A+ BC
B
Example 6: In the figure shown, y2, y1, y0 will be 1s
A  B = AB + AB complement of x2 x1 x0 if z = ?

So the output of above circuit is ‘0’. As two inputs are same x0

y0
at third gate.
Output of XOR gate with two equal inputs is zero.
x1
\y=0 y1

Example 3: The circuit shown in the figure is functionally

x2
equivalent to y2

A
z=?
B
A Solution: We are using X-OR gate
∴ XOR out-put is complement of input only when other
B input is high.
∴Z=1
Solution:
Example 7: The output y of the circuit shown is the figure is
A
A A·B A
(A + B )
y=A⊕B B
B
A C y

B A · B (A + B ) D
B E
1.26 | Unit 1 • Digital Logic

Solution: Example 8: Simplify the following function

A A+B
B (A + B ) · C f = A( AB) ⋅ B( AB)

C y
Solution: A( AB) ⋅ B( A⋅ B )
D DE
E DE
[ A + ( AB)]⋅[ B + ( AB)] = A + ( AB) + ( B + AB)
y = ( A + B) ⋅ C ⋅ DE = ( A + B) ⋅ C + DE
= A⋅( AB ) + B⋅( AB ) = A ⋅ ( A + B ) + B( A + B)
= ( A + B )C + DE ( x ⋅ y = x + y ) = A⋅ A + A B + B A + B⋅ B = A + B = AB

Exercises
Practice Problems 1 are high. The minimized Boolean expression for the
Directions for questions 1 to 25: Select the correct alternative out put is
from the given choices. (A) AB + BC + AC
1. The output of the following circuit is (B) ABC + ABC + ABC + ABC
A (C) ABC + ABC + ABC
(D) AB + BC + AC
6. Consider the following logic circuit whose inputs are
(A) 0 (B) 1 functions f1, f2, f3 and output is f.
(C) A (D) A′ f1(x, y, z)
2. The circuit which will work as OR gate in positive level
will work as ___ gate in negative level logic f 2(x, y, z) f (x, y, z)
(A) NOR gate
(B) NAND gate f 3(x, y, z)
(C) Both NAND and NOR gate Given that f1(x, y, z) = ∑(0, 1, 3, 5) f2 (x, y, z) = ∑(6, 7)
(D) AND gate and f(x, y, z) = ∑(1, 4, 5), then f3 is
3. Four logical expressions are given below: (A) ∑(1, 4, 5) (B) ∑(6, 7)
(a) A ⋅ B ⋅C ⋅ D E ⋅ F ⋅ G ⋅ H (C) ∑(0, 1, 3, 5) (D) None of these
(b) AB ⋅CD ⋅ EF ⋅GH 7. The circuit shown above is to be used to implement
the function z = f ( A, B) = A + B what values are to be
(c) A + B + C + D + E + F + G + H selected for I and J?
(d) ( A + B) (C + D ) ( E + F ) (G + H ) I J
Two of these expression are equal. They are
(A) c and d (B) b and d
A
(C) a and b (D) a and c Z
4. For the logic circuit shown in figure, the simplified
Boolean expression for the out put y is
A (A) I = 0, J = B (B) I = 1, J = B
B (C) I = B, J = 1 (D) I = B, J = 0
8. Parity checker output from the below figure, if input is
11111 (D4 D3 D2 D1 D0) and 10000 (D4 D3 D2 D1 D0).
y
{1 = error, 0 = no error}
D4
C E
D3
(A) A+B+C (B) A D2
(C) ABC (D) BC
D1
5. In a digital system, there are three inputs A, B and C.
The output should be high when at least two inputs D0
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.27

(A) error, error 13. The Boolean expression for P is

(B) error, no error A
(C) no error, error B
(D) no error , no error P

9. For the given combinational network with three inputs Y

A, B and C, three intermediate outputs P, Q and R, and C
two final outputs X = P ⋅ Q = ∑(0, 2, 4) and Y = P ⋅ R
= ∑(1, 2, 4, 6) as shown below. Find the smallest
function P(containing minimum number of min terms (A) AB (B) AB
that can produce the output x and y) (C) A + B (D) A + B
Q 14. The Boolean expression for the truth table is
A x = ∑(0, 2, 4)
A B C f
B 4:1 P
0 0 0 0
C y = ∑(1, 2, 4, 6)
R 0 0 1 0
0 1 0 0
(A) ∑(2, 4)
0 1 1 1
(B) ∑(0, 1, 2, 4, 6)
1 0 0 0
(C) ∑(3, 5, 7)
(D) ∑(1, 2, 6) 1 0 1 0
1 1 0 1
10. The standard form of expression AB + ACD + AC is 1 1 1 0
(A) ABCD + ABCD + ABCD + ABCD + ABCD
(A) B( A + C ) ( A + C ) (B) B ( A + C ) ( A + C )
+ ABCD + ABCD + A BCD + ABCD
(C) B( A + C ) ( A + C ) (D) B ( A + C ) ( A + C )
(B) AB + ACD + AC
15. Simplify (d represents don’t-care)
(C) ABC + ABC + ABCD + ACB + ACB D AB
(D) ABC D + ABCD + ABC + ABD + ABC C 00 01 11 10
0 1 d 1
11. Factorize ABC D + ABCD + ABCD + ABCD 1 1 d 1
(A) B + C (B) AB + CD
(C) BC (D) AC (A) B (B) B + C
12. The K-map of a function is as shown. Find the function. (C) B + A (D) A + C
yz
wx 00 01 11 10
1 1 16. Simplify ( AB + C ) ( A + B + C )
1 1 1 1
(A) ( A + B + C ) ⋅ ( A + B + C )
1 1
1 1 (B) ( A + B + C ) ⋅ ( A + B + C )

(A) wx (B) z (C) ( A + B ) ⋅ ( A + B + C )

(C) w ( z + z ) + zw (D) wx + z (D) None of these

17. The point P in the figure is stuck at 1. The output f will be

1 8 9
3 5 A
f
B P
7
4 6
2

(A) ABC (B) A (C) ABC (D) A

1.28 | Unit 1 • Digital Logic

18. Find the function represented by the figure (A) ABC + DBC, 4 (B) ABC + DAC , 3
4
1 A (C) DAC + DBC , 1 (D) ABC + DBC , 2
A
21. The function f = A ⊕ B ⊕ C ⊕ D is represented as
B
5 (A) f (A, B, C, D) = ∑(2, 6, 10, 11, 12, 13, 14)
2 B
B Output (B) f (A, B, C, D) = ∑(3, 5, 7, 10, 11, 12, 13, 14)
(C) f (A, B, C, D) = ∑(1, 2, 6, 8, 10, 12, 13, 14)
C
6 (D) f (A, B, C, D) = ∑(1, 2, 4, 7, 8, 11, 13, 14)
3 C
A 22. Find the function represented
B x0
…… f
x1
(A) A + B + C (B) AB x2 x3 xn − 2 xn − 1 xn
(C) AB + C (D) B + C
(A) (x0 + x1) (x2 + x3) (x4 + x5) … (xn-1 + xn)
19. A staircase light is controlled by two switches, one is (B) x0 + x1 + x2 + x3 + … + xn
at the top of the stairs and other at the bottom of stairs. (C) x0­x2x4 … xn + x1x2 … xn + xn-1 xn
Realization of this function using NAND logic results (D) x0x1 + x2x3 + … + xn-1 xn
in which of the following circuits? (Assume S1 and S2 23. The minimum number of NAND gates required to
are the switches) implement A ⊕ B ⊕ C is
(A) (A) 8 (B) 10
S1 (C) 9 (D) 6
f
24. Which of the following circuit will generate an odd
S2 parity for a 4-bit input? (Assume ABCD as input)
(A) A
B
Output
(B) S1
C
S2
f D
(B) A
S1 B Output
S2
C
(C)
D
S1
f (C) A
B Output
C
S2
(D) D
S1
(D) A
S2
B Output
f
C
S1
D
S2
25. For the output F to be 1 in the circuit, the input combi-
20. For the given figure simplify the expression and find nation should be
which is the redundant gate?
A A
B 1 B
C
4 X
D
A 2 F
C
C
D
B 3 (A) A = 1, B = 1, C = 0 (B) A = 1, B = 0, C = 0
C (C) A = 0, B = 1, C = 0 (D) A = 0, B = 0, C = 1
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.29

Practice Problems 2 (A) w = z , x = y (B) = w z= ,x z

Directions for questions 1 to 25: Select the correct alternative
(C) w = y (D) w = y = z
from the given choices.
1. An OR Gate has six inputs. How many input words are 8. For the logic circuit shown in the figure, the required in
there in its truth table? put condition (A, B, C) to make the output (x) = 1 is
(A) 6 (B) 36 A
(C) 32 (D) 64 B
2. Sum of product form can be implemented by using
(A) AND – OR
X
(B) NAND – NAND C
(C) NOR – NOR
(D) Both A and B
3. Which one of the following is equivalent to the Boolean (A) 0, 0, 1 (B) 1, 0, 1
expression? (C) 1, 1, 1 (D) 0, 1, 1
Y = AB + BC + CA 9. Which of the following is a basic gate?
(A) AB + BC + CA (A) AND (B) X-OR
(C) X-NOR (D) NAND
(B) ( A + B) ( B + C ) ( A + C )
10. Which of the following represent the NAND gate?
(C) ( A + B) ( B + C ) ( A + C )
(a)
(D) ( A + B) ( B + C ) (C + A)
4. What Boolean function does the following circuit
(b)
represents?
B
(c)
A C G
D Y (A) a only (B) a, b, c
(C) b, a (D) a, c
F
E 11. The universal gates are
(A) A [F+ (B + C) ⋅ (D + E)] G (A) NAND and NOR (B) AND, OR, NOT
(B) A + BC + DEF + G (C) X-OR and X-NOR (D) All of these
(C) A [(B + C) + F (D + E)] G 12. In the circuit the value of input A goes from 0 to 1 and
(D) ABG + ABC + F (D + E) part of B goes from 1 to 0. Which of the following rep-
5. The minimum number of two input NOR gates are resent output under a static hazard condition?
required to implement the simplified value of the fol- A
lowing equation B Y

f(w, x, y, z) = Sm(0, 1, 2, 3, 8, 9, 10, 11)

(A) One (B) Two (a)
(C) Three (D) Four
6. The out put of a logic gate is ‘1’ when all inputs are at (b)
logic ‘0’. Then the gate is either
(1) NAND or X-OR gate (c)
(2) NOR or X-OR gate (d)
(3) NOR or X-NOR gate (A) Output a (B) Output b
(4) NAND or X-NOR gate (C) Output c (D) Output d
(A) 1 and 2 (B) 2 and 3
13. The consensus theorem states that
(C) 3 and 4 (D) 4 and 1
(A) A + AB = A + B
7. If the functions w, x, y, and z are as follows.
(B) A + AB = A
w = R + PQ + RS (C) AB + AC + BC = AB + AC
x = PQRS + PQ RS + PQ RS (D) ( A + B)⋅ ( A + B ) = A
y = RS + PR + PQ + P ⋅ Q 14. The dual form of expression
z = R + S + PQ + P ⋅ Q ⋅ R + P ⋅ Q ⋅ S AB + AC + BC = AB + AC is
1.30 | Unit 1 • Digital Logic

(A) ( A + B) ( A + C ) ( B + C ) = ( A + B) ( A + C ) (C) logic 0 voltage level is lower than logic 1 voltage

level.
(B) ( A + B) ( A + C ) ( B + C ) = ( A + B ) ( A + C ) (D) logic 0 voltage level is higher than logic 1 voltage
(C) ( A + B ) ( A + C ) ( B + C ) = ( A + B ) ( A + C ) level.
(D) AB + AC + BC = AB + AC 21. If the input to a gate is eight in number, then its truth
15. The max term corresponding to decimal 12 is table contains _______ input words.
(A) 128 (B) 8
(A) A + B + C + D (B) A + B + C + D
(C) 64 (D) 256
(C) ABCD (D) ABC D 22. The X-OR gate implementation using NAND gate is
16. The given circuit is equivalent to (A) A
A
B
Y
B

C Output

(B) A
D
b Y

(A) (A + C) (B + D) (B) AC + BD B
(C) (A + D) (B + C) (D) ( A + B ) (C + D ) (C) A
17. Minimized expression for Karnaugh map is
AB Y
C 00 01 11 10 B

0 1 1
(D) A
1 1 1

(A) AB + C (B) AB + C Y
B
(C) B (D) B + C
18. An XOR gate will act as ________ when one of its input
23. The equivalent of AND–OR logic circuit is
is one and as ________ when one of its input is zero.
(A) NAND–NOR (B) NOR–AND
(A) buffer, buffer (B) buffer, inverter
(C) NAND–NAND (D) NAND–OR
(C) inverter, buffer (D) inverter, inverter
24. The X-OR is equivalent to
19. The minimum number of two input NAND gates
required to implement A ⊙ B if only A and B are (A) (B)
available
(A) 6 (B) 3
(C) 5 (D) 4 (C) (D)
20. Negative logic in a logic circuit is one in which
(A) logic 0 and 1 are represented by GND and positive
25. Simplify ABC + B + BD + ABD + AC
voltage respectively.
(B) logic 0 and 1 are represented by negative and posi- (A) B (B) B + C
tive voltage. (C) C + A (D) A + B
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.31

Previous Years’ Questions

1. Let f ( w , x, y, z ) = ∑(0, 4, 5, 7, 8, 9, 13, 15) . Which 5. If P, Q, R are Boolean variables, then
of the following expressions are NOT equivalent ( P + Q )( P ⋅ Q + P ⋅ R)( P ⋅ R + Q ) simplifies to [2008]
to f ? [2007]
(P) x′y′z′ + w′xy′ + wy′z + xz (A) P ⋅Q (B) P ⋅ R
(Q) w′y′z′ + wx′y′ + xz
(C) P ⋅Q + R (D) P ⋅ R + Q
(R) w′y′z′ + wx′y′ + xyz + xy′z
(S) x′y′z′ + wx′y′ + w′y
6. What is the minimum number of gates required to
(A) P only (B) Q and S
implement the Boolean function (AB + C), if we have
(C) R and S (D) S only
to use only two-input NOR gates? [2009]
2. Define the connective * for the Boolean variables X (A) 2 (B) 3
and Y as: X * Y = XY + X ′ Y ′. Let Z = X * Y. Consider (C) 4 (D) 5
the following expressions P, Q and R. [2007]
P : X = Y * Z Q:Y=X*Z 7. The binary operation ÿ is defined as follows [2009]
R: X * Y * Z = 1 P Q PÿQ
Which of the following is TRUE?
T T T
(A) Only P and Q are valid.
T F T
(B) Only Q and R are valid.
(C) Only P and R are valid. F T F
(D) All P, Q, R are valid. F F T

3. In the Karnaugh map shown below, × denotes a don’t- Which one of the following is equivalent to PÚQ?
care term. What is the minimal form of the function (A) ¬Qÿ¬P (B) Pÿ¬Q
represented by the Karnaugh map? [2008] (C) ¬PÿQ (D) ¬Pÿ¬Q
ab 8. The min term expansion of f(P, Q, Q) = PQ +
cd 00 01 11 10 QR + PR is [2010]
00 1 1 1
(A) m2 + m4 + m6 + m7
01 × 1
(B) m0 + m1 + m3 + m5
11 ×
(C) m0 + m1 + m 6+ m7
10 1 1 ×
(D) m2 + m3 + m4 + m5
(A) b ⋅ d + a ⋅ d 9. What is the Boolean expression for the output f of
(B) a ⋅ b + b ⋅ d + a ⋅ b ⋅ d the combinational logic circuit of NOR gates given
below? [2010]
(C) b ⋅ d + a ⋅ b ⋅ d
P
(D) a ⋅ b + b ⋅ d + a ⋅ d Q
4. Given f1, f3 and f in canonical sum of products form
(in decimal) for the circuit [2008]
Q
f1 R
f2 f
f

P
f3 R

f1 = Sm(4, 5, 6, 7, 8)
f3 = Sm(1, 6, 15) Q
R
f = Sm(1, 6, 8, 15)
then f2 is
(A) Q + R (B) P + Q
(A) Sm(4, 6) (B) Sm(4, 8)
(C) Sm(6, 8) (D) Sm(4, 6, 8) (C) P + R (D) P + Q + R
1.32 | Unit 1 • Digital Logic

10. The simplified SOP (Sum of Product) form of the 16. The dual of a Boolean function f(x1, x2, … xn, +, .,‘),
Boolean expression.  [2011] written as FD, is the same expression as that of F with
(P + Q + R) ( P + Q + R) ( P + Q + R) is + and . swapped. F is said to be self-dual if F = FD.
The number of self-dual functions with n Boolean
(A) ( PQ + R) (B) ( P + Q R) variables is  [2014]
(A) 2n (B) 2n-1
(C) ( PQ + R) (D) (PQ + R) n n−1
(C) 22 (D) 22
11. Which one of the following circuits is NOT equiva- 17. Consider the following min term expression for F:
lent to a two-input X-NOR (exclusive NOR) gate?
 [2011] F(P, Q, R, S) = Sm(0, 2, 5, 7, 8, 10, 13, 15)
(A) The min terms 2, 7, 8 and 13 are ‘don’t-care terms.
The minimal sum of products form for F is [2014]

(B) (A) QS + QS
(B) Q S + QS
(C) (C) Q R S + Q R S + Q R S + QRS
(D) P Q S + P QS + PQS + PQ S
18. The binary operator ≠ is defined by the following
(D) truth table
p q p≠q
0 0 0
12. The truth table  [2012] 0 1 1
X Y F(X, Y) 1 0 1
1 1 0
0 0 0
0 1 0
Which one of the following is true about the binary
1 0 1 operator ≠? [2015]
1 1 1 (A) Both commutative and associative
(B) Commutative but not associative
represents the Boolean function
(C) Not commutative but associative
(A) X (B) X + Y
(D) Neither commutative nor associative
(C) X ⊕ Y (D) Y
13. What is the minimal form of the Karnaugh map shown 19. Consider the operations [2015]
below? Assume that × denotes a don’t-care term.[2012] f(X, Y, Z) = X 1 YZ + XY 1 + Y 1Z 1 and
ab g(X, Y, Z) = X 1 YZ + X 1 YZ 1 + XY.
cd 00 01 11 10
Which one of the following is correct?
00 1 × × 1
(A) Both {f } and {g} are functionally complete
01 × 1
(B) Only {f } is functionally complete
11 (C) Only {g} is functionally complete
10 1 × (D) Neither {f } nor {g} is functionally complete
20. The number of min-terms after minimizing the fol-
(A) bd (B) bd + bc
lowing Boolean expression is _______ [2015]
(C) bd + abcd (D) bd + bc + cd [D1 + AB1 + A1C + AC 1 D + A1C 1D]1
14. Which one of the following expressions does not rep- 21. Let # be a binary operator defined as  [2015]
resent exclusive NOR of x and y? [2013] X # Y = X + Y where X and Y are Boolean variables.
1 1

(A) xy + x′y′ (B) x ⊕ y′ Consider the following two statements.

(C) x′ ⊕ y (D) x′ ⊕ y′
(S1) (P # Q) # R = P # (Q # R)
15. Consider the following Boolean expression for F:
(S2) Q # R = R # Q
F ( P , Q, R, S ) = PQ + PQR + PQRS
Which of the following is/are true for the Boolean
The minimal sum of products form of F is  [2014] variables P, Q and R?
(A) PQ + QR + QS (B) P + Q + R + S (A) Only S1 is true
(C) P + Q + R + S (D) PR + P R S + P (B) Only S2 is true
 Chapter 2 • Boolean Algebra and Minimization of Functions | 1.33

(C) Both S1 and S2 are true Assume for all inputs (a, b, c, d), the respective com-
(D) Neither S1 nor S2 are true plements (a , b, c , d ) are also available. The above
22. Given the function F = P 1 + QR, where F is a function logic is implemented using 2-input NOR gates only.
in three Boolean variables P, Q and R and P 1 = !P, The minimum number of gates required is ________.
consider the following statements. [2015]  [2017]
(S1) F = Σ(4, 5, 6) 26. If w, x, y, z are Boolean variables, then which one of
the following is INCORRECT? [2017]
(S2) F = Σ(0, 1, 2, 3, 7)
(A) wx + w(x + y) + x(x + y) = x + wy
(S3) F = p(4, 5, 6)
(B) w x ( y + z ) + w x = w + x + yz
(S4) F = p(0, 1, 2, 3, 7)
Which of the following is true?
(C) (w x ( y + x z ) + w x ) y = x y
(A) (S1) – False, (S2) – True, (S3) – True, (S4) - False (D) (w + y) (wxy + wyz) = wxy + wyz
(B) (S1) – True, (S2) – False, (S3) – False, (S4) - True 27. Given f(w, x, y, z) = ∑m(0,l,2,3,7,8,10) + ∑d(5,6,ll,15),
(C) (S1) – False, (S2) – False, (S3) – True, (S4) - True where d represents the don’t-care condition in
(D) (S1) – True, (S2) – True, (S3) – False, (S4) - False Karnaugh maps. Which of the following is a mini-
mum product-of-sums (POS) form of f(w, x, y, z)?
23. The total number of prime implicants of the function  [2017]
f(w, x, y, z) = Σ(0, 2, 4, 5, 6, 10) is ______ [2015]
(A) f = ( w + z )( x + z )
24. Consider the Boolean operator # with the following (B) f = ( w + z )( x + z )
properties: [2016]
x # 0 = x, x # 1 = × , x # x = 0 and (C) f = ( w + z )( x + z )
x # × = 1. Then x # y is equivalent to (D) f = ( w + z )( x + z )
(A) x y + × y (B) x y + × y 28. Let ⊕ and ⊙ denote the Exclusive OR and Exclusive
(C) × y + x y (D) x y + × y NOR operations, respectively. Which one of the fol-
25. Consider the Karnaugh map given below, where X lowing is NOT CORRECT? [2018]
represents “don’t care” and blank represents 0. (A) P ⊕ Q = P  Q
(B) P ⊕ Q = P  Q
ba
00 01 11 10 (C) P ⊕ Q = P ⊕ Q
dc
(D) ( P ⊕ P ) ⊕ Q = ( P  P )  Q
00
X X
29. Consider the minterm list form of a Boolean function
01 1 X
F given below.
F(P, Q, R, S) = ∑ m(0, 2, 5, 7, 9, 11)
11 1 1 + d (3, 8, 10, 12, 14)
Here, m denotes a minterm and d denotes a don’t care
X X
10 term. The number of essential prime implicants of the
function F is ______. [2018]
1.34 | Unit 1 • Digital Logic

Answer Keys

Exercises
Practice Problems 1
1. B 2. D 3. B 4. C 5. A 6. A 7. B 8. A 9. B 10. A
11. C 12. D 13. A 14. A 15. A 16. A 17. D 18. B 19. A 20. D
21. D 22. C 23. A 24. C 25. D

Practice Problems 2
1. D 2. D 3. D 4. C 5. A 6. C 7. B 8. D 9. A 10. C
11. A 12. D 13. A 14. A 15. A 16. C 17. C 18. C 19. C 20. D
21. D 22. C 23. C 24. B 25. B

Previous Years’ Questions

1. D 2. D 3. A 4. C 5. A 6. B 7. B 8. A 9. A 10. B
11. D 12. A 13. B 14. D 15. A 16. D 17. B 18. A 19. B 20. 1
21. B 22. A 23. 3 24. A 25. 1 26. C 27. A 28. D 29. 3