Unit 4 Bipolar Junction Transistor Biasing

UNIT 4
The picture above shows a stereo

BIPOLAR JUNCTION
audio amplifier's power transistors
mounted on heat sinks.
Source: https://en.wikipedia.org/

TRANSISTOR
Picture credit: Daniel Christensen

BIASING

Structure
4.1 Introduction 4.4 Transistor Biasing Methods
Expected Learning Outcomes 4.5 Summary
4.2 CB, CE, CC Configurations of a BJT 4.6 Terminal Questions
4.3 Common Emitter Configuration 4.7 Solutions and Answers
Transistor Characteristics
DC Alpha (  dc ) and DC Beta (dc )
Load Line and Quiescent Operating Point

STUDY GUIDE
In this unit, you will learn about the biasing methods of a bipolar junction transistor, which you have
learnt in your senior secondary (+2) physics. Essentially, it will be revisiting familiar concepts. But it will
help if you revise Sec. 3.2 of Unit 3 before studying this unit. Once again, we advise you to study all
sections of this unit thoroughly. Make a note of any concept that you do not understand so that you may
ask us or the Counsellor. Solving the SAQs and Terminal Questions given in the unit will help you in
reviewing your understanding of concepts better.

“Nothing in life is to be feared, it is only to be understood.

Now is the time to understand more, so that we may fear Marie Curie
less.”

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Block 1 Physics of Semiconductor Devices
4.1 INTRODUCTION
In Unit 3, you have learnt about the physics underlying the working of a bipolar
junction transistor. You know about two of its major applications: as an
amplifier and as a switch. In this unit, you will learn about how a BJT is biased
for its operation so that it can be used for both these applications.

We begin the unit by explaining various configurations of the BJT in Sec. 4.2.
You know that there are three terminals in a BJT and one of these has to be
common in any given circuit having a BJT. So, you will learn about three
configurations: Common base, common emitter and common collector.

We will then focus on the common emitter configuration in Sec. 4.3. We will
discuss the input-output characteristics of the transistor, the parameters dc
alpha and dc beta (current gain), the load line and quiescent operating
point. Finally, in Sec. 4.4, we will discuss the transistor biasing methods.

In the next unit, you will learn about transistor circuit analysis.

Expected Learning Outcomes

After studying this unit, you should be able to:

❖ describe the common base (CB), common emitter (CE) and common
collector (CC) configurations, and draw the corresponding circuits;

❖ draw and explain the features of input-output characteristics of a BJT in

CE configuration;

❖ draw the load line and show the quiescent operating point on the output
characteristics of a BJT in CE configuration and explain their function in
its operation; and

❖ explain the transistor biasing methods with appropriate circuit diagrams.

4.2 CB, CE, CC CONFIGURATIONS OF A BJT

In Unit 3, you have learnt that the bipolar junction transistor is a three-terminal
device and its terminals are called emitter, base and collector. However, a
+ + network usually has two ports (input and output) as shown in Fig. 4.1. Hence,
Port 1 Two port Port 2 we require four terminals to represent any device. But since a transistor has
network
only three terminals, we need to use one of these as a common terminal for
the input and output sides. The common terminal is usually the terminal at
Fig. 4.1: A two-port ground potential or the closest to the ground potential. There are three
network has two ports, possible configurations in a transistor in which one of the three terminals is
i.e., four terminals.
common to both input and output ports. These are:

1. Common base configuration: When the base terminal of the transistor is

common to input and output circuits.

2. Common emitter configuration: When the emitter terminal of the

transistor is common to input and output circuits.
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Unit 4 Bipolar Junction Transistor Biasing
3. Common collector configuration: When the collector terminal of the
transistor is common to input and output circuits.

In this section, you will learn about these three configurations and how a BJT
is biased in all these.

Common Base Configuration

Recall Sec. 3.2 of Unit 3, in which you have learnt about one way of biasing a
BJT. Fig. 3.4 actually shows the BJT in a common base configuration. That
particular arrangement is called the common base configuration because
the base terminal is common to both the input and output circuits of the BJT.
We show the configuration again for both n-p-n and p-n-p transistors in
Fig. 4.2. Note that this configuration has low input resistance and high output
resistance as explained in Sec. 3.2 of Unit 3.
E B C
IE IC
n p n

VEE VCC
IB

(a)

E B C
IE IC
p n p

VEE VCC
IB

(a)

Fig. 4.2: Common base configuration for a) an n-p-n transistor; b) a p-n-p transistor.

Usually, we draw the configuration showing the transistor symbol. Note that in
both Figs. 4.2a and b, VEE and VCC are the applied biasing voltages that
establish currents in the directions shown in the common base configuration
for the n-p-n and p-n-p transistors. By convention, these are defined to be
opposite to the flow of electrons or in the direction of flow of holes. You must
note the directions of the emitter and collector currents IE and IC , vis-à-vis
the polarities of the biasing voltages VEE and VCC , respectively, in both types
of transistors. So, in both cases, we have:

IE = IB + IC (4.1a)

Since IB  IC , we can write:

IE  IC (4.1b)

The transistor symbols you have learnt in Unit 3 are arrived at for the common
base configuration. You should practice drawing the circuits shown in
Figs. 4.2a and b with the transistor symbols and the directions of emitter, base
and collector currents for both n-p-n and p-n-p transistors. Try SAQ 1.
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Block 1 Physics of Semiconductor Devices

SAQ 1 - Common base configuration

Redraw Figs. 4.2a and b using the transistor symbols for n-p-n and p-n-p
transistors.

We now illustrate the common emitter and common collector configurations

using transistor symbols.

Common Emitter Configuration

The common emitter configuration is the most widely used configuration in

transistor applications. It is shown in Fig. 4.3 for an n-p-n transistor. Note from
Fig. 4.3 that in this configuration, the emitter terminal is common to both
input and output circuits. Therefore, in this case, the input terminals are the
base and emitter terminals, and the output terminals are the emitter and
collector terminals. The base-emitter circuit is the input circuit and the
collector-emitter circuit is the output circuit in this configuration.

IC
RL VO
C
RB B
VCE
IB VCC
E
VBE
VBB IE

Fig. 4.3: An n-p-n transistor in common emitter configuration.

Note that the base, emitter and collector currents are shown in Fig. 4.3 with
their directions as per the sign convention explained in Unit 3.

Note also that in the input circuit in the common emitter configuration, the
applied voltage VBB forward biases the emitter-base junction and the role of
the resistance RB is to limit the current in the input circuit. We can change the
base current IB by changing RB or VBB . When we change the base current,
the collector current also changes as you have learnt in Sec. 3.2 of Unit 3.
And a small base current controls a large collector current.

Now pay attention to the output circuit. Note that the applied voltage VCC
reverse biases the collector-base junction and again the current in the circuit
is limited by the load resistance RL . For proper operation of the transistor as
explained in Unit 3, the applied voltage VCC must reverse bias the
collector-base junction.

The voltage VBE represents the voltage between the base and emitter and
the voltage VCE represents the voltage between the collector and emitter. The
voltage drop across the load resistance is the output voltage VO . Remember
that a double subscript notation has been used in the circuits of
88 Figs. 4.2a, b and 4.3. These notations are used in transistor circuits.
Unit 4 Bipolar Junction Transistor Biasing
We use the same subscripts to represent source voltages. For example, in
Fig. 4.3, VBB is the base voltage source and VCC , the collector voltage
source.

We use different subscripts when the voltages are between two points,
for example, VBE and VCE . So, the voltage between the base and the emitter
is denoted by VBE and the voltage between the collector and the emitter by
VCE .

You should remember that the common emitter configuration also has low
input resistance and high output resistance as explained in Sec. 3.2 of Unit 3.

You may now like to work out SAQ 2 to check if you have learnt the common
emitter configuration well.

SAQ 2 - Common emitter configuration

Draw a diagram showing a p-n-p transistor in the common emitter

configuration.

We now give a brief description of the common collector configuration.

Common Collector Configuration

When collector is common to the input and output circuits, we get the common
collector configuration. The common collector configuration is used in
applications that require impedance matching since it has high input
impedance and low output impedance unlike the input and output resistances
in the common base and common emitter configurations. Fig. 4.4 shows the
common collector configuration for an n-p-n transistor.

IC
C
RB B
IB VCC
E
VBE
VBB IE RL VO

Fig. 4.4: An n-p-n transistor in common collector configuration.

Fig. 4.4 may look similar to Fig. 4.3 but actually it is not. You should note from
Fig. 4.4 that the collector is at ground potential and the load resistor is
connected between the emitter and ground.

For common collector configuration, the input voltage and current are VCB
and IB , and the output voltage and current are VCE and IE .

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Block 1 Physics of Semiconductor Devices
You may like to pause for a while and revise what you have learnt about the
common collector configuration. Attempt SAQ 3.

SAQ 3 - Common collector configuration

Draw the circuit showing common collector configuration for a

p-n-p transistor.

Let us now discuss the common emitter configuration in some detail.

4.3 COMMON EMITTER CONFIGURATION

In this section, we will discuss the operation of a transistor in common emitter

configuration. We will first draw the input and output characteristics for the
transistor and explain them. Then we will define the parameters dc alpha and
dc beta (current gain). Finally, we discuss the concepts of load line and
quiescent operating point, which are important for the operation of a transistor.

4.3.1 Transistor Characteristics

We can plot three different I-V characteristics for each of the three
configurations (CB, CE and CC) depending on the quantities involved: input,
output and transfer characteristics.

However, we will be focusing on the CE configuration here. The currents and

voltages involved in each of the three types of characteristics for the CE
configuration are given in Table 4.1.

Table 4.1: Currents and voltages involved in different I-V characteristics

of a BJT in common emitter (CE) configuration

Input characteristic Output characteristic Transfer characteristic

IB versus VBE IC versus VCE IC versus IB

for different values for different values of for different values of

of VCE IB VCE

Of these, we will discuss the following two I-V characteristics in this section:

a) Input characteristics; and

b) Output characteristics.

Let us explain each of these characteristics for a bipolar junction transistor in

the CE configuration.

Input characteristics

The input characteristics corresponding to the input circuit are a plot of the
input current (the base current IB on the y-axis) and the input voltage (base-
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Unit 4 Bipolar Junction Transistor Biasing
emitter voltage VBE on the x-axis) for different values of the output voltage
(collector-emitter voltage VCE ). The circuit to obtain this curve is the same I B (A) VCE = 0
as shown in Fig. 4.3. Fig. 4.5 shows the input characteristics for a few values
of the collector-emitter voltage.
VCE1  0 V
Note that the base current is in microamperes. Does this curve not look
familiar to you? Recall the I-V characteristics of a forward biased p-n junction
diode from Unit 2. The curve in Fig. 4.5 resembles those characteristics since
VCE 2  VCE1
the base-emitter junction is forward biased in a transistor. So, the base current
flows only when the base-emitter voltage is equal to or greater than the knee VBE (V)
voltage, which is 0.3 V for Ge transistor and 0.7 V for a silicon transistor. Fig. 4.5: Input
characteristics of a BJT
Output characteristics in common emitter
configuration.
The output characteristics of the BJT in CE configuration are shown in
Fig. 4.6. Note that this is a plot of the output current (the collector current IC
on the y-axis) and the output voltage (collector-emitter voltage VCE on the
x-axis) for different values of the input current (base current IB ). For
example, suppose we change VBB to get a base current IB = 30  A. For this
fixed value of base current, we now vary VCC in the circuit like the one shown
in Fig. 4.5. Then we plot IC for different values of VCE to obtain a graph like
the one shown in Fig. 4.6 for IB = 30  A. You must remember that these
curves are for a specific transistor. For other transistors, the values of IC may
be different for VCE but the shape of the curves will be similar.

IC (mA)
50 A

70 40 A

60
Saturation 30 A
region 50
20 A
40
Active region
10 A
30

20 5 A

10 IB = 0  A

0 VCE (V)
1 2 3 4 5 6
VCE(sat) Cut-off region
Fig. 4.6: Output characteristics of a BJT in common emitter configuration.

You should note from Fig. 4.6 that the base current is in microamperes, and
the collector current is in milliamperes. Pay attention to the three regions
marked on the output characteristics:
• Active Region
• Saturation Region
• Cut-off Region
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Block 1 Physics of Semiconductor Devices
All transistor output characteristics have an active region, a saturation region,
and a cut-off region. We now discuss each of thee three regions.

Active Region

Note from Fig. 4.6 that the active region of the output characteristic curve is
the region to the right of VCE = a few tenths of a volt and above the curve for
IB = 0. Always remember that

The transistor operates in the active region when the

base junction is forward biased and collector junction is reverse
biased.

The transistor output current IC responds most sensitively to the input signal
in the active region. When VCE increases from zero to a few-tenths of a volt,
the collector current rises sharply in Fig. 4.6. When VCE is above a few-tenths
of a volt, the collector current becomes almost constant. Note that each
collector current is manifold greater than the corresponding base current. In
different transistors, this ratio is different. The active region is the most
important because amplification of signals is possible in the active region.

The active region is called the linear region because changes in the input
signal produce proportional changes in the output signal. This means that the
distortion in the output signal is low or negligible. Therefore, the transistor
has to operate in the active region when it is to be used as a voltage,
current or power amplifier. This means that the input, output voltages and
input currents must be restricted to the values corresponding to the active
region in the output characteristics.

Saturation Region
The saturation region in the output characteristics is the early sloping part
of the characteristic curve, where VCE is less than a few-tenths of a volt. In
this region, the collector diode has insufficient positive voltage to collect all the
free electrons injected into the base. Therefore, in this region, the base current
is larger than normal. Remember that

The transistor operates in the saturation region when both base-emitter

and collector-emitter junction are forward biased by at least the knee
voltage.
.
So, in the saturation region, VCE is a small negative voltage. Note from
Fig. 4.6 that the saturation region is very close to the zero-voltage axis, where
all the curves merge and fall rapidly toward the origin. When the collector-
emitter diode is forward biased, there is an exponential increase in the
collector current for small changes in collector-emitter voltage, as VCE is
increased to the value 0 V. You should note from Fig. 4.6 that the onset of
92
Unit 4 Bipolar Junction Transistor Biasing
saturation takes place at the knee of the curves corresponding to different
values of the base current.

Cut-off Region
The cut-off region in the output characteristics is the region below IB = 0.
You must remember that

The transistor operates in the cut-off region when both the emitter and
collector junctions are reverse biased.
.
Note
. from Fig. 4.6 that even when the base current is zero, a small collector
current still flows in the output circuit. This current is usually of the order of
nanoamperes and cannot be seen in these curves. The region below IB = 0
has been drawn larger than usual in Fig. 4.6 so that you may see it. This
extremely small collector current is called collector cut-off current and
denoted by ICEO . Thus, remember that

The cut-off current for the common emitter configuration is the collector
current IC = ICEO defined by the condition IB = 0.

You may well ask: Why is there a finite, even if small, collector current in the
cut-off region? This current is due to the minority charge carriers in the
reverse biased collector junction. It is also due to surface leakage current
which does not flow through the junction. Rather it flows around the junction
and across the transistor surfaces. It is proportional to the voltage across the
junction.

However, in a well- designed circuit, the collector cut-off current is small

enough to ignore. So, while designing a transistor amplifier, we should take
care that it does not operate in cut-off region (below IB = 0) so that the output
signal is undistorted.

When a transistor has to be operated as a switch, for example, in logic circuits

in a computer, it has two points of operation: one in the saturation region and
one in the cut-off region. This is because in the saturation region, the
transistor allows current to flow and in the cut-off region, the current in the
circuit is extremely small. Ideally, we must have IC = 0 in the cut-off region for
switching applications. But practically, since ICEO is very small, cut-off does
exist for switching purposes when IB = 0 or IC = ICEO .

Next, we define current gains in a BJT. Before that you should solve SAQ 4 to
fix the ideas of this section in your mind.

SAQ 4 - BJT in CE configuration

Write the relevant currents and voltages for the a) input and b) output
characteristics of a BJT in CE configuration. What are the values of VCE and
I B in the saturation and cut-off regions of the output characteristics?
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Block 1 Physics of Semiconductor Devices
4.3.2 DC Alpha ( dc ) and DC beta ( dc )

In this section, we will define the parameters dc alpha dc and dc beta dc
for the transistor in common emitter configuration.

By definition, the dc alpha is the ratio of the dc collector current to the dc

emitter current:

IC
 dc = (4.2a)
IE

Recall from Eq. (3.1a) of Unit 3 that the collector current is almost equal to the
emitter current. Therefore, the value dc is slightly less than 1. For example, ,
the typical value of dc is more than 0.99 for a low power transistor. It is more
than 0.95 even for high-power transistors.

By definition, the dc beta is the ratio of the dc collector current to the dc

base current:
IC
dc = (4.2b)
IB

dc is also referred to as the current gain. This is because a small base
current controls a much larger collector current.

Current gain dc typically ranges from 100 to 300 for low power transistors
(operating at powers less than 1 W). For transistors operating at powers more
than 1 W, that is, high power transistors, dc lies usually between 20 and
100. The current gain is a useful parameter for transistor applications as
amplifiers.

An important point to note about the dc current gain of a transistor is that it

depends on three parameters: the transistor itself, the collector current, and
the temperature. For example, a different transistor will usually have a
different dc current gain. Also, the dc current gain changes if the collector
current or temperature changes. The range of variation in dc can be large
and affects the design of a transistor amplifier.

From the definitions of dc and dc , we can establish a relation between
them using Eq. (4.1a) as follows:
IC IC
 dc = =
IE IC + I B

or IC =  dc (IC + IB )

 dc
or IC = I
1 −  dc B

IC  dc
or  dc = = (4.3a)
IB 1 −  dc

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Unit 4 Bipolar Junction Transistor Biasing
From Eq. (4.3a), we get

dc
 dc = (4.3b)
1 + dc

You may like to calculate the dc alpha and dc beta for a given transistor. Solve
SAQ 5.

SAQ 5 - DC alpha and dc beta for a transistor

a) A transistor has a dc current gain of 200. If the base current is 10 A,

calculate the value of the collector current. What is the value of dc
alpha?

b) Calculate the dc alpha and dc beta given that IC = 1.0 mA and

IB = 2.5  A .

Lastly, in this section, we discuss two important concepts used in transistor

amplifiers, namely, the load line and the quiescent operating point.

4.3.3 Load Line and Quiescent Operating Point

You have learnt in the previous section that the transistor should operate in
the active region for its application as an amplifier. We now discuss the
parameters that are important in this respect.

Refer to Fig. 4.7, which is Fig. 4.3 repeated here for ready reference.

IC
RL VO
C
RB B
VCE
IB VCC
E
VBE
VBB IE

Fig. 4.7: An n-p-n transistor in common emitter configuration.

Let us apply Kirchhoff’s voltage law to the output circuit in Fig. 4.7. We get:

VCE = VCC − IC RL (4.4a)

We can rewrite Eq. (4.4a) as:

VCC − VCE
IC = (4.4b)
RL

Note that Eq. (4.4b) is a straight line between the variables IC and VCE with
1 V
slope ( − ) and intercept CC .
RL RL
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Block 1 Physics of Semiconductor Devices
Also note that there is no signal applied in the input circuit and the voltages
applied in both input and output circuits are dc voltages.

Fig. 4.8a shows the plot of the straight line given by Eq. (4.4b) on the output
characteristic curve of the transistor in CE configuration. Note that from
Eq. (4.4a), we can specify two points on the straight line as follows:

VCC
IC = for VCE = 0,
RL

and VCE = VCC for IC = 0

When we join these two points on the output characteristics, we get the
straight line given by Eq. (4.4a or b) superimposed on the curve. This line is
called the load line (see Fig. 4.8a). It is called the load line because it is
defined by the value of the load resistance in the output circuit. You have seen
that the slope of the load line is determined by the value of the load
resistance.

IC IC

VCC VCC
RC RC
Load line Q point 3 IB 3
IBQ
Q point Q point 2 IB 2

Q point 1
IB1

VCC VCE VCC VCE

(a) (b)

Fig. 4.8: a) Load line and Q point; b) shifting of the Q point.

You may like to know: Why is the load line important in transistor
amplifiers? It is because the load line defines the operating conditions for the
transistor in the active region for a given load resistance. You will understand
this point better when we discuss the operating point. Let us do that now.

The operating point of a transistor in CE configuration is defined by the

output voltage VCE , output current IC and input current IB , for no input signal.
It is also called the quiescent point or the Q point. Quiescent means quiet,
resting, inactive or still.

For amplification of a small signal applied to the input circuit, the operating
point is usually set up in the middle of the load line. It is shown in Figs. 4.8a
and b.

Let us take an example showing a typical calculation for determining the

operating point.

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Unit 4 Bipolar Junction Transistor Biasing

XAMPLE 4.1 : DETERMINING Q POINT

Determine the Q point for a BJT in CE configuration given that VCC = 15 V,
dc = 100, IB = 20  A and RL = 5.0 .

SOLUTION ◼ We use Eqs. (4.2b and 4.4a) for the calculations.

From Eq. (4.2b), IC = dc  IB = 100 2 0 A = 2 mA

The voltage drop across RL is:

IC RL = 2 mA  5.0  = 10 V

Thus, from Eq. (4.4a),

VCE = 15 V − 10 V = 5 V

The values VCE = 5 V, IC = 2 mA for IB = 20  A specify the Q point on

the load line.

From the calculations given in Example 4.1, you would appreciate that the
operating point depends on the dc current gain of the transistor, and is very
sensitive to changes in it. For example, if the dc current gain were to change
by a factor of even 2 or 3, the values of VCE and IC for a given IB could be
such that the Q point moved to the saturation region or cut-off. Then the
transistor would not work as an amplifier. You will appreciate this point better
when you study transistor amplifiers in the next block.

You may like to check if you have grasped these concepts well. Solve SAQ 6.

SAQ 6 - Load line and operating point

Determine the operating point for a transistor in CE configuration for

(i) VCC = 30 V and IB = 30 A
(ii) VCC = 10 V and IB = 10 A

given that RL = 5.0 k  and dc = 100.

So, now the question before us is: How is the transistor to be biased so that
we get the desired load line and operating point for its applications? You will
learn about various transistor biasing methods in Sec. 4.4.

4.4 TRANSISTOR BIASING METHODS

For optimum performance of the transistor, we need to apply appropriate
external voltages of correct polarity in its input and output circuits. You have
learnt in Sec. 4.3 that the operation of a transistor depends on its base
current, collector current and input and output voltages. Thus, you must
always remember that 97
Block 1 Physics of Semiconductor Devices

Transistor biasing is the process of applying appropriate dc voltages

to a transistor.

The voltages applied should be such that the transistor functions as a linear
device even when a small change occurs in the applied voltage. You
have learnt in Sec. 4.3.3 that the operating voltages and currents in the output
and input circuits define the operating point or “quiescent” (Q) point of the
transistor.

As you know, the Q point for a transistor in common emitter configuration is

specified by the collector-emitter voltage VCE and the collector current IC .
You should note that for the transistor to operate linearly, the transistor
biasing should be such that the Q point remains stable. Also, the Q point
should not change with changes in current gain.

We describe briefly three biasing methods for transistors in this section: Fixed
bias, self-bias and universal bias for the common emitter configuration.

Fixed bias

Fixed bias is also called the base bias and in this kind of biasing, the base
current (IB ) in the transistor is kept constant for given values of VCC . This
is done by connecting a constant resistor RB having high resistance in the
input circuit (see Fig. 4.9). By selecting a proper value of RB , we can set the
desired values of the base current and the collector current in the input and
output circuits.

However, usually the fixed bias method using a single resistor is not used to
bias a transistor for linear operation. This is because the biasing voltages and
currents do not remain stable during transistor operation and the Q point is
unstable.
RC

IC
C
RB B
+
VCC
+ E
VBB

Fig. 4.9: Fixed bias for an n-p-n transistor in common emitter configuration.

Self-bias

In the self-bias method, also called the collector feedback, the base
resistor is connected to the collector rather than the supply voltage as
shown in Fig. 4.10. In this case, if dc increases due to some reason such as
variation in temperature, say, then IC will increase. This will result in larger
voltage drop across RC. Hence, the collector voltage will reduce. In effect, IC
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Unit 4 Bipolar Junction Transistor Biasing
will reduce, correcting the increase caused by variation in dc . This type of
biasing is somewhat more effective in improving the stability of the operating
point. However, the circuit is still sensitive to changes in biasing voltages and
the Q point is not that stable although it is better than a fixed bias circuit.
RC

RB
IC
C
IB
B
+
VCC
E

IE

Fig. 4.10: Self- bias for an n-p-n transistor in common emitter configuration.

Universal bias

Universal bias is the biasing method most widely used for linear operation of
the transistor (see Fig. 4.11). It is also known as the voltage divider circuit
because the resistances R1 and R2 in Fig. 4.11 form the voltage divider. In
this biasing method, only one battery or dc power source is required. It uses
four resistors and provides a stable operating point.

RC
R1 VC
VB +
VCC

VE
R2
RE

Fig. 4.11: Universal bias for an n-p-n transistor in common emitter configuration.

Note from Fig. 4.11 that the voltage across R2 forward biases the emitter
diode. In this biasing method, the Q point is independent of the dc beta gain.
Let us explain how. If the current gain (dc ) increases, the collector current
(IC ) increases. This results in an increase in the emitter current IE and,
hence, the voltage drop across RE increases. From the input circuit in Fig.
4.11, you can see that resistors R1 and R2 form a voltage divider across the
dc power supply VCC , and the current I1 through these resistors is usually
selected to be about one-tenth of the collector current. Since the base current
is small, the current through R2 can also be taken as ~ I1. So, the voltage
across R2 is

VCC R2
VR2 = I1 R2 = (4.5a)
R1 + R2 99
Block 1 Physics of Semiconductor Devices
Applying Kirchhoff’s law to the input circuit, we get:

VR2 = VBE + VRE = VBE + IE RE (4.5b)

An increase in IE RE results in a decrease in the base-emitter voltage VBE ,

and, therefore, the base current is reduced. The reduced base current results
in reduced collector current, which offsets the original increase in dc . We can
depict this process by the following equations:

IC  IE  (IE RE )  (4.6a)

Since VR2 = VBE + IE RE = constant , therefore,

VBE  IB  IC  (4.6b)

In Eqs. (4.6a and b), the arrow pointing upwards (indicated beside a physical
quantity) shows that the quantity is increasing and the arrow pointing
downwards shows that it is decreasing. Using Eq. (4.5a) in Eq. (4.5b) and the
fact that IC  IE , we can write:

VR2 = VBE + IC RE = constant (4.7)

Since the left-hand side of Eq. (4.7) is constant, a change in IC causes VBE to
change in a direction so as to bring IC back to its original value as depicted in
Eq. (4.6b). Thus, the Q point is kept stable in the universal bias. Let us
illustrate this with the help of an example.

XAMPLE 4.2 : Q POINT IN UNIVERSAL BIAS

Calculate the dc voltages (base voltage, emitter voltage, collector voltage
and collector to emitter voltage) and collector and emitter currents for the
universal bias circuit of Fig. 4.11 given that R1 = 40 k , R2 = 5.0 k ,
RC = 5.0 k , VCC = 12 V and RE = 1.0 k . Take VBE = 0.3 V for the
transistor used. Hence, locate the Q point.

SOLUTION ◼ We use Eqs. (4.5a and 4.7), with Kirchhoff’s law for these
calculations.
V R
The base voltage is given by: VB = VR2 = CC 2 (i)
R1 + R2

Substituting the values R1 = 40 k , R2 = 5.0 k  and VCC = 12 V in

Eq. (i), we get
12 V  5.0 k 
VB = = 1 .3 V
( 40 + 5.0) k 

 VE = VB − VBE = (1.3 − 0.3) V = 1.0 V

VE 1.0 V
and IE = = = 1.0 mA
RE 1. 0 k 

 IC  IE = 1.0 mA

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Unit 4 Bipolar Junction Transistor Biasing

Applying Kirchhoff’s law to the output circuit, we get the collector voltage:
VC = VCC − IC RC = 12.0 V − (1.0 mA  5.0 k ) = 7.0 V

Thus, the collector-emitter voltage is:

VCE = VC − VE = 6.0 V

Therefore, the Q point is located at (6.0 V, 1.0 mA) for this transistor.

We end this section with an SAQ for you.

SAQ 7 - Universal bias

For the circuit given in Fig. 4.11, state if the following quantities will increase
or decrease if R1 is increased by 50%?
a) VR2 will……….b) VRE will………… c) IC will…………d) VC will…………

With this discussion on transistor biasing methods, we end this unit. Let us
now summarise what you have learnt in this unit.

4.5 SUMMARY

Concept Description

CB, CE, CC ◼ There are three possible configurations in a transistor in which one of the
configurations of three terminals is common to both input and output ports:
a BJT
• Common base configuration: When the base terminal of the transistor
is common to input and output circuits.

• Common emitter configuration: When the emitter terminal of the

transistor is common to input and output circuits.

• Common collector configuration: When the collector terminal of the

transistor is common to input and output circuits.

Input and output ◼ In common emitter configuration of the BJT, the input characteristics are
characteristics in a plot of the input current (the base current IB on the y-axis) and the input
common emitter voltage (base-emitter voltage VBE on the x-axis) for different values of the
configuration output voltage (collector-emitter voltage VCE ). The output characteristics
are a plot of the output current (the collector current IC on the y-axis) and
the output voltage (collector-emitter voltage VCE on the x-axis) for different
values of the input current (base current IB ).

Active, saturation ◼ All transistors have an active region, a saturation region, and a cut-off
and cut-off regions region in the output characteristics:
in the output
characteristics • The active region of the output characteristic curve is the region to the
right of VCE = a few tenths of a volt and above the curve for IB = 0.
The transistor operates in the active region when the base junction
is forward biased and collector junction is reverse biased. 101
Block 1 Physics of Semiconductor Devices

• The transistor operates in the saturation region when both

base-emitter and collector-emitter junction are forward biased by
at least the knee voltage.
• The transistor operates in the cut-off region when both the emitter
and collector junctions are reverse biased. The cut-off current for
the common emitter configuration is the collector current IC = ICEO
defined by the condition IB = 0.

DC current gains ◼ The dc alpha is the ratio of the dc collector current to the dc emitter
for the transistor in current:
common emitter I
 dc = C
configuration IE

The dc beta is the ratio of the dc collector current to the dc base

current:
IC
dc =
IB

It is also referred to as the current gain because a small base current

controls a much larger collector current. The relations between dc alpha
and dc beta are given by:
IC  dc dc
dc = = and  dc =
IB 1 −  dc 1 + dc

Load line and Q ◼ The load line defines the operating conditions for the transistor in the active
point region for a given load resistance. The straight line on the output
characteristic curve of the transistor in CE configuration joining the
points
VCC
IC = for VCE = 0,
RL

and VCE = VCC for IC = 0

is the load line. Its slope is determined by the value of the load resistance
in the output circuit. The operating point or quiescent point (Q point) of
a transistor in CE configuration is defined by the output voltage VCE ,
output current IC and input current IB , for no input signal. For
amplification of a small signal applied to the input circuit, the operating
point is usually set up in the middle of the load line and it has to be stable.
Transistor biasing ◼ Appropriate external voltages of correct polarity need to be applied in the
methods input and output circuits of the transistor for optimum performance.
Transistor biasing is the process of applying appropriate dc voltages to a
transistor. Three biasing methods can be used:

• Fixed bias: In fixed bias, also called the base bias, the base current
(IB ) in the transistor is kept constant for given values of VCC . In the
fixed bias method, the biasing voltages and currents do not remain
stable during transistor operation and the Q point is unstable.
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 Unit 4 Bipolar Junction Transistor Biasing

• Self-bias: In the self-bias method, also called the collector feedback

bias, the base resistor is connected to the collector rather than the
supply voltage. This type of biasing improves the stability of the
operating point. However, the circuit is still sensitive to changes in
biasing voltages and the Q point is not that stable although it is better
than a fixed bias circuit.
• Universal bias: Universal bias is the most widely used biasing method
for linear operation of the transistor. It is also known as the voltage
divider circuit because two resistances form the voltage divider in the
base biasing circuit. In this biasing method, only one battery or dc
power source is required. It uses four resistors and provides a stable
operating point.

4.6 TERMINAL QUESTIONS

1. Using the characteristics of Fig. 4.6, determine the

a) collector current when the base current is 20 A and collector-emitter

voltage is 5 V;

b) the order of magnitude of the ratio of the collector current to base

current of 20 A when collector-emitter voltage is 3 V.

2. Determine the dc beta value for part a) of Terminal Question 1.

3. It is given that the current gain is 200, VCC is 20 V and the base current is
40 A for the CE configuration of a BJT. What is the value of the load
resistor?

4. Calculate the base voltage, emitter voltage, collector voltage, collector to

emitter voltage, and collector and emitter currents for the universal bias
circuit of Fig. 4.11 given that R1 = 45 k , R2 = 5.0 k ,
RC = 5.0 k , VCC = 15 V and RE = 1.0 k . Take VBE = 0.3 V and
hence, locate the Q point.

4.7 SOLUTIONS AND ANSWERS

Self-Assessment Questions

1. See Figs. 4.12a and b.

IE E C IC IE E C IC

+ +
VEE VCC VEE VCC
B B
+ IB IB +

(a) (b)

Fig. 4.12: a) An n-p-n transistor; b) a p-n-p transistor in common base configuration.

2. See Fig. 4.13. 103

Block 1 Physics of Semiconductor Devices

IIC
C RL VO
C
RB B
VCE
IB VCC
VBE E
VBB IE

Fig. 4.13: An p-n-p transistor in common emitter configuration.

3. See Fig. 4.14.

IC
C
RB B
IB VCC
E
VBE
VBB IE RL VO

Fig. 4.14: A p-n-p transistor in common collector configuration.

4. For input characteristics: I B , VBE , VCE .

For output characteristics: IC , VCE , I B .

For saturation region, VCE  few tenths of 1 V, IB = 0 and above.

For cut-off region, VCE = 0, below IB = 0.

5. a) From Eq. (4.2b), IC = dc IB

= 200  10  A = 2 mA

dc
From Eq. (4.3b), dc =
1 + dc

200
= = 0.995
201
IC
b) From Eq. (4.2b), dc =
IB

1.0 mA
= = 400
2 .5  A

dc
From Eq. (4.3b),  dc =
1 + dc

400
= = 0.998
104 401
Unit 4 Bipolar Junction Transistor Biasing
6. i) From Eq. (4.2b), IC = dc IB

= 100  30  A = 3 mA

whence IC RL = 15 V

Therefore, VCE = VCC − IC RL

= 30 V − 15 V = 15 V

ii) From Eq. (4.2b), IC = dc IB

= 100  10  A = 1 mA

whence IC RL = 5 V

Therefore, VCE = VCC − IC RL

= 10 V − 5 V = 5 V

7. a) decrease;

b) decrease;

c) decrease;

d) increase.

Terminal Questions
1. From the characteristics shown in Fig. 4.6,

a) collector current is approximately 40 mA or 41.2 mA;

b) order of magnitude of the ratio of collector current to base current of 20

A at collector-emitter voltage of 3 V is 1000.

2. dc beta is the ratio of the collector current to base current and equals
2060.

3. IC = dc IB = 200  40  A = 8.0 mA

V 20 V
RL = CC = = 2.5 k 
IC 8.0 mA

4. Substituting the values R1 = 45 k , R2 = 5.0 k  and VCC = 15 V, the

base voltage is given by:

VCC R2
VB = VR2 =
R1 + R2

15 V  5.0 k 
= = 1 .5 V
( 45 + 5.0) k 

 VE = VB − VBE

= (1.5 − 0.3) V = 1.2 V

105
Block 1 Physics of Semiconductor Devices
V 1 .2 V
and IE = E = = 1.2 mA
R E 1 .0 k 

 IC  IE = 1.2 mA

Applying Kirchhoff’s law to the output circuit, we get the collector voltage
as:

VC = VCC − IC RC = 15 V − (1.2 mA  5.0 k ) = 9.0 V

Thus, the collector-emitter voltage is:

VCE = VC − VE = 6.8 V

Therefore, the Q point is located at (6.8 V, 1.2 mA) for this transistor.

106