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EE230 Analog LAB Experiment 2

Analog Circuits Laboratory (Indian Institute of Technology Bombay)

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EE 230 – Analog Lab - 2021-22/I (Autumn)

Experiment 2: DC Power Supply
Par A – Unregulated DC Power Supply
Learning Objectives
1. Understanding the problems associated with increasing the capacitor value in an unregulated power
supply so as to reduce the ripple.
2. Understanding the limits of performance of a Zener regulator
3. Understanding a BJT based series voltage regulator to appreciate the basic blocks of an IC voltage
regulator.

1.1 Step Down Transformer (15-0-15)

We will use a 15-0-15V step-down transformer. (See Fig.1), i.e. a transformer with a centre tap, hence the
name 15-0-15 V transformer.

Fig 1 230 V to 15-0-15V Step-down transformer

1.2 Unregulated DC Power Supply (using Bridge Rectifier)

A) Unregulated Supply – without and with a Capacitive Filter
Fig.2 shows the circuit diagram of the unregulated DC power supply. In the absence of a Capacitor, the Vout
waveform will be a pulsating DC waveform. Diodes used are IN4007 (Peak current = 1 A, Breakdown voltage =
1000V).

Fig. 2 Unregulated DC Power supply using a Bridge Rectifier

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1.2.1 NGSPICE Simulation

Simulate the Bridge rectifier circuit. Plot the Vout waveform as one plot; plot the currents through the diodes D1
and D3 as the second plot. Choose RL = 1 kΩ. Do not connect any Capacitor for this part. Note that the
transformer output voltage of 15 V is its RMS value. Choose a voltage source as appropriate.

Hint: You need to use the .tran command for analysis. Also, choose a sine waveform with the correct amplitude
and frequency. Use appropriate voltage sources for obtaining the currents through D1 and D2.

Diode Model:
You need to use an appropriate diode model for the diodes used. Note that the diodes used (1N4007) are not
switching diodes, but power diodes. 1N4007 has a peak current rating of 1 A and breakdown voltage 1000 V.
Model for 1N914 switching diode is given below (taken from WEL Lab site).

.MODEL 1N914 D (IS=6.2229E-9 N=1.9224 RS=0.33636 IKF=42.843E-3 CJO=764.38E-15

+ M=0.1001 VJ=0.99900 BV=100.14 IBV=0.25951 TT=2.8854E-9)

Modify the above model parameters appropriately for your simulations.

(Please refer to the Spice_3f3_Users_Manual.pdf. Available in the Google drive location shared for Expt 1. We
shall discuss more on this in the Lab Lecture).

B) Unregulated Supply - with a Capacitive Filter

Once a Capacitor is connected across RL as in Fig.2, the Vout waveform will become smoother, i.e. a large dc
with a ripple voltage riding on it. The ripple voltage will depend on: i) the load current (or RL), and ii) the value
of C.

For a given load RL, one solution employed by some to reduce the ripple voltage is to increase C. In the
following NGSPICE simulations you should investigate and decide for yourself whether this strategy is right or
not.

1.2.2 NGSPICE Simulation

Simulate and plot the Vout waveform of the unregulated power supply with C. Observe and estimate the
approximate peak-to-peak ripple voltage. Plot the currents through the diodes D1 and D3 separately. Try
simulations for the following combinations of RL and C values.

Obtain the above plots for the following cases:

Cases (i) to (iii) : RL = 1kΩ, and C = 100 μF, 470 μF, and 1000 μF
Cases (iv) to (vi) : RL = 500 Ω, and C = 100 μF, 470 μF, and 1000 μF

Observation and comments:

Note the changes in the voltage and current waveforms as RL and C are varied. Note also, the approximate ratio
of peak diode current to the load current. Comment as to why for a given value of RL, the diode currents are
different for different C values.

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1.3 DC Power Supply with Zener Diode Regulator

1.3.1 Zener Regulator - Analysis
Analyse the Zener diode regulator circuit given below.

Fig.3 Zener regulator

Case (i): For Vin = 20 V (dc). Choose RS = 470 Ω, RL = 1 kΩ. Assume Zener voltage = 12 V and Zener
region diode resistance = 125 Ω. Calculate Vout, IS, IZ and IL.

Case (ii): For Vin varying from 15 V to 25 V. RS = 470 Ω, RL = 1 kΩ. (Zener voltage = 12 V and Zener
region diode resistance = 125 Ω). Consider a few Vin values between 15 and 25 V.

Hint: For a given Vin value, apply Thevenin9s theorem and represent the Zener regulator by its equivalent
Thevenin voltage and resistance. This would make it easier to calculate Vout, and IL , and then IS and IZ.

1.3.2 NGSPICE Simulation

a) For Vin = 20 V, RS = 470 Ω, RL = 1 kΩ, simulate and print Vout, IS, IZ and IL. Compare your simulation
results with your earlier calculations. Best to use .op command for this.
(For obtaining currents IL , and then IS and IZ you need to put a series voltage source with zero voltage, and
then print the currents).

Zener Diode Model

The best way to model a Zener diode is to consider it as a sub-circuit consisting of a forward diode
connected in parallel with a reverse diode with a dc offset. The dc offset is typically chosen to be about 1 to
1.2 V lower than the Zener voltage. We shall use the following sub circuit for the 12 V Zener diode.

.SUBCKT ZENER_12 1 2
D1 1 2 DF
DZ 3 1 DR
VZ 2 3 10.8
.MODEL DF D ( IS=27.5p RS=0.620 N=1.10 CJO=78.3p VJ=1.00 M=0.330 TT=50.1n )
.MODEL DR D ( IS=5.49f RS=50 N=1.77 )
.ENDS

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You may key in the above sub circuit in your .CIR file and then use it through the sub circuit command:
x1 A K ZENER_12
where A and K are the anode and cathode nodes of the Zener diode, respectively.

b) See how well the Zener regulator regulates Vout for a range of Vin values. You should use the .dc
command for this purpose. Format for the .dc command:
.dc source startval stopval stepsize

Obtain the Vout, IS, IZ and IL values when Vin is varied from 15 to 25 V in steps of 0.5 V. (Assume
RS = 470 Ω, RL = 1 kΩ). Observe IZ values for Vin ≤ 17 V and explain the results.

c) For Vin = 20 V, and RS = 470 Ω, simulate for different values of RL lower than 1 kΩ. For the given
values, verify the simulation results with he theoretical value for the lowest value of RL allowed for a Zener
regulator.

1.4 DC Power Supply with a BJT Series Regulator

Circuit diagram of the BJT series regulator is shown below in Fig.4. You could think of this as the next step
towards better regulation of output voltage against changes in Vin and RL. This circuit has the basic blocks of a
sophisticated IC regulator, such as 7812 (fixed 12 V regulator). A general-purpose adjustable Voltage regulator
IC essentially has about four parts, viz. a reference voltage, an error amplifier, a series active element and a
resistor network for adjusting Vout.

Fig.4 BJT series voltage regulator

In the circuit shown Q1 (SL100) is a medium power BJT with β of about 100, whereas Q2 (BC547) is a low
power BJT having β > 200, which is commonly used in amplifier circuits.
Operation of the BJT Series Regulator
The BJT series regulator is a combination of a reference voltage, error amplifier, a series element for regulating
the voltage and a resistor network for sampling Vout. In Fig 4, Zener diode acts as the reference voltage, Q2 acts
as the error amplifier and Q1, the series regulating element, and R1, R2 and the potentiometer as the resistive
network. The circuit is essentially a negative-feedback amplifier.

Note that VB = Vout . R2/(R1+R2), is directly proportional to Vout. Assume that Vout increases from the steady-
state value due to RL↑ (or less load current). This would result in VB also increasing proportionately, which
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would cause more base current to flow in Q2 and consequently more collector current in Q2, which would then
drain away some of the base current flowing into Q1, resulting in increased VCE drop in Q1, which would reduce
Vout. Similar argument can be given for corrections when Vout decreases. Hence, we see that the circuit
continuously samples Vout and corrects any voltage variations.

1.4.1 NGSPICE Simulation

BJT Models
The series regulator circuit has two BJTs, a medium power BJT and a low power BJT commonly used for
small-signal amplifier applications. Their model files (sample model values) are given below. Since ours is a dc
application many of the small-signal parameters are not very important for our analysis. However, the ac
parameters would be required to check whether the circuit is stable or not.

.model bc547a NPN IS=10f BF=200 ISE=10.3f IKF=50m NE=1.3

+ BR=9.5 VAF=80 IKR=12m ISC=47p NC=2 VAR=10 RB=280 RE=1 RC=40
+ tr=0.3u tf=0.5n cje=12p vje=0.48 mje=0.5 cjc=6p vjc=0.7 mjc=0.33 kf=2f

.model SL100 NPN IS=100f BF=80 ISE=10.3f IKF=50m NE=1.3

+ BR=9.5 VAF=80 IKR=12m ISC=47p NC=2 VAR=10 RB=100 RE=1 RC=10
+ tr=0.3u tf=0.5n cje=12p vje=0.48 mje=0.5 cjc=6p vjc=0.7 mjc=0.33 kf=2f

Format for BJTs: Q1 C B E bc547a, where C, B and E are the Collector, Base and Emitter nodes of the BJT.

Refer to the Common Emitter amplifier example given in Chapter 21 (page 451) of the NGSPICE-34-manual.
There a 8generic npn9 model is used. Here we are specifying the model parameters.

Simulation
Create a .CIR file to simulate the BJT series regulator circuit of Fig.4. Use Vin = 20 V, RL = 1 kΩ.
Note that in Fig 4, the value of R1 is: 10kΩ + part of the 5 kΩ potentiometer; similarly, R2 is: 10 kΩ + the
remaining part of the 5 kΩ potentiometer). Hence, R1 + R2 = 25 kΩ.
Case i) For Vin = 20 V, RL = 1 kΩ, keep R1 = R2 = 12.5 kΩ. Print all the node voltages.
Case ii) Vary R1 and R2 (while keeping R1 + R2 = 25 kΩ) so as to get Vout = 12 V approximately.
Case iii) for the R1 and R2 values you got for Vout = 12 V, perform a .dc analysis. (Keep RL = 1 kΩ, and vary
Vin from 15 V to 25 V in steps of 0.5 V). Compare these results with the ones you got for the Zener regulator.

Lab Report
1. Hereafter, in view of the hardships you may be facing due to the online mode, we want you to submit
only a short Lab report, say a maximum of 3 or 4 pages.
2. For Experiment 2, please limit your Lab report to just 3 pages – one page for the Unregulated Supply
with Capacitive Filter, one page for the DC Power Supply with Zener Diode Regulator, and the last
page for the DC Power Supply with a BJT Series Regulator.
3. In each page, please include one of your NGSPICE programs, and one or two plots or the printed
values, as the case may be. No analysis required. Please also add one line of what you learned.
4. The purpose of asking you to make shorter Lab reports is to make sure that you save some time.
However, we assume that you have done all that was asked in the Lab handout (analysis and
simulations). These and related topics may be asked in the Quizzes, as well as in the Midsem and
Endsem examinations.

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