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DDCO MODULE 3

The document outlines the basic structure and operational concepts of computers, detailing functional units such as input, memory, ALU, output, and control unit. It explains the performance metrics of computers, including processor clock, basic performance equations, and the significance of bus structures in data transfer. Additionally, it discusses the importance of performance measurement through benchmark programs to evaluate computer effectiveness.

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0% found this document useful (0 votes)
10 views26 pages

DDCO MODULE 3

The document outlines the basic structure and operational concepts of computers, detailing functional units such as input, memory, ALU, output, and control unit. It explains the performance metrics of computers, including processor clock, basic performance equations, and the significance of bus structures in data transfer. Additionally, it discusses the importance of performance measurement through benchmark programs to evaluate computer effectiveness.

Uploaded by

Sahana G
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital Design and Computer Organization BCS302

MODULE-3
Basic Structure of Computers: Functional Units, Basic Operational Concepts, Bus structure, Performance –
Processor Clock, Basic Performance Equation, Clock Rate, Performance Measurement.
Machine Instructions and Programs: Memory Location and Addresses, Memory Operations, Instruction and
Instruction sequencing, Addressing Modes.
BASIC STRUCTURE OF COMPUTERS
A computer can be defined as a fast electronic calculating machine that accepts the (data) digitized input
information process it as per the list of internally stored instructions and produces the resulting information. List
of instructions are called programs & internal storage is called computer memory. The different types of
computers are
1. Personal computers: This is the most common type found in homes, schools, Business offices etc., It is
the most common type of desk top computers with processing and storage units along with various input
and output devices.
2. Note book computers: These are compact and portable versions of PC
3. Work stations: These have high resolution input/output (I/O) graphics capability, but with same
dimensions as that of desktop computer. These are used in engineering applications of interactive design
work.
4. Enterprise systems: These are used for business data processing in medium to large corporations that
require much more computing power and storage capacity than work stations. Internet associated with
servers has become a dominant worldwide source of all types of information.
5. Super computers: These are used for large scale numerical calculations required in the applications like
weather forecasting etc.

3.1 Functional Units


A computer consists of five functionally independent main parts
 Input
 Memory
 arithmetic logic unit (ALU)
 output and
 control unit
Input device accepts the coded information as source program i.e. high level language. This is either stored in
the memory or immediately used by the processor toper form the desired operations. The program stored in the

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Digital Design and Computer Organization BCS302
memory determines the processing steps. Basically the computer converts one source program to an object
program. i.e. into machine language.

Fig: Functional units of computer


 Input unit
The source program/high level languages program/coded information/simply data is fed to a computer through
input devices keyboard is a most common type. Whenever a key is pressed, one corresponding word or number
is translated into its equivalent binary code over a cable & fed either to memory or processor.
Example: Joysticks, trackballs, mouse, scanners etc are other input devices.
 Output unit
These actually are the counterparts of input unit. Its basic function is to send the processed results to the outside
world.
Examples: Printer, speakers, monitor etc.
 Memory unit:
Its function is to store programs and data. It is basically to two types
 Primary memory
 Secondary memory
o Primary memory: Is the one exclusively associated with the processor and operates at the
electronics speeds programs must be stored in this memory while they are being executed.
 The memory contains a large number of semiconductors storage cells. Capable of
storing one bit of information. These are processed in a group of fixed size called
word.
 Number of bits in each word is called word length of the computer. Programs must
reside in the memory during execution. Instructions and data can be written into the
memory or read out under the control of processor.

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 Memory in which any location can be reached in a short and fixed amount of time
after specifying its address is called random-access memory (RAM).
 The time required to access one word in called memory access time. Memory which
is only readable by the user and contents of which can’t be altered is called read only
memory (ROM) it contains operating system.
 Caches are the small fast RAM units, which are coupled with the processor and are
often contained on the same IC chip to achieve high performance. Although primary
storage is essential it tends to be expensive
o Secondary memory: Is used where large amounts of data & programs have to be stored,
particularly information that is accessed infrequently.
 Examples: Magnetic disks & tapes, optical disks (ie CD-ROM’s), floppies etc.,
 Arithmetic logic unit (ALU):
Most of the computer operators are executed in ALU of the processor like addition, subtraction, division,
multiplication, etc. the operands are brought into the ALU from memory and stored in high speed storage
elements called register. Then according to the instructions the operation is performed in the required sequence.
The control and the ALU are many times faster than other devices connected to a computer system. This
enables a single processor to control a number of external devices such as key boards, displays, magnetic and
optical disks, sensors and other mechanical controllers.
 Control unit:
It effectively is the nerve center that sends signals to other units and senses their states. The actual timing
signals that govern the transfer of data between input unit, processor, memory and output unit are generated by
the control unit.

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3.2 BASIC OPERATIONAL CONCEPTS
To perform a given task an appropriate program consisting of a list of instructions is stored in the memory.
Individual instructions are brought from the memory into the processor, which executes the specified
operations. Data to be stored are also stored in the memory.
Examples: Add LOCA, R0
This instruction adds the operand at memory location LOCA, to operand in register R0 & places the sum into
register. This instruction requires the performance of several steps,
1. First the instruction is fetched from the memory into the processor.
2. The operand at LOCA is fetched and added to the contents of R0
3. Finally the resulting sum is stored in the register R0

The preceding Add instruction combines a memory access operation with an ALU Operations. In some other
type of computers, these two types of operations are performed by separate instructions for performance
reasons.
Load LOCA, R1
Add R1, R0
Transfers between the memory and the processor are started by sending the address of the memory location to
be accessed to the memory unit and issuing the appropriate control signals. The data are then transferred to or
from the memory.

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The instruction register (IR): Holds the instructions that are currently being executed. Its output is available
for the control circuits which generates the timing signals that control the various processing elements in one
execution of instruction.
 The program counter PC: This is another specialized register that keeps track of execution of a
program. It contains the memory address of the next instruction to be fetched and executed. Besides IR
and PC, there are n-general purpose registers R0 through Rn-1.
The other two registers which facilitate communication with memory are:
 MAR – (Memory Address Register): It holds the address of the location to be accessed.
 MDR – (Memory Data Register): It contains the data to be written into or readout of the address
location.
Operating steps are:
1. Programs reside in the memory & usually get these through the I/P unit.
2. Execution of the program starts when the PC is set to point at the first instruction of the program.
3. Contents of PC are transferred to MAR and a Read Control Signal is sent to the memory.
4. After the time required to access the memory elapses, the address word is read out of the memory and
loaded into the MDR.
5. Now contents of MDR are transferred to the IR & now the instruction is ready to be decoded and
executed.
6. If the instruction involves an operation by the ALU, it is necessary to obtain the required operands.
7. An operand in the memory is fetched by sending its address to MAR & Initiating a read cycle.
8. When the operand has been read from the memory to the MDR, it is transferred from MDR to the ALU.
9. After one or two such repeated cycles, the ALU can perform the desired operation.
10. If the result of this operation is to be stored in the memory, the result is sent to MDR.
11. Address of location where the result is stored is sent to MAR & a write cycle is initiated.
12. The contents of PC are incremented so that PC points to the next instruction that is to be executed.

3.3 Bus structure


The simplest and most common way of inter connecting various parts of the computer. To achieve a reasonable
speed of operation, a computer must be organized so that all its units can handle one full word of data at a given
time. A group of lines that serve as a connecting port for several devices is called a bus.
In addition to the lines that carry the data, the bus must have lines for address and control purpose. Simplest
way to interconnect is to use the single bus as shown

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Fig: Single bus structure


Since the bus can be used for only one transfer at a time, only two units can actively use the bus at any given
time. Bus control lines are used to arbitrate multiple requests for use of one bus.
 Low cost
 Very flexible for attaching peripheral devices
Multiple bus structure certainly increases the performance but also increases the cost significantly. All the
interconnected devices are not of same speed &time leads to a bit of a problem. This is solved by using cache
registers (i.e buffer registers). These buffers are electronic registers of small capacity when compared to the
main memory but of comparable speed. The instructions from the processor at once are loaded into these
buffers and then the complete transfer of data at a fast rate will take place.

3.4 Performance, Processor Clock, Basic Performance Equation, Clock Rate Performance Measurement
The most important measure of the performance of a computer is how quickly it can execute programs. The
speed with which a computer executes program is affected by the design of its hardware. For best performance,
it is necessary to design the compiles, the machine instruction set, and the hardware in a coordinated way.
The total time required to execute the program is elapsed time is a measure of the performance of the
entire computer system. It is affected by the speed of the processor, the disk and the printer. The time needed to
execute a instruction is called the processor time.

Fig: The processor cache

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Let us examine the flow of program instructions and data between the memory and the processor. At the start of
execution, all program instructions and the required data are stored in the main memory. As the execution
proceeds, instructions are fetched one by one over the bus into the processor, and a copy is placed in the cache
later if the same instruction or data item is needed a second time, it is read directly from the cache.
The processor and relatively small cache memory can be fabricated on a single IC chip. The internal
speed of performing the basic steps of instruction processing on chip is very high and is considerably faster than
the speed at which the instruction and data can be fetched from the main memory. A program will be executed
faster if the movement of instructions and data between the main memory and the processor is minimized,
which is achieved by using the cache.
3.4.1 Processor clock
Processor circuits are controlled by a timing signal called clock. The clock designer the regular time intervals
called clock cycles. To execute a machine instruction the processor divides the action to be performed into a
sequence of basic steps that each step can be completed in one clock cycle. The length P of one clock cycle is
an important parameter that affects the processor performance.
Processor used in today’s personal computer and work station has a clock ratesthat range from a few
hundred million to over a billion cycles per second.
3.4.2 Basic Performance Equation
 Let ‘T’ be the processor time required to execute a program that has been prepared in some high-level
language.
 The compiler generates a machine language object program that corresponds to the source program.
Assume that complete execution of the program requires the execution of N machine cycle language
instructions.
 The number N is the actual number of instruction execution and is not necessarily equal to the number
of machine cycle instructions in the object program.
 The average number of basic steps needed to execute one machine cycle instruction is S, where each
basic step is completed in one clock cycle.
If clock rate is ‘R’ cycles per second, the program execution time is given by
𝑁∗𝑅
𝑇=
𝑆
We must emphasize that N, S & R are not independent parameters changing one may affect another.
Introducing a new feature in the design of a processor will lead to improved performance only if the overall
result is to reduce the value of T.

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3.4.3 Clock rate
These are two possibilities for increasing the clock rate ‘R’.
 Improving the IC technology makes logical circuit faster, which reduces the time of execution of basic
steps. This allows the clock period P, to be reduced and the clock rate R to be increased.
 Reducing the amount of processing done in one basic step also makes it possible to reduce the clock
period P. however if the actions that have to be performed by an instructions remain the same, the
number of basic steps needed may increase.
Increase in the value ‘R’ that is entirely caused by improvements in IC technology affects all aspects of the
processor’s operation equally with the exception of the time it takes to access the main memory. from the use of
faster technology can be realized.
3.4.4 Performance measurements
 It is very important to be able to access the performance of a computer, designers use performance
estimates to evaluate the effectiveness of new features.
 In spite of the performance equation being so simple, the evaluation of ‘T’ is highly complex. Moreover
the parameters like the clock speed and various architectural features are not reliable indicators of the
expected performance.
 Hence measurement of computer performance using bench mark programs is done to make comparisons
possible, standardized programs must be used.
 The performance measure is the time taken by the computer to execute a given bench mark. Initially
some attempts were made to create artificial programs that could be used as bench mark programs. But
synthetic programs do not properly predict the performance obtained when real application programs are
run.
The same program is also compiled and run on one computer selected as reference.
𝑹𝒖𝒏𝒏𝒊𝒏𝒈 𝒕𝒊𝒎𝒆 𝒐𝒏 𝒕𝒉𝒆 𝒓𝒆𝒇𝒆𝒓𝒆𝒏𝒄𝒆 𝒄𝒐𝒎𝒑𝒖𝒕𝒆𝒓
𝑺𝑷𝑬𝑪 𝒓𝒂𝒕𝒊𝒏𝒈 =
𝑹𝒖𝒏𝒏𝒊𝒏𝒈 𝒕𝒊𝒎𝒆 𝒐𝒏 𝒕𝒉𝒆 𝒄𝒐𝒎𝒑𝒖𝒕𝒆𝒓 𝒖𝒏𝒅𝒆𝒓 𝒕𝒆𝒔𝒕
If the SPEC rating = 50Means that the computer under test is 50 times as fast as the ultra sparc 10. This is
repeated for all the programs in the SPEC suit, and the geometric mean of the result is computed.
Let SPEC i be the rating for program ‘i’ in the suite. The overall SPEC rating for the computer is given by
𝟏
𝒏 𝒏

𝑺𝑷𝑬𝑪 𝒓𝒂𝒕𝒊𝒏𝒈 = 𝑨𝒌 𝑺𝑷𝑬𝑪𝒊


𝒊 𝟏

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Digital Design and Computer Organization BCS302
MACHINE INSTRUCTIONS AND PROGRAMS
3.5 Memory Location and Addresses
Number and character operands, as well as instructions, are stored in the memory of a computer. The memory
consists of many millions of storage cells, each of which can store a bit of information having the value 0 or 1.
Because a single bit represents a very small amount of information, bits are seldom handled individually. The
usual approach is to deal with them in groups of fixed size. For this purpose, the memory is organized so that a
group of n bits can be stored or retrieved in a single, basic operation. Each group of n bits is referred to as a
word of information, and n is called the word length.
Modern computers have word lengths that typically range from 16 to 64 bits. If the word length of a
computer is 32 bits, a single word can store a 32-bit 2’s complement number or four ASCII characters, each
occupying 8 bits. A unit of 8 bits is called a byte. Accessing the memory to store or retrieve a single item of
information, either a word or a byte, requires distinct names or addresses for each item location. It is customary
to use numbers from 0 through 2K-1, for some suitable values of k, as the addresses of successive locations in
the memory. The 2k addresses constitute the address space of the computer, and the memory can have up to 2k
addressable locations. 24-bitaddress generates an address space of 224 (16,777,216) locations. A 32-bit address
creates an address space of 232 or 4G (4 Giga) locations.
3.5.1 Byte Addressability
We now have three basic information quantities to deal with: the bit, byte and word. A byte is always 8 bits, but
the word length typically ranges from 16 to 64 bits. The most practical assignment is to have successive
addresses refer to successive byte

Fig: Memory words

Fig: A signed integer


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Digital Design and Computer Organization BCS302

Fig: Four characters


Locations in the memory. This is the assignment used in most modern computers, and is the one we will
normally use in this book. The term byte-addressable memory is use for this assignment. Byte locations have
addresses 0, 1, 2, …. Thus, if the word length of the machine is 32 bits, successive words are located at
addresses 0, 4, 8,…., with each word consisting of four bytes.
3.5.2 Big-Endian and Little-Endian Assignments
 The name big-endian is used when lower byte addresses are used for the more significant bytes (the
leftmost bytes) of the word.
 The name little-endian is used for the opposite ordering, where the lower byte addresses are used for the
less significant bytes(the rightmost bytes) of the word.

In addition to specifying the address ordering of bytes within a word, it is also necessary to specify the labeling
of bits within a byte or a word. The same ordering is also used for labeling bits within a byte, that is, b7, b6, ….,
b0, from left to right.
3.5.3 Word Alignment
In the case of a 32-bit word length, natural word boundaries occur at addresses 0,4, 8, …, We say that the word
locations have aligned addresses .in general, words are said to be aligned in memory if they begin at a byte
address that is a multiple of the number of bytes in a word. The memory of bytes in a word is a power of2.
Hence, if the word length is 16 (2 bytes), aligned words begin at byte addresses 0,2,4,…, and for a word length
of 64 (23 bytes), aligned words begin at bytes addresses0,8,16 ….
There is no fundamental reason why words cannot begin at an arbitrary byte address. In that case, words
are said to have unaligned addresses. While the most common case is to use aligned addresses, some computers
allow the use of unaligned word addresses.
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3.5.4 Accessing Numbers, Characters, and Character Strings
A number usually occupies one word. It can be accessed in the memory by specifying its word address.
Similarly, individual characters can be accessed by their byte address.
In many applications, it is necessary to handle character strings of variable length. The beginning of the
string is indicated by giving the address of the byte containing its first character. Successive byte locations
contain successive characters of the string. There are two ways to indicate the length of the string. A special
control character with the meaning “end of string” can be used as the last character in the string, or a separate
memory word location or processor register can contain a number indicating the length of the string in bytes.
3.6 Memory Operations
Both program instructions and data operands are stored in the memory. To execute an instruction, the processor
control circuits must cause the word (or words) containing the instruction to be transferred from the memory to
the processor. Operands and results must also be moved between the memory and the processor. Thus, two
basic operations involving the memory are needed, namely, Load (or Read or Fetch) and Store (or Write).
 The load operation transfers a copy of the contents of a specific memory location to the processor. The
memory contents remain unchanged.
 To start a Load operation, the processor sends the address of the desired location to the memory and
requests that its contents be read.
 The memory reads the data stored at that address and sends them to the processor.
 The store operation transfers an item of information from the processor to a specific memory location,
destroying the former contents of that location.
 The processor sends the address of the desired location to the memory, together with the data to be
written into that location.
 An information item of either one word or one byte can be transferred between the processor and the
memory in a single operation. Actually this transfer in between the CPU register & main memory.
3.7 Instruction and Instruction sequencing
A computer must have instructions capable of performing four types of operations
 Data transfers between the memory and the processor registers
 Arithmetic and logic operations on data
 Program sequencing and control
 I/O transfers
3.7.1 Register Transfer Notation
Transfer of information from one location in the computer to another. Possible locations that may be involved in
such transfers are memory locations that may be involved in such transfers are memory locations, processor

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registers, or registers in the I/O subsystem. Most of the time, we identify a location by a symbolic name
standing for its hardware binary address.
Example, names for the addresses of memory locations may be LOC, PLACE, A,VAR2; processor
registers names may be R0, R5; and I/O register names may be DATAIN, OUTSTATUS, and so on.
R1← [LOC]
Means that the contents of memory location LOC are transferred into processor register R1.
As another example, consider the operation that adds the contents of registers R1and R2, and then places their
sum into register R3. This action is indicated as
R3← [R1] + [R2]
This type of notation is known as Register Transfer Notation (RTN). Note that the right-hand side of an RTN
expression always denotes a value, and the left-hand side is the name of a location where the value is to be
places, overwriting the old contents of that location.
3.7.2 Assembly Language Notation
Another type of notation to represent machine instructions and programs . For this, we use an assembly
language format. For example, an instruction that causes the transfer described above, from memory location
LOC to processor register R1, is specified by the statement
Move LOC, R1
The contents of LOC are unchanged by the execution of this instruction, but the old contents of register R1 are
overwritten.
The second example of adding two numbers contained in processor registers R1and R2 and placing their
sum in R3 can be specified by the assembly language statement
Add R1, R2, R3
3.7.3 Basic Instructions
The operation of adding two numbers is a fundamental capability in any computer. The statement
C=A+B
In a high-level language program is a command to the computer to add the current values of the two variables
called A and B, and to assign the sum to a third variable, C. When the program containing this statement is
compiled, the three variables, A, B, and C, are assigned to distinct locations in the memory.
C← [A] + [B]
Let us first assume that this action is to be accomplished by a single machine instruction. Furthermore, assume
that this instruction contains the memory addresses of the three operands – A, B, and C. This three-address
instruction can be represented symbolically as
Add A, B, C

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Operands A and B are called the source operands, C is called the destination operand, and Add is the operation
to be performed on the operands. A general instruction of this type has the format.
Operation Source1, Source 2, Destination
An alternative approach is to use a sequence of simpler instructions to perform the same task, with each
instruction having only one or two operands. Suppose that two- address instructions of the form
Operation Source, Destination
Are available. An Add instruction of this type is
Add A, B
Which performs the operation?
B← [A] + [B]
A single two-address instruction cannot be used to solve our original problem, which is to add the contents of
locations A and B, without destroying either of them, and to place the sum in location C. The problem can be
solved by using another two-address instruction that copies the contents of one memory location into another.
Such an instruction is
Move B, C
Using only one-address instructions, the operation C← [A] + [B] can be performed by executing the sequence
of instructions
Load A
Add B
Store C
Let Ri represent a general-purpose register. The instructions
Load A, Ri
Store Ri, A and
Add A, Ri
When a processor has several general-purpose registers, many instructions involve only operands that are in the
register. In fact, in many modern processors, computations can be performed directly only on data held in
processor registers. Instructions such as
Add Ri, Rj
Or
Add Ri, Rj, Rk
In processors where arithmetic operations are allowed only on operands that are processor registers, the
C = A + B task can be performed by the instruction sequence
Move A, Ri

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Move B, Rj
Add Ri, Rj
Move Rj, C
In processors where one operand may be in the memory but the other must be in register, an instruction
sequence for the required task would be
Move A, Ri
Add B, Ri
Move Ri, C
3.7.4 Instruction Execution and Straight-Line Sequencing
We have assumed that the computer allows one memory operand per instruction and has a number of processor
registers. The three instructions of the program are in successive word locations, starting at location i. since
each instruction is 4 bytes long, the second and third instructions start at addresses i + 4 and i + 8.

Fig: A program for C← [A] + [B]


Let us consider how this program is executed. The processor contains a register called the program counter
(PC), which holds the address of the instruction to be executed next. To begin executing a program, the address
of its first instruction (I in our example) must be placed into the PC. Then, the processor control circuits use the
information in the PC to fetch and execute instructions, one at a time, in the order of increasing addresses.
This is called straight-line sequencing. During the execution of each instruction, the PC is incremented
by 4 to point to the next instruction. Thus, after the Move instruction at location i + 8 is executed, the PC
contains the value i + 12, which is the address of the first instruction of the next program segment.
Executing a given instruction is a two-phase procedure. In the first phase, called instruction fetch, the
instruction is fetched from the memory location whose address is in the PC. This instruction is placed in the

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instruction register (IR) in the processor. The instruction in IR is examined to determine which operation is to
be performed. The specified operation is then performed by the processor. This often involves fetching
operands from the memory or from processor registers, performing an arithmetic or logic operation, and storing
the result in the destination location.
3.7.4 Branching
Consider the task of adding a list of n numbers. Instead of using a long list of add instructions, it is possible to
place a single add instruction in a program loop. The loop is a straight-line sequence of instructions executed as
many times as needed. It starts at location LOOP and ends at the instruction Branch > 0. During each pass
through this loop, the address of the next list entry is determined, and that entry is fetched and added to

Fig: A straight-line program for adding n numbers


Assume that the number of entries in the list, n, is stored in memory location N, as shown. Register R1 is used
as a counter to determine the number of time the loop is executed. Hence, the contents of location N are loaded
into register R1 at the beginning of the program. Then, within the body of the loop, the instruction.
Decrement R1 , Reduces the contents of R1 by 1 each time through the loop.

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Fig: Using a loop to add n numbers


This type of instruction loads a new value into the program counter. As a result, the processor fetches and
executes the instruction at this new address, called the branch target, instead of the instruction at the location
that follows the branch instruction in sequential address order. A conditional branch instruction causes a branch
only if a specified condition is satisfied. If the condition is not satisfied, the PC is incremented in the normal
way, and the next instruction in sequential address order is fetched and executed.
Branch > 0 LOOP
(branch if greater than 0) is a conditional branch instruction that causes a branch to location LOOP if the result
of the immediately preceding instruction, which is the decremented value in register R1, is greater than zero.
This means that the loop is repeated, as long as there are entries in the list that are yet to be added to R0. at the
end of the nth pass through the loop, the Decrement instruction produces a value of zero, and hence, branching
does not occur.

3.7.5 Condition Codes


The processor keeps track of information about the results of various operations for use by subsequent
conditional branch instructions. This is accomplished by recording the required information in individual bits,
often called condition code flags. These flags are usually grouped together in a special processor register called
the condition code register or status register. Individual condition code flags are set to 1 or cleared to 0,
depending on the outcome of the operation performed
Four commonly used flags are

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N(negative) Set to 1 if the result is negative; otherwise, cleared to 0
Z(zero) Set to 1 if the result is 0; otherwise, cleared to 0
V(overflow) Set ot1 if arithmetic overflow occurs; otherwise, cleared to 0
C(carry) Set to 1 if a carry-out results from the operation; otherwise, cleared to 0
The instruction Branch > 0, discussed in the previous section, is an example of a branch instruction that
tests one or more of the condition flags. It causes a branch if the value tested is neither negative nor equal to
zero. That is, the branch is taken if neither N nor Z is 1. The conditions are given as logic expressions involving
the condition code flags.
3.7.6 Generating Memory Addresses
The purpose of the instruction block at LOOP is to add a different number from the list during each pass
through the loop. Hence, the Add instruction in the block must refer to a different address during each pass.
How are the addresses to be specified? The memory operand address cannot be given directly in a single Add
instruction in the loop. Otherwise, it would need to be modified on each pass through the loop. The instruction
set of a computer typically provides a number of such methods, called addressing modes. While the details
differ from one computer to another, the underlying concepts are the same.
3.8 Addressing Modes
In general, a program operates on data that reside in the computer’s memory. These data can be organized in a
variety of ways. If we want to keep track of students’ names, we can write them in a list. Programmers use
organizations called data structures to represent the data used in computations. These include lists, linked lists,
arrays, queues, and so on.
Programs are normally written in a high-level language, which enables the programmer to use constants,
local and global variables, pointers, and arrays. The different ways in which the location of an operand is
specified in an instruction are referred to as addressing modes.

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Fig: Generic Addressing Modes

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