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Microcontroller Lab BECL456A Manual-PPP

The document outlines the curriculum for the Microcontroller Lab BECL456A at RV Institute of Technology and Management, detailing assembly language programming, C programming, and hardware interfacing tasks. It includes a brief history and features of the 8051 microcontroller, its internal architecture, memory organization, and pin descriptions. Additionally, it highlights the special function registers and their roles in controlling the microcontroller's functionalities.

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0% found this document useful (0 votes)
25 views

Microcontroller Lab BECL456A Manual-PPP

The document outlines the curriculum for the Microcontroller Lab BECL456A at RV Institute of Technology and Management, detailing assembly language programming, C programming, and hardware interfacing tasks. It includes a brief history and features of the 8051 microcontroller, its internal architecture, memory organization, and pin descriptions. Additionally, it highlights the special function registers and their roles in controlling the microcontroller's functionalities.

Uploaded by

Mystichtechboy
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 28

MICROCONTROLLER LAB

BECL456A (AEC)
2023-Batch

Dr. PRASHANT P PATAVARDHAN Professor-ECE


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

MICROCONTROLLER LAB BECL456A


I. Assembly Language Programming
Data Transfer Programs:
1 Write an ALP to move a block of n bytes of data from source (20h) to destination (40h) using
Internal-RAM.
2 Write an ALP to move a block of n bytes of data from source (2000h) to destination (2050h)
using External RAM.
3 Write an ALP To exchange the source block starting with address 20h, (Internal RAM)
containing N (05) bytes of data with destination block starting with address 40h (Internal RAM).
4 Write an ALP to exchange the source block starting with address 10h (Internal memory),
containing n (06) bytes of data with destination block starting at location 00h (External memory).

Arithmetic & Logical Operation Programs:


5 Write an ALP to add the byte in the RAM at 34h and 35h, store the result in the register R5
(LSB) and R6 (MSB), using Indirect Addressing Mode.
6 Write an ALP to subtract the bytes in Internal RAM 34h &35h store the result in register R5
(LSB) & R6 (MSB).
7 Write an ALP to multiply two 8-bit numbers stored at 30h and 31h and store16-bit result in 32h
and 33h of Internal RAM.
8 Write an ALP to perform division operation on 8-bit number by 8-bit number.
9 Write an ALP to separate positive and negative in a given array.
10 Write an ALP to separate even or odd elements in a given array.
11 Write an ALP to arrange the numbers in Ascending & Descending order.
12 Write an ALP to find Largest & Smallest number from a given array starting from 20h & store
it in Internal Memory location 40h.

Counter Operation Programs:


13 Write an ALP for Decimal UP-Counter.
14 Write an ALP for Decimal DOWN-Counter.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

15 Write an ALP for Hexadecimal UP-Counter.


16 Write an ALP for Hexadecimal DOWN-Counter.

II. C Programming
1 Write an 8051 C program to find the sum of first 10 Integer Numbers.
2 Write an 8051 C program to find Factorial of a given number.
3 Write an 8051 C program to find the Square of a number (1 to 10) using Look-Up Table.
4 Write an 8051 C program to count the number of Ones and Zeros in two consecutive memory
locations.

III. Hardware Interfacing Programs


1 Write an 8051 C Program to rotate stepper motor in Clock & Anti-Clockwise direction.
2 Write an 8051 C program to Generate Sine & Square waveforms using DAC interface.

Page 2 of 27

©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

INTRODUCTION
Brief History of 8051 Microcontroller
• In 1976, Intel Corporation introduced an 8-bit microcontroller under the name MCS-48. Later they
released an improved version under the name MCS-51.
• In 1981, Intel Corporation introduced an 8-bit microcontroller called 8051.
• The 8051 is a Harvard architecture, CISC instruction set, single chip microcontroller (µC).
• 8051 belongs to the MCS-51 family of microcontrollers by Intel.
• 8051 had processor 8 bit, RAM 128 bytes, ROM - 4K, timer-2, serial port 1, IO port 4 (4*8 = 32 IO
pins), interrupt source 6.
• It was referred as system on chip.
• Intel allowed other manufactures to make and market any flavour of 8051 with condition that they
remain code compatible with original 8051.
• There are different flavours of 8051 in terms of speed, ROM, RAM, timer and interrupt.
8052 and 8031 are the two other members of 8051 family of microcontrollers.
• Comparison of 8051 family microcontrollers.

• 8051 can have a maximum of 64K bytes of on-chip ROM.


• External ROM, as large as 64K bytes must be attached to 8031 through IO ports.
• External IO can be attached to 8031.
• There are various versions of 8051 such as, EPROM version, Flash version, NVRAM version, OTP
(one time programmable) version.
• All the versions of 8051 microcontrollers can be programmed using 8051 instruction set.

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Features
• 8bit ALU
• 8 bit accumulator
• 8 bit registers
• One 16 bit register with special move instruction
• 8 bit data bus
• 16 bit address bus
• 16 bit program counter
• 16 bit data or stack pointer
• Boolean processor with 17 instructions, 1 bit accumulator, 32 registers (4 bit addressable 8 bit), 144 special
1 bit addressable RAM variables (18 bit addressable 8 bit)
• Multiply, Divide and compare instruction
• 4 register bank with 8 registers each
• 3 Internal and 2 external interrupt sources
• Interrupt with 2-level priority and optional register bank switching
• 128 bytes of on-chip RAM (Data memory)
• 4K bytes of on-chip ROM (Program Memory)
• Four 8 bit bidirectional input/output ports
• Serial port - UART
• Two 16 bit counter/timers
• Power saving mode
• 1 Microsecond instruction cycle with 12 MHz Crystal

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Microcontroller Simplified Internal Architecture

8051 is a strict Harvard Architecture Computer.


CPU: It consists of ALU and Control Unit. Its primary purpose is to fetch, decode and execute
instructions in ROM.
Oscillator: It sources clock pluses to CPU.
System Bus: It consists of Address Bus and Data Bus. It connects memory and peripherals to CPU.
ROM: 4K bytes for storing program instructions.
RAM: 128 bytes for storing temporary variables during program execution.
Bus Control: To generate control signals like read, write.
Interrupt Control: There are 5 interrupts in 8051. It control interrupts based on priority.
Timer: To count clock pluses and measuring time intervals.
Serial Port: Serial protocol to communicate with external devices.
IO Port: There are 4 ports with 8 pins each. Some pins are multiplexed. Designer can select the
functionality.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Internal and External Memory


Internal Memory:
• Also referred as on-chip memory
• Physically exists on the microcontroller itself
• Includes Program or Instruction or Code Memory, Data Memory and Registers
External Memory:
• Also referred as off-chip memory
• Resides outside of microcontroller
• Physically connected to microcontroller
• Includes Program Memory and Data Memory

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Internal Memory Map

• 8051 have 4K bytes Program Memory, 128 Data Memory and Special Function Registers.
• Program and Data memory share the same address space but are accessed via different instruction
types.
• IRAM from 0x00 to 0x7F can be accessed directly or indirectly.
• Special function registers (SFR) from 0x80 to 0xFF can be accessed directly.
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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Memory Map


8051 Internal Memory Map
• 8051 have 4K bytes Program Memory, 128 Data Memory and Special Function Registers.
• Program and Data memory share the same address space but are accessed via different
instruction types.
• IRAM from 0x00 to 0x7F can be accessed directly or indirectly.
• Special function registers (SFR) from 0x80 to 0xFF can be accessed directly.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Program Memory


8051 Program or Code Memory
• 8051 has 4K bytes of internal program memory.
• It is allowed to add 60K bytes of external program memory in addition to internal memory.
• Up to 64K bytes of program memory.
• It may be on-chip or off-chip or combination of both.
• It can be ROM or EPROM.
• Some variants use on-chip flash memory and allow in-system or in-application re-programming.
• It is possible to store read-only data in program memory using special function register and MOVC
instruction.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

 8051 starts executing program instructions from address 0000H in the program memory.
 EA pin should be connected to Vcc to fetch instructions from internal memory initially.
 Control will automatically move to external memory to fetch instruction from them.
 EA pin should be connected to ground to fetch instruction from external memory only.
 Internal program memory can be locked and protected.

8051 Data Memory


8051 Data Memory & RAM
 128 bytes of internal data memory
 It is allowed to add 64K bytes of external data memory in addition to internal memory.
 128 bytes of internal memory and up to 64K bytes of external data memory.
 Internal memory consists of Register Banks, Bit addressable area, User RAM
 00H-1FH: General Purpose Registers.
 20H-2FH: Bit Memory
 30H7FH: User RAM

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Pin Description of 8051

The 8051 is packaged in a 40-pin DIP. It is important to note that many pins of 8051 are used for
more than one function. The alternative functions of pins are shown in bold letters.

The 8051 has 32 I/O pins configured as four eight-bit parallel ports (P0, Pl, P2 and P3). All four ports
are bidirectional i.e. each pin will be configured as input or output (or both). All port-pins are
multiplexed except the pins of port 1. Each port consists of a latch, an output driver and an input
buffer.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Port 0 (Pins 32 - 39) : Port 0 pins can be used as I/O pins. The output drives and input buffers of
port 0 are used to access external memory. Port 0 outputs the low order byte of the external memory
address, time multiplexed with the data being written or read. Thus, port 0 can be used as a
multiplexed address/data bus.

Port 1 (Pins 1 - 8) : Port 1 pins can be used only as I/O pins.

Port 2 (Pins 21 - 28) : The output drives of port 2 are used to access external memory. Port 2 outputs
the high order byte of the external memory address when the address is 16 bits wide. Otherwise,
port 2 is used as an I/O port.

Port 3 (Pins 10 - 17) : All port pins of port 3 are multifunctional. Therefore, each pin of port 3 can
be programmed to use as I/O or as one of the alternate function. They have special functions as shown
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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

below including two external interrupts, two counter inputs, two special data lines and two timing
control strobes.

Power-supply Pins VCC (Pin 40) and VSS (Pin 20) : 8051 operates on d.c. power supply of +5 V with
respect to ground. The +5 V is to be connected to pin VCC and ground to pin VSS with rated power
supply current of 125 mA.

Oscillator Pins XTAL2 (Pin 18) and XTAL1 (Pin 19) : For generating an internal clock signal, the
external oscillator is connected at these two pins.

ALE (Address Latch Enable, Pin 30) : AD0 to AD7 lines are multiplexed. To demultiplex these lines
and for obtaining lower half of an address, an external latch and ALE signal of 8051 is used.

RST (Reset, Pin 9) : This pin is used to reset 8051. For proper reset operation, reset signal must be
held high at least for two machine cycles, while oscillator is running.

(Program Store Enable, Pin 29) : It is the active low output control signal used to activate
the enable signal of the external ROM/EPROM. It is activated every six oscillator periods while
reading the external memory. Thus, this signal acts as the read strobe to external program memory.

(External Access, Pin 31) : When the pin is high (connected to VCC), program fetches to
addresses 0000H through 0FFFH are directed to the internal ROM and program fetches to addresses
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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

1000H through FFFFH are directed to external ROM/EPROM. When is low (grounded), all
addresses (0000H to FFFFH) fetched by program are directed to the external ROM/EPROM.

Page 15 of 27

©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

8051 Special Function Registers

 0x80-0xFF: Special Function Registers (SFR) -


 SFR's are to control specific functionality of 8051
 SFR allows to configure and control peripherals
 SFRs are accessed as if they were normal Internal RAM
 Each SFR has an address and a name
 There are 21 SFRs in a standard 8051
 SFRs are grouped in to three categories
 IO port SFR: PO, P1, P2, P3
 Control SFR: TCON, TMOD, SCON, IE, IP, PSW
 Auxiliary SFR: SP, DPL, DPH, TLO, TL1, THO, TH1, SBUF, ACC, В

8051 Stack
Stack Memory

 Stack is a part of RAM used by the CPU to store information temporarily.


 Information may be either data or an address.
 CPU needs this storage area as there are only limited numbers of registers.
 Register used to access the stack is called Stack Pointer (SP).
 SP is an 8-bit register. It can take values of ooH to FFH.
 When 8051 is powered on, SP contains the value 07H.
 RAM location 08H to 1F (24 bytes) is used as stack by default.
 RAM location 30H to 7FH can be used as stack.
 User can initialize SP to desired location.
 Depending on the initial value of the SP, 8051 stack can have different sizes.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

 Loading of data from CPU registers to the stack is done by PUSH instruction. Loading the
contents of the stack back in to CPU registers is done by POP instruction.
 Stack grows upward; the SP is incremented before pushing and decremented after popping a
value.

8051 Stack Pointer


 Contains the address of the data item on top of the stack.
 Used by subroutine call and return instructions.
 Stack, in user space of internal RAM, grows upward; the SP is incremented before pushing
and decremented after popping a value.
 By default, SP will be initialized to 07H.
 User can initialize SP to desired location.
 Depending on the initial value of the SP, 8051 stack can have different sizes.

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

DATA TRANSFER PROGRAMS


Explain different Assembler directives.
Briefly explain addressing modes.
Briefly explain different data transfer instructions with addressing modes.
Write algorithm:
1 Write an ALP to move a block of n bytes of data from source (20h) to destination (40h) using
Internal-RAM.
2 Write an ALP to move a block of n bytes of data from source (2000h) to destination (2050h)
using External RAM.
3 Write an ALP To exchange the source block starting with address 20h, (Internal RAM)
containing N (05) bytes of data with destination block starting with address 40h (Internal RAM).
4 Write an ALP to exchange the source block starting with address 10h (Internal memory),
containing n (06) bytes of data with destination block starting at location 00h (External memory).

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Name: USN:

Program No. 1.
Program: Write an ALP to move a block of n bytes of data from source (20h) to destination (40h) using
Internal-RAM.

Label Instruction Destination, Source Remarks / Comments


ORG 0000H ; Start (origin) at location
0000H (Code Memory)
MOV R0, #20H ; Initialize the source
memory pointer, load 20H
into R0
MOV R1, #40H ; Initialize the destination
memory pointer, load 40H
into R1
MOV R3, #05H ; Initialize Iteration
counter, load 05H into R3
BACK:
MOV A, @R0 ; Get the data from source
memory pointer (A)=(@R0)
MOV @R1, A ; Store the data into
destination memory pointer,
copy (A) to (@R1)
INC R0 ; Increment the source
memory pointer
INC R1 ; Increment the destination
memory pointer
DJNZ R3, BACK ; Decrement iteration count
and if it is not zero, go
to relative Address and
repeat the same process
until count become zero

HERE: SJMP HERE ; Stay in the loop


END ; End of asm source file

Faculty Signature

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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

MEMORY WINDOW:
Before execution:
D:0x20H: 22 AB 3D 44 55 00
D:0X40H: 00 00 00 00 00 00
After execution:
D:0x20H: 22 AB 3D 44 55 00
D:0X40H: 22 AB 3D 44 55 00

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Name: USN:

Program No. 2.
Program: Write an ALP to move a block of n bytes of data from source (2000h) to destination (2050h) using
External RAM.

Label Instruction Destination, Source Remarks / Comments


ORG 0000H ; Start (origin) at location
0000H (Code Memory)
MOV DPH, #20H ; Set Data Pointer High (DPH) to
20H (external memory starts at
2000H)
MOV R4, #00H ; Initialize R4 to 00H (source
address offset)
MOV R5, #50H ; Initialize R5 to 50H
(destination address offset)
MOV R6, #05H ; Set loop counter R6 to 5
(number of bytes to transfer)
BACK:
MOV DPL, R4 ; Load Data Pointer Low (DPL)
with source address offset (DPTR
= 2000H + R4)
MOVX A, @DPTR ; Read external memory byte from
(2000H + R4) into Accumulator A
MOV DPL, R5 ; Load Data Pointer Low (DPL)
with destination address offset
(DPTR = 2000H + R5)
MOVX @DPTR, A ; Write the byte from A to
external memory location (2000H
+ R5)
INC R4 ; Increment source address
offset
INC R5 ; Increment destination address
offset
DJNZ R6, BACK ; Decrement R6, repeat loop
until R6 becomes zero

HERE: SJMP HERE ; Stay in the loop


END ; End of the program

Faculty Signature

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

MEMORY WINDOW:
Before execution:
X:0x2000H: 22 AB 3D 44 55 00
X:0X2050H: 00 00 00 00 00 00
After execution:
X:0x2000H: 22 AB 3D 44 55 00
X:0X2050H: 22 AB 3D 44 55 00

Page 23 of 27

©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Name: USN:
MICROCONTROLLER LAB BECL456A

Program No. 3.
Program: Write an ALP To exchange the source block starting with address 20h, (Internal RAM) containing N
(05) bytes of data with destination block starting with address 40h (Internal RAM).

Label Instruction Destination, Source Remarks / Comments


ORG 0000H ; Set program origin at address
0000H (start of the program)
MOV R0, #20H ; Load R0 with 20H (source address)
MOV R1, #40H ; Load R1 with 40H (destination
address)
MOV R3, #05H ; Load R3 with 5 (loop counter,
number of bytes to swap)
BACK:
MOV A, @R0 ; Load the byte from memory
location pointed by R0 into
Accumulator A
XCH A, @R1 ; Exchange the value in A with the
value at memory location pointed by
R1
MOV @R0, A ; Store the exchanged value back to
the memory location pointed by R0

INC R0 ; Increment R0 to point to the next


source memory location
INC R1 ; Increment R1 to point to the next
destination memory location
DJNZ R3, BACK ; Decrement R3, repeat the loop
until R3 becomes zero

HERE: SJMP HERE ; Infinite loop (halts execution


after swapping is done)
END ; End of the program

Faculty Signature

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©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

MEMORY WINDOW:
Before execution:
D:0x20H: 22 AB 3D 44 55 00
D:0X40H: 11 CD E4 66 77 00
After execution:
D:0x20H: 11 CD E4 66 77 00
D:0X40H: 22 AB 3D 44 55 00

Page 25 of 27

©2025 PRASHAnT PATAVARDHAn All Rights Reserved [email protected]


RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

Name: USN:
MICROCONTROLLER LAB BECL456A

Program No. 4.
Program: Write an ALP to exchange the source block starting with address 10h (Internal memory),
containing n (06) bytes of data with destination block starting at location 00h (External memory).

Label Instruction Destination, Source Remarks / Comments


ORG 0000H ; Set program origin at address 0000H
(start of the program)
MOV R0, #10H ; Load R0 with 10H (internal memory
address for swapping)
MOV R1, #00H ; Load R1 with 00H (external memory
offset)
MOV R2, #06H ; Load R2 with 6 (loop counter for the
number of bytes to swap)
MOV DPH, #00H ; Load Data Pointer High (DPH) with
00H (assumes external memory starts at
0000H)
BACK:
MOV DPL, R1 ; Load Data Pointer Low (DPL) with R1
(external memory address)
MOVX A, @DPTR ; Read byte from external memory
location (0000H + R1) into Accumulator
A
XCH A, @R0 ; Exchange the value in A with the
value stored in internal memory at R0
MOVX @DPTR, A ; Write the swapped value from A back
to external memory location (0000H +
R1)
INC R0 ; Increment R0 to point to the next
internal memory location
INC R1 ; Increment R1 to point to the next
external memory location
DJNZ R2, BACK ; Decrement R2, repeat the loop until
R2 becomes zero
HERE:
SJMP HERE ; Infinite loop (halts execution after
swapping is done)
END ; End of the program

Faculty Signature
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RV INSTITUTE OF TECHNOLOGY AND MANAGEMENT®, BENGALURU
Department of Electronics and Communication Engineering

MEMORY WINDOW:
Before execution:
D:0x10H: 22 AB 3D 44 55 00
X:0X0000H: 11 CD E4 66 77 00
After execution:
D:0x10H: 11 CD E4 66 77 00
X:0X0000H: 22 AB 3D 44 55 00

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