Topic3_CH-02
Topic3_CH-02
Chapter 2
Instructions:
Language of the Computer
The Classic Components of a Computer
2
What Is Computer Architecture?
▪ Computer Architecture
▪ Instruction Set Architecture + Computer Organization
▪ Computer Organization
▪ HOW the ISA is implemented (physical view)
3
§2.1 Introduction
Instruction Set
◼ Instruction set: The vocabulary of commands
understood by a given architecture.
◼ Different computers have different
instruction sets
◼ But with many aspects in common
◼ Early computers had very simple
instruction sets
◼ Simplified implementation
◼ Many modern computers also have simple
instruction sets
Chapter 2 — Instructions: Language of the Computer — 4
Instruction Set
User Level
Interfacing
Stored-program
The idea that instructions
and data of many types
can be stored in memory
as numbers, leading to the
stored-program computer.
Hardware Level
5
The MIPS Instruction Set
◼ Used as the example throughout the course
◼ Stanford MIPS commercialized by MIPS
Technologies (www.mips.com)
◼ Typical of many modern ISAs
◼ See MIPS Reference Data tear-out card, and
Appendixes B and E
◼ Similar ISAs have a large share of embedded
core market
◼ Applications in consumer electronics, network/storage
equipment, cameras, printers, …
7
§2.2 Operations of the Computer Hardware
Arithmetic Operations
▪ Every computer must be able to perform arithmetic and
logical operations.
add a, b, c
9
Arithmetic Operations
▪ The MIPS assembly language: (a, b, and c are variables)
add a, b, c
f = ( g + h ) – ( i + j );
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Design Principles
12
Operands
Instruction Operands
Ins Des, Src1, Src2
▪ Register Operands
▪ Memory Operands
▪ Immediate Operands
▪ Constant Zero
13
§2.3 Operands of the Computer Hardware
Register Operands
◼ Arithmetic instructions use register operands
◼ MIPS has a 32 × 32-bit register file
◼ Use for frequently accessed data
◼ Numbered 0 to 31
◼ 32-bit data called a “word”
◼ The word is the natural unit of access in a computer,
usually a group of 32 bits; corresponds to the size of
a register in the MIPS architecture.
◼ Assembler names
◼ $t0, $t1, …, $t9 for temporary values
◼ $s0, $s1, …, $s7 for saved variables
Smaller is faster
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Register Operand Example
◼ C code:
f = (g + h) - (i + j);
◼ f, …, j in $s0, …, $s4
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MIPS Instructions
28
MARS simulator
▪ MARS (MIPS Assembler and Runtime Simulator): An
IDE for MIPS Assembly Language Programming
▪ Features:
▪ GUI with point-and-click control and integrated editor
▪ Easily editable register and memory values, similar to a spreadsheet
▪ Display values in hexadecimal or decimal
▪ And many others 29
MARS simulator
30
§2.4 Signed and Unsigned Numbers
Unsigned Binary Integers
◼ Given an n-bit number
n −1 n−2
x = x n−1 2 + x n−2 2 + + x1 2 + x 0 2
1 0
◼ Range: 0 to +2n – 1
◼ Example
◼ 0000 0000 0000 0000 0000 0000 0000 10112
= 0 + … + 1×23 + 0×22 +1×21 +1×20
= 0 + … + 8 + 0 + 2 + 1 = 1110
◼ Using 32 bits
◼ 0 to +4,294,967,295
◼ Example: negate +2
◼ +2 = 0000 0000 … 00102
◼ –2 = 1111 1111 … 11012 + 1
= 1111 1111 … 11102
36
§2.6 Logical Operations
Logical Operations
◼ Instructions for bitwise manipulation
Operation C Java MIPS
Shift left << << sll
Shift right >> >>> srl
Bitwise AND & & and, andi
Bitwise OR | | or, ori
Bitwise NOT ~ ~ nor
R format instruction 38
Shift Operations
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
43
§2.7 Instructions for Making Decisions
Conditional Operations
◼ Branch to a labeled instruction if a
condition is true
◼ Otherwise, continue sequentially
◼ beq rs, rt, L1
◼ if (rs == rt) branch to instruction labeled L1;
◼ bne rs, rt, L1
◼ if (rs != rt) branch to instruction labeled L1;
◼ j L1
◼ unconditional jump to instruction labeled L1
temp = a;
if ( a != b )
temp =(a+b)/2;
temp += c;
54
§2.5 Representing Instructions in the Computer
Representing Instructions
User Level
Interfacing
Hardware Level
▪ The binary digit (called binary bit), One of the two numbers
in base 2, 0 or 1, that are the components of information.
56
Representing Instructions
◼ Instructions are encoded in binary
◼ Called machine code
◼ MIPS instructions
◼ Encoded as 32-bit instruction words
◼ Small number of formats encoding operation code
(opcode), register numbers, …
◼ Register numbers
◼ $t0 – $t7 are reg’s 8 – 15
◼ $t8 – $t9 are reg’s 24 – 25
◼ $s0 – $s7 are reg’s 16 – 23
◼ Instruction fields
◼ op: operation code (opcode)
◼ rs: first source register number
◼ rt: second source register number
◼ rd: destination register number
◼ shamt: shift amount (00000 for now)
◼ funct: function code (extends opcode)
0 17 18 8 0 32
000000100011001001000000001000002 = 0232402016
A[300] = h + A[300];
1) MIPS Instructions:
A[300] = h + A[300];
2) MIPS machine code:
63
Representing Instructions (Example)
▪ Translating MIPS Assembly Language into Machine Language.
We can now take an example all the way from what the programmer writes
to what the computer executes. If $t1 has the base of the array A and $s2
corresponds to h, the assignment statement:
A[300] = h + A[300];
2) MIPS machine code:
64
Branch Addressing
◼ Branch instructions specify
◼ Opcode, two registers, target address
◼ Most branch targets are near branch
◼ Forward or backward
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
◼ PC-relative addressing
◼ Target address = PC + offset × 4
◼ PC already incremented by 4 by this time
Chapter 2 — Instructions: Language of the Computer — 65
Jump Addressing
◼ Jump (j and jal) targets could be
anywhere in text segment
◼ Encode full address in instruction
op address
6 bits 26 bits
68
§2.12 Translating and Starting a Program
Translation and Startup
Static linking
71
Stored Program Computers
The BIG Picture ◼ Instructions represented in
binary, just like data
◼ Instructions and data stored
in memory
◼ Programs can operate on
programs
◼ e.g., compilers, linkers, …
◼ Binary compatibility allows
compiled programs to work
on different computers
◼ Standardized ISAs