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CSc. Worksheet-Computer Architecture 1

The document is a practical worksheet focused on computer architecture, specifically detailing a simplified processor architecture diagram. It includes tasks such as naming the buses in the diagram and explaining the roles of various special purpose registers like the Program Counter and Memory Data Register. Additionally, it describes the fetch-decode-execute cycle in processing applications.

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0% found this document useful (0 votes)
15 views

CSc. Worksheet-Computer Architecture 1

The document is a practical worksheet focused on computer architecture, specifically detailing a simplified processor architecture diagram. It includes tasks such as naming the buses in the diagram and explaining the roles of various special purpose registers like the Program Counter and Memory Data Register. Additionally, it describes the fetch-decode-execute cycle in processing applications.

Uploaded by

afreenmullaji79
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CSc Practical Worksheet 1

A’S
Paper 1

Topic: Computer Architecture (Chapter 5)

1
Processor

Registers

System clock

B Control
unit ALU C

Main memory

The diagram above shows a simplified form of processor architecture. Name

the three buses labelled A, B and C.

A ...............................................................................................................................................

B ...............................................................................................................................................

C ...............................................................................................................................................

(b) State the role of each of the following special purpose registers used in a typical processor.

Program Counter ......................................................................................................................

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Memory Data Register ..............................................................................................................

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Current Instruction Register ......................................................................................................

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Memory Address Register ........................................................................................................

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2 Describe the procedure of fetch decode and execute with a processing application.

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