BACHELOR OF COMPUTER APPLICATION (BCA) SECOND SEMESTER MICROPROCESSOR AND COMPUTER ARCHITECTURE Dear Students, Don't limit your knowledge horizon, it’s only a reference, and you can use other resources for more knowledge Unit 1: Fundamental of Microprocessor (5 Hr: Introduction to Microprocessors, Microprocessor system with bus organization, Microprocessor architecture | and operation, 8085 Microprocessor and its operation, 8085 instruction cycle, machine cycle, T states, Addressing modes in 8085, Introduction to 8086, [Ramesh Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, Sth Edition, Reference Manual Books: 1 Ramesh Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, Sis Edition 2M. Morris Mano, Computer System Architecture, 3 Edition 3 William Stallings, Computer Organization and Architecture, 8:4 Edition (Optional) 4 William Stallings, Computer Organization and Architecture, ‘hh Edition Questions: 1. Define Microprocessor. Differentiate between Microprocessor and Microcontroller with example. Ans:~ 4 microprocessor is a multipurpose, programmable, clock-driven, register based electronic device that reads binary instructions from a storage device called memory, accepts binary data as input and processes data according to these instruction, and provides result as output. In other words, a microprocessor is the chip containing some control and logic circuits that is capable of making arithmetic and logical decisions based on input data and produces the corresponding arithmetic or logical output. ‘Microprocessor ‘Microcontroller 1__[Itis the Heart of computer system It is the Heart of embedded system 2 it is just processor, Memory and UO components have fo be connected extemally It has @ extemal processor, along with Memory and /O components 3 [Since memory and UO has to be connected externally the circuit become large. [Since memory and 1/0 are present internally, the small is circuit ‘Cannot be used in compaet systems and hence inefficient [Can be used in compact systems and hence it is inefficient technique. Tthave less number of registers, hence more ‘operation are memory based. it have more number of registers, hence the programs are easier to write ‘Mainly used in person computer. [Used Mainly used in washing machine. MP3 2. Explain microprocessor as a CPU. 1. Explain the organization of microprocessor based system with block diagram. Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com2. Explain the microprocessor architecture and its operations. OR Explain the 8085 microprocessor with its functional diagram. (eagene 16 and 17) The Intel 8085 A is a complete 8 bit parallel central processing unit, The main components of BUBSA are array of registers, the arithmetic logic unit, the encoder/decoder, and timing and control circuits linked by an internal data bus. The block diagram is shown below: qa RSTeS TP gr NTAksr 7] RST 9] S10 $00 | imterupt contro! ‘Serial VO Control ‘bit intemal Data Bus | Mattinlexor | we lz ® Taro, Reg. [Te Res 3 @ (Cc @ Dele @ Fog. __| Reg. H @|L B og | a. ‘Stack pointer (15) Taga hry Program Counter (16) TaenerterDecrerarier [—""|_Aasress Latch ‘aires Buter(@) | nay Adsrss Bur READY HOD BET nok, 10540, www.bcanotesnepal.com achatbee Assen Oat But Figure: The 8085 A microprocessor Functional Block Diagram. 4: ALU: The arithmetic logic unit performs the computing functions, it includes the accumulator, the temporary register, the arithmetic and logic circuits and five flags. The temporary register is used to hold data during an arithmetic/logic operation. The result is stored in the accumulator; the flags (flip-flops) are set or reset according to the result of the operation. 2. Accumulator (register A): It is an 8 bit register that is the part of ALU. This register is used to store the §-bit data and to perform arithmetic and logic operations and 8085 microprocessor is called accumulator based microprocessor. When data is read from input port, itis first moved to accumulator and when data is sent to output port, it must be first placed in accumulator. 3. Temporary registers (W & Z): They are 8 bit registers not accessible to the programmer. During program execution, 8085A places the data into it for a brief period. fer (IR): It is a 8 bit register not accessible to the programmer. It receives the operation codes of instruction from intemal data bus and passes to the instruction decoder which decodes so that microprocessor knows which type of operation is to be performed 4, Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comRegister Array: (Scratch pad registers B, C, D, E}: It is a § bit register accessible to the programmers. Data can be stored upon it during program execution. These can be used individually as 8-bit registers or in pair BC, DE as 16 bit registers. The data can be direcily added or transferred from one to another. Their contents may be incremented or decremented and combined logically with the content of the accumulator. & Register H & L: They are 8 bit registers that can be used in same manner as scratch pad registers. ‘www.beanotesnepal.com 4% Stack Pointer (SP): Itis a 16 bit register used as a memory pointer. It points to a memory location in RW memory, called the stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer. % Program Counter (PC): Microprocessor uses the PC register to sequence the execution of the instructions. The function of PC is to point to the memory address from which the next byte is to be fetched. When a byte is being fetched, the PC is incremented by one to point to the next memory location. Flag register: Register consists of five flip-flops, each holding the status of different states separately is known as flag register and each flip-flop are called flags, 8085A can set or reset one or more of the flags and are sign(S), Zero (2), Auxiliary Carry (AC) and Parity (P) and Carry (CY). The state of flags indicates the result of arithmetic and logical operations, which in tum can be used for decision making processes. The different flags are described as: 4 Carry (CY): If the last operation generates a carry its status will 1 otherwise 0. Tt can handle the carry or borrow from one word to another. 4% Zero (Z): Ii the result of last operation is zero, its status will be 1 otherwise 0. It is often used in loop control and in searching for particular data value. 4% Sign (S): If the most significant bit (MSB) of the result of the last operation is 1 (negative), then its status will be 1 otherwise 0. 4 Parity (B): If the result of the last operation has even number of 1's (even parity), its status will be 1 otherwise 0. www bcanotosnepal.com % Auxiliary carry (AC): If the last operation generates a carry from the lower half word (lower nibble) its status will be 1 otherwise 0. Used for performing BCD arithmetic. Its bit position is shown in the following diagram: br | De | D5 | Ds | ps | D2 | pi | Do s iz : ren ea ie Ee [Or Timing and Control Unit: This unit synchronizes all the microprocessor operations with the clock and generates the control signals necessary for communication between the microprocessor and peripherals. The control signals are similar to the sync pulse in an oscilloscope. The RD and WR signals are sync pulses indicating the availability of data on the data bus, Interrupt controls: The various interrupt controls signals (INTR, RST 5. 5, RST 6. 5, RST 7. 5 and TRAP) are used to interrupt a microprocessor. Serial HO controls: Two serial 1/O control signals (SID and SOD) are used to implement the serial data transmission. (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com3. Explain the bus architecture of 8085 microprocessor Pszenc 31 & 32) Bus is a group of conducting wires which carries information. All the peripherals are connected to microprocessor through bus. Diagram given below represents the bus organization system of 8085 Microprocessor. Figure _ + Bus organization of 8083 Microprocessor ‘There are three types of buses. Address Bus Itis a group of conducting wires which carries address only. Address bus is unidirectional because data flow in one direction, from microprocessor to memory or from microprocessor to Input/output devices (That is, Out of Microprocessor). www.bcanotesnepal.com Length of Address Bus of 8085 microprocessor is 16 Bit (That is, Four Hexadecimal Digits), ranging from 0000 H to FFFF H, (H denotes Hexadecimal). The microprocessor 8085 can transfer maximum 16 bit address which means it can address 65, 536 different memory location. The Length of the address bus determines the amount of memory a system can address. Such as a system with a 32-bit address bus can address 2 memory locations. If each memory location holds one byte, the addressable memory space is 4 GB. However, the actual emount of memory that can be accessed is usually much less than this theoretical limit due to chipset and motherboard limitations. Data Bus Itisa group of conducting wires which carries data only. Data bus is bidirectional because data flow in both directions, from microprocessor to memory or Input/Output devices and from memory or Input/Output devices to microprocessor. yyw. beanotesnepal.com Length of Data Bus of 8085 microprocessor is 8 Bit (That is, two Hexadecimal Digits), ranging from 00 H to FF HL. (Hf denotes Hexadecimal). When it is write operation, the processor will put the data (to be written) on the data bus, when itis read operation, the memory controller will get the data from specific memory block and put it into the data bus. The width of the data bus is directly related to the largest number that the bus can carry, such as an 8 bit bus can represent 2* unique values, this equates to the number 0 to 255. A 16 bit bus can carry 0 to 65535. Control Bus Itis a group of conducting wires, which is used to generate timing and control signals to control all the associated peripherals. Microprocessor uses control bus to process data, that is what to do with selected memory location. Some control signals are: 3 Memory read Memory write % 1/Oread % 110 Write 3 Opcode fetch (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com4. Explain the 8085 microprocessor signals with block diagram. www.beanotesnepal.com 5. Explain the opcode fetch and memory read machine cycles for MVIA, 48H with timing for execution diagram. www.bcanotesnepal.com 6. Define Computer Architecture? Different between Computer architecture and Computer Organization. Ans: - Computer architecture is a design principle that describes the functionality organization and implementation of computer system Computer Architecture ‘Computer organization i) ii) Tt abstract model and are those attributes that are visible to programmer like instructions sets, no of bits used for data, addressing techniques For eg:- 2 company that manufactures cars, design and all low-level details of the car come under computer architecture (abstract, programmers view) Tt expresses the realization of the architecture or how features are implemented like these registers sthose data paths or this connection to memory. contents of CO are ALU, CPU and memory and memory organizations ii) while making i's parts piece by piece and ‘conneeting together the different components of that car by keeping the basic design in mind ‘comes under computer organization (physical and visible) www.beanotesnepal.com Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com7. Explain the 8085 microprocessor addressing modes with example. tease 20222324) Ans :- The different ways in which a processor can access deta are referred as its addressing mode. In assembly language statements, The addressing mode is incicatedin the instructional. The various acdressing moce are Register Addressing Mode Rezister Indirect Adds i) Immediate Addressing Mode. V. implied Addressing Mode il) Direct Addressing Mode. 1. Register Addressing Mode # _Itis the most common form of data addressing. $_ Transfers a copy of a byto/word from source register to destination register. Instruction T Source Destination’ | MOV AB Register B Register A | Teis carried out with 5 bitregistes ABCD.EH &L It is important to use registers of same size, Never mix an 8 bit register with a 16 bit register ic. MOV ASP EXAMPLES: MOVAB —:CopysB into MOV SP, H+ Copys Hpair into SP 2. Immediate Addressing Mode %¢ The term immediate implies that the data immediately follow the hexadecimal opcode in the Mode x8 x memory. Note that immediate data are constant data. 2 _ It transfers the source immediate byte/word of data in destination register or memory location. Instruction Source Destination MVIC3AH Data 3AH Register C EXAMPLES MOV A,S0 Copys 90 into A LXTH,1234H = Copys 1234H into H 3. Direct Addressing Mode 2 tn this scheme, the address of the data is defined in the instruction Instruction Source Destination I LDA 2000H __|__Memory Location 20001 Register A EXAMPLES LHILD 1000F! + Copies the content of 1D00H address memory to L and 10001H memory to H. LDA200011 _: Copies the content of 2000H memory to accumulator JMP 40008 Call SOOOEL www.beanotesnepal.com 4, Register Indirect Addressing Mode S¢ Register indirect addressing allows data to be addressed at any memory location through an address held in any of the H pair, B pair and D pair registers. 3¢__ Ittransfers byte/word between a register and a memory location addressed. Instruction Source Destination MOV CM ‘Assume HL =1000H and Mis Register C the content of 1000 H address EXAMPLES = MOVG,M Copies the word contents of the memory location addressed by HIL pair into C STAXB Copies A into the memory location addressed by B pair JMP 4000H Call 30008 5. Implied Addressing Mode 2€ The addressing mode of certain instructions is implied by tho instruction’s function. Tnstruction. Source Destination ste cay Fis EXAMPLES sTC Set carry flag, s enc eerie oe DAA Decimal adjust accumulator content Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com8 Define Interrupt. Explain the types of Interrupt. Ans:- Interruptare the signal generated by the external device to request the microprocessor to perform a task. @ There are 5 types of interrupt signal ie. TRAP.RST 7.5,RST65, RSTS.5 and INTR. Interrupt are classified into following group based on their parameter. vector interrupt::~ In this type of interrupt the interrupt address is known to processor. Eg. RST7.5, RST6.5, RSTS.5 & TRAP. (ii) Non-Vector interrupt: \n this type of interrupt the internupt address is not known to processor. Eg, INRT (iii) Maskable Interrupt:- In this types of interrupt we can disable the interrupt by writing some instruction into the program Eg. RST 7.5,RST6.5, RSTS.5 (iy) Non-Maskable Interrupt:- In this types of interrupt we can not be disable the interrupt by writing some instruction into the program Eg. TRAP. (>) Software interrupt: In this type of interrupt the programmable has to add the instruetion into the program to executed the interrupt. There are 8. software interrupt in 8085,ie. RSTORST1, RST2, RST3, RST4, RSTS, RST6, & RST7 (i) Hardware interrupt: There are 5 interrupt pin in 8085 used as hardware interrupt ie TRAP,RST7.5, RST6.5, RSTS.5, INTA 9. list the features of 8086 microprocessor with its block diagram. Ans- The Feature of /— 8086 Microprocessors are... Cie) (i) 16 bit microprocessor = see —S es Gi) 20 bit address bus and 16 bit = | eats internal data bus. 4 * es (iii) 4 general purpose registers = > AX, BX, CX and DX that <= | [ea es store 16 bit each. (iv) segmented memory with = each segment having 64KB store capacity ys | (v) 4 segments register, \ Sa / (vi) 9 flag, ——— www.bcanotesnepal.com 10. 8086 Microprocessor Block Diagram 11, Write short notes on: Control and Status Signals, :- These signals include two control signals (RD & WR) three status signals (IO/M, S1 and S0) to identify the nature of the operation and one special signal (ALE) to indicate the beginning of the operations. # ALE (output) - Address Latch Enable. This signal helps to capture the lower order address presented on the multiplexed address / data bus. When it is the pulse, 8085 begins an operation. It generates ADO - AD7 as the separate set of address lines AO-A7. % _ RD (active low) - Read memory or IO device. This indicates that the selected memory location or I/O device is to be read and thet the data bus is ready for accepting data from the memory or V/O device. www.bcanotesnepal.com (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com38 WR (active low) - Write memory or IO device. This indicates that the data on the data bus is to be written into the selected memory location or /O device. IO/M (output - Select memory or an IO device. This status signal indicates that the read / write operation relates to whether the memory or V/O device. It goes high to indicate an 1/10 operation. It goes low for memory operations. Tor 1 Ss States 0 ° 1 ‘Memory Write 0 a ° Memory read 1 ° 1 VO write a 1 ° UO read o 1 1 Opcode fetch Hloas, www.beanotesnepal.com Instruction Cycle The necessary steps that the CPU carries out to fetch an instruction and necessary data from the memory and to execute it constitute an instruction cycle. Moreover, it is defined as the time required to complete the éxecution of an instruction. An instruction cycle consists of fetch cycle and execute cycle. In fetch cycle CPU fetches opcode from the memory. The necessary steps which are carried out to feich an opcode from memory constitute a fetch cycle. The necessary steps which are carried out to get data if any from the memory and to perform the specific operation specified in an instruction constitute an execute cycle. The total time required to execute an instruction is given by IC = Fc + Ec. The 8085 consists of 1-6 machine cycles or operations. Instruction ee (1) = Feteh cycle (FC) + Execute Cycle (EC) 1, Zea doped eet. pa a, Fetch eyle FC) | rene Gy (EO) Instruction Gyle C= FC + EC) Figure: Timing diagram of instruction cycle Machine Cyc “= Machine cyele is define as the time required to complete one operation of accessing memory ip ,0/p ot acknowledging and extemal request. This cycle may consists of 3 to 6 T state. TStates - T-state is define as one sub division of the operation performed in one clock period. These sub division are internal states synchronized with system clock and each state precisely equal to one clock (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comperiod. Each of these operation performs a specific function some machine eycle are apeode fetch MC. | (47) Memory Read MC. (3T). 1/0 read MC(T3),1/0 write MC(T3), Interrupt MC (TC). Unit 2: Introduction to Assembly Lanquage Programming (10 Hrs.) | Assembly Language Programming Basics, Classifications of Instructions and Addressing Mode, 8085 Instruction Sets, Assembling, Fxecuting and debugging the Programs, Developing Counters and Time Delay Routines, Interfacing Concepis. | [Ramesh Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, Sth Edition, Questions solving : www.beanotesnepal.com 1. Define Assembling. Explain the merits and demerits of Assembly Language Programming/rage nos2as3) | % Assombly Language uses two, three or 4 letter mnemonic store present each instruction type. 3 Low level Assembly Language is designed for a specific family of Processors: the symbolic instruction directly relate to Machine Language instructions one for one and are assembled into | machine language | % To make programming easier, many programmers write programs in assembly language 3% They then translate Assembly Language program to machine language so that it can be loaded | into memory and run. Advantages of Assembly Language % A Program written in Assembly Language requires considerably less Memory and execution | time than that of High Level Language. % Assembly Language gives a programmer the ability to perform highly technical tasks. | Resident Programs (that resides in memory while other programs execute) and Interrupt Service Routine (that handles I/P and OP) are almost always developed in Assembly Language. % Provides more control over handling particular H/W requirements. % Generates smaller and compact executable modules. | % Results in faster execution 2. Explain the 8085 Programming model. www.beanotesnepal.com 3. Classify the 8085 Instruction Set with example. Instruction Set of 6085 | ‘An instruction is a binary pattem designed inside a microprocessor to perform a specific function. The entire group of instructions that a microprocessor supportsis called Instruction Set. £8085 has 246 instructions. Each instruction is represented by an 8-bit binary velue. These &-bits of binary value is called Op-Code or instruction Byte. Clossification of instruction Set *Data Transfer Instruction (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com‘Arithmetic Instructions “Logical Instructions “Branching Instructions +Control instructions Explain in 8085 details Pdf file ma xa 4, Write short notes on: Instruction word size, Data format www.beanotesnepal.com Unit 3: Basic Computer Architecture (4 Hrs.) Introduction: History of computer architecture, [William Stallings, Computer Organization and Architecture, 9th Edition, Part - One, Chapter 2: “Computer Evolution and Performance”] Overview of computer organization, [William Stallings, Computer Organization and Architecture, 9th Edition, Part — One, Chapter 1: “Introduction”] | Memory hierarchy and Cache, [William Stallings, Computer Organization and Architecture, 9th Edition, Part - Two, Chapter 4: “Cache Memory”] Organization of hard disk, [William Stallings, Computer Organization and Architecture, 9th Edit ~ Two, Chapter 6: “External Memory”, 6.1: Magnetic Disk] Mano, Computer System Architecture, 3rd Fi yn, Part jon, Chapter Twelve: “Memory | Instruction Codes: Stored Program Organization, Indirect address, Computer Registers, Common Bus systems, Instruction set, Timing and Control, Instruction Cycle. IM. Morris Mano, Computer System Architecture, 3rd Edition, Chapter Five: “Basie Computer Organization and Design” from 5-1 to 5-5]. Questions solving 1. Explain the fle of John Von Neumann in development of computer. (Page no S& 6) Ans:-There are two types of digital computer architures that describe the functional and implemention of computer system. One is the Jhon Von Neumann Arctecture that was designed by the renowned physicst and mathematician Jhon Von Neumann in the 1940s. and the other one is the Harvard architure which was based on the original Harvared Marl ~ | realy- based computer which employed separate memory system to store data and instructions. Jhon Von Neumann was a theoretical designed based on the concept of stored- program computer where program data and instruction data are stored in the same memory. tit Dodge Yoana Nee Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comThe architecture was designed by the renowned mathematician and physicist John Von Neumann in 1945. Until the Von Neumann concept of computer design, computing machines were designed for ¢ single predetermined purpose that would lack sophistication because of the manual rewiring of circu y www.bcanotesnepal.com The idea behind the Von Neumann architectures is the ability to store instructions in the memory along with the data on which the instructions operate. In short, the Von Neumann architecture refers to a general framework that a computer's hardware, programming, and data should follow. The Von Neumann architecture consists of three distinct components: a central processing unit (CPU), memory unit, and input/output (I/O) interfaces. The CPU is the heart of the computer system that consists of three main components: the Arithmetic and Logic Unit (ALU), the control unit (CU), and registers. The ALU is responsible for carrying out all arithmetic and logic operations on data, whereas the control unit determines the order of flow of instructions that need to be executed in programs by issuing control signals to the hardware. ‘The registers are basically temporary storage locations that store addresses of the instructions that need to be executed. The memory unit consist of RAM, which is the main memory used to store program data and instructions. The 1/O interfaces allows the users to communicate with the outside ‘world such as storage devices. 2. Explain the Memory Hierarchy with diagram. Levels of The Memory Hierarchy Ans In computer architecture, the memory hierarchy et mui separates computer storage into a hierarchy based on rn. = " response time, Since response time, complexity, and. capacity are related, the levels may also be distinguished by their performance and controlling technologies. 3. Explain the elements of cache design. 4, Explain the internal structure of Hard Disk. «Hard drives are usually devices that can be used for storing data and to retrieve it. They are composed of one or more than one rigid disc that rapidly rotates - Hard disks in them contain various components such as Platter, Spindle, Actualor, power coanccior, Jumper block, IDE connector etc. = In the inside of a hard disk there is the spindle which is used to hold circular magnetic disks also known as platters. They are usually made up of a non magnetic material, ~ These platersare sun at speeds inexcessof4000 RPM, nowadays 7200 RPM based hard disks are commen enough, am asseroy slater = The read and write heads work on these spinning platers 1o read a and write data, They are controlled by an actuator arm that =O” prevents any esror. (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com5. Explain the concept of Stored Program Organization. (rs. 154 Stored Program Organization The simplest way to organize a computer is to have one processor register and an instruction code format with two parts. The first part specifies the operation to be performed and the second specifies an address and the memory address tells the control where to find an operand in memory. This operand is read from memory and used as the data to be operated on together with the data stored in the processor register. The following figure 4.3 shows this type of organization. Momory 4096 x 16 15 1211 ° Instructions | Opcode Address (Program) | Instructional format 5 o Operands Binary Operand sack [Process register] www.beanotesnepal.com (ach Figure _ : Stored Program Organization Instructions are stored in one section of memory and data in another. For a memory unit with 4096 words, we need 12 bits to specify an address since 2 = 4096. If we store each instruction code in one 16-bit memory word, we have available four bits for operation code (abbreviated op code) to specify, one out of 16 possible operations, and 12 bits to specify the address of an operand. The control reads a 16-bit instruction from the program portion of memory. It uses the 12-bit address part of the instruction to read a 16-bit operand from the data portion of memory. It then executes the operation specified by the operation code. Computers that have a single-processor register usually assign to it the name accumulator and label it AC. If an operation in an instruction code does not need an operand from memory, the rest of the bits in the instruction can be used for other purposes. For example, operations such as clear AC, complement AC, and increment AC operate on data stored in the AC register. They do not need an operand from memory. For these types of operations, the second part of the instruction code (bits 0 through 11) is not needed for specifying a memory address and can be used to specify other operations for the computer. 6. Demonstrate the theory of direct and indirect address with instruction format diagrams. (r2154,155) Ans:- These parts of an instruction formate specifies the address of an operand, the instruction is said to have a direct address .In indirect address, bits in the second parts of the instruction designate an www.bcanotesnepal Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comadress of a memory word in which the address of the operand is found. One bit of the instruction code can be used to distinguish between a direct and an indirect address. It consists of a 3-bit operation code, a 12-bit address, and an indirect address mode bit designated by I where, the mode bit is 0 for a direct address and 1 for an indirect address. A direct address instruction is shown in Figure It is placed in address 22 in memory. The | bit is 0, so the instruction is recognized as a direct address instruction. The op code specifies an ADD instruction, and the address part is the binary equivalent of 457. The control finds the operand in memory at address 457 and adds it to the content of AC. ‘The instruction in address 35 shown in Figure has a mode bit | = 1, recognized as an indirect ‘address instruction. The address part is the binary equivalent of300. The control goes to address 300 to find the address of the operand. The address of the operand in this case is 1350. The operand found in address 1350 is then added to the content of AC. The indirect address instruction needs two references to memory to fetch an operand. = The first reference is needed to read the address of the operand + Second reference is for the operand itself. ‘The memory word that holds the address of the operan: a pointer to an array of data. an indirect address instruction is used as 487 ‘Operand 1350 Operand leo eee er | | | | | www.bcanotesnepal.com | eee | Peas eee a eae | A | E Memory ~ (b) Direct adcress (6) Indirect address Figure Direct and indirect advertising of « basic computer 7. Define registers. Explain the basic computer registers with their uses. (157) Ans:- Register is the high speed memory device used for storing data during instruction execution . Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comIt is necessary to provide a register in the control unit for storing the instruction code after it isread. from memory. The computer needs processor registers for manipulating data and a register for holding a memory address. These requirements dictate the register configuration shown in Figure Memory 4096x 16 Figure “The data register (DR) holds the operand read from memory and the accumulator (AC) register is a general purpose processing register. The instruction read from memory is placed in the instruction register (IR). The temporary register (TR) is used for holding temporary data during the processing. The function of AR is to store the memory address, : Basic Computer Register and Memory ‘The memory address register (AR) has 12bits and the program counter (PC) also has 12 bits and it holds the address of the next instruction to be read from memory after the current instruction is executed. Instruction words are read and executed in sequence unless a branch instruction is encountered. A branch instruction calls for a transfer to a non consecutive instruction in the program. Two registers are used for input and output. The input register (INPR) receives an 8- bit character from an input device. The output register (OUTR) holds an 8-bit character for an output device. 8. Define Bus System. Explain the bus system construction mechanisms using Multiplexers and Three - state buffer gates. www.beanotesnepal.com 9. Explain the instruction set design issues. 10. Explain the structure of control unit of basic computer. 11. Define Instruction cycle. Expiain the instruction cycle with state diagram. (#152268) Ans :-Jnstruction eyele:- the necessary step that the CPU carries out to fetch an instruction and necessary data from the memory and to execute it constitute an instruction eycle . Moreover it is defined as the time required to complete the execution of an instruction . an instruction cycle consists of fetch cycle and execute cycle, (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com«A program residing in the memory unit of the computer consists of a sequence of instructions. In the basic computer each instruction cycle consists of the following phases: Fetch an instruction from memory. = Decode the instruction. = Read the effective address from memory if the instruction has an indirect address. = Execute the instruction . After step 4, the control goes back to step 1 to fetch, decode and execute the next instruction. This process continues unless a HALT instruction is encountered. To : AR#PC nh 3 IR « M[AR], PC; a> *S, BUS > >| Memory unit, «= -_-——47 ‘address Read AR. ai > 1D : PC. 2 1" wD + Clock Figure: Register transfer for the fetch phase www.beanotesnepal.com (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com‘As shown in the above figure: © When To=1, s251 50= 010: PC geis the bus, AR gets load signal and finally the contents of bus (PC) is loaded to AR. * When T-1, s1si so= 111: Memory unit gets the bus, IR gets load signal and finally the content of memory is transferred to IR. Also PC gets INR signal and hence incremented by 1. = When Tz = 1:12-14 bits of IR is decoded, 0-11 bits of IR are transferred to AR and 15 bit of IR is transferred to flag L Decode Opcode in IR (12 - 14), AR © IR (0-11), le IR (15) x www.bcanotesnepal.com (Register or 0) =10 4 = 0 (Memory-reference) 07 > eee Undret) = 1 7, = 0 imc =1_ 7X = 0 ireoiaton rect) = 1 \. =O ire Hee tS fy ] SY {paren ero Poeptacny Wena aecey Beier) Execute Execute AR <—MIAR] input-output register-reference = inetruction instruction y yet sc+o sc+o Execute Unit 4: Micro programmed Control (10 Hrs.) Basic Design of Accumulator: Control of AC register, ALU organization, IM. Morris Mano, Computer System Architecture, 3rd Edition, Chapter Five: “Basic Computer Organization and Design” from 5-10]. Control Memory, Address Sequencing: Conditional Branching, Mapping of Instruction, Subroutines, Microprogram: Symbolic Microprogram, Binary Microprogram, Design of Control Unit, Basic requirement of Control Unit, Structure of Control Unit, Microprogram Sequenc IM. Morris Mano, Computer System Architecture, 3rd Edi Control” from 7-1 to 7-4]. [William Stallings, Computer Organization and Architecture, 8th Edition, Part — Four, Chapter 15 & 161. n, Chapter Seven: “Micro programmed Questions solving (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com1. Explain the Design procedure of Accumulator Logic. Ans: 2. Explain the Gate structure for controlling the LD, INR, and CLR of Accumulator. Ans: 3. Explain the components of ALU with their functions. Ans: www.bcanotesnepal.com 4, Define the Control Unit. Explain the organization of Micro programmed Control unit. Ans: 5. Differentiate between Hardwired and Micro programmed Control Design. Ans: 6. Explain the address sequencing procedure. Ans:- 7. Explain the conditional branching mechanism. Ans: 8. What do you meen by mapping of instructions? Explain the procedure for mapping from instruction code to microinstruction address. ‘Ans:- 9. Define Micro program. ip. 120) Micro program + A sequence of microinstructions constitutes a microprogram. 4 Since alterations of the microprogram are not needed once the control unit is in operation, the control memory can bea read-only memory (ROM). 4 ROMwords are made permanent during the hardware production of the unit. 4 The use of a micro program involves placing all control variables in words of ROM for use by the control unit through successive read operations. + The content of the word in ROM at a given address specifies a microinstruction, 10. Differentiate between Symbolic and Binary micro program with example. (199 ‘Ans:- 11. Explain the basic requirements for designing control unit. Ans:- 12. Explain the structure of Control Unit. Ans:- 13. Write the role of micro program sequencer in micro programmed control unit.’ ‘Ans:- (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com| Unit 5: Central Processing Unit (10 Hrs.) General Register Organization: Contral Word, Stack Organization, Instruction formats, addressing modes. 5 Data Transfer and Manipulation: Data transfer instructions, Data manipulation instructions, Arithmetic instructions, Logical and Bit Manipulation Instructions, Shift Instructions. Program Control: Status Bit Conditions, Conditional Branch Instructions, Subroutine Call and Return, Program Interrupt, Types of interrupt. IM. Morris Mano, Computer System Architecture, 3rd Edition, Chapter Eight: “Central Processing Unit” from 8-1 108-8]. Questions solving = www.beanotesnepal.com 1. Explain the Register set with common ALU. Ans:- 2. Explain the general register organization Ans:- 3. Define control word. Explain the procedure for determining control word for specific operation. ‘Ans:- 4. Define stack ‘Ans:- A stackis a storage device that be store information in such a manner that the item stored last is the first item retrieved . The stack in digital computer is essentially a memory unit with an address register that can count only. The register that hold the address for the stack is called a stack pointer. Because its value always points at the top itemin the stack . The physical register of a stack are always available for reading or writing, Itis the content of n the word that is inverted or deleted. 5. Explain the stack organization. Ans: 6. Explain the different instruction formats with examples. Ans:- 7. Explain the different types of instruction addressing modes. Ans:- 8. Explain the different Data Transfer and Manipulation instruction www.beanotesnepal.com Once visit on here for Get Everything Related to BCA www.bcanotesnepal.comData transfer instructions move data from one place ‘in the computer to another without changing the data content. The most common transfers are between memory and processor registers, between processor registers and input or output, and between the processor registers themselves. The load instruction has been used mostly to designate a transfer from memory to a processor register, usually fan accumulator and the store instruction designates a transfer from a processor register into ‘memory, The move instruction has been used in computers with multiple CPU registers to designate a transfer from one register to another. It has also been used for data transfers between CPU registers land memory or between two memory words. The exchange instruction swaps information between, two registers or a register and a memory word. The input and output instructions transfer data among processor registers and input or output terminals and the pus and pop instructions transfer data between processor registers and a memory stack. Name Mnemonic Load LD Store sT Move MOV Exchange XCH Input IN www.bcanotesnepal.com Output OUT Push PUSH Pop PoP Data Transfer Instructions Typical data transfer instruction Load LD Data transfer instructions with different addressing modes Mode ‘Assembly Convention Register Transfer Direct address LD ADR ‘AC © MIADR] Indirect address LD @ADR AC B BHE Branch if higher or equal A >B. BLO Branch if lower AB BLOE Branch if lower or equal A B BGE Branch if greater or equal A >B BLT Branch if less than AB BLE Branch ifless or equal A i mle SS oeeN Ie Add oo Je} |. Subtract rfale . Branch to X 1jAa o + No-operation | rar m No-operation 1[Ale elalalalalely | Instruction in X tjalz Using no-operation instructions race Tale praca rfatet_tt 4, Nepce t T ALE ‘www.bcanotesnepal.cc shad Tale —— meals aaa T triste Rearranging the instructions 8. Define vector processing, Explain the application areas of vector processing. Ans:- Vector Processing 0 There is a class of computational problems that are beyond the capabilities of the conventional computer. 1 These are characterized by the fact that they require vast number of computation and it take a conventional computer days or even weeks to complete 1 Computers with vector processing are able to handle such instruction and they have application in following fields: (0 Long range weather forecasting ( Petroleum exploration 1 Seismic data analysis ( Medical diagnosis ( Aerodynamics and space simulation Artificial Intelligence and expert system ( Mapping the human genome [7 Image Processing 9. Explain the characteristics of multiprocessor system. Ans:- www.bcanotesnepal.com 10. Explain the interconnection structure of multiprocessor system. Ans:- 11 Write short notes on: Arithmetic pipeline, vector operations, matrix multiplications. (Once visit on here for Get Everything Related to BCA www.bcanotesnepal.com