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CSE2105 Lecture15 Chapter4 Part4

The document provides an overview of digital circuits including decoders, encoders, and demultiplexers, explaining their functions and examples such as the 2-to-4 and 3-to-8 line decoders. It also discusses the implementation of Boolean functions using these circuits and introduces priority encoders that handle multiple active inputs. Additionally, it includes practice problems for designing combinational circuits using decoders and multiplexers.
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0% found this document useful (0 votes)
19 views23 pages

CSE2105 Lecture15 Chapter4 Part4

The document provides an overview of digital circuits including decoders, encoders, and demultiplexers, explaining their functions and examples such as the 2-to-4 and 3-to-8 line decoders. It also discusses the implementation of Boolean functions using these circuits and introduces priority encoders that handle multiple active inputs. Additionally, it includes practice problems for designing combinational circuits using decoders and multiplexers.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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DECODER, ENCODER, PRIORITY

ENCODER, DEMULTIPLEXER
DECODERS

 A decoder is a combinational circuit that converts


binary information from n input lines to a
maximum of 2n unique output lines.
DECODERS
Only one
 Extract “Information” from the code lamp will
 Binary Decoder
turn on

 Example: 2-to-4 Line Decoder


2 X 4 Binary

Y3 1
1
I1 Y2 0
Decoder

Y1 0
1
I0 Y0 0
DECODERS
Y3
 2-to-4 Line Decoder
Y2
Decoder Y3
I1
Binary

Y2 Y1
Y1
I0 Y0 Y0

I1 I0 Y3 Y2 Y1 Y0
I1
0 0 0 0 0 1 I0
0 1 0 0 1 0
Y3 = I1 I 0 Y2 = I1 I 0
1 0 0 1 0 0
1 1 1 0 0 0 Y1 = I1 I 0 Y0 = I1 I 0
3-TO-8 LINE DECODER
Y7
Y6

3 X8 Binary
Y5
I2 Y4
Decoder
Truth table:
I1 Y3
I0 Y2 I2 I1 I0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
Y1 0 0 0 0 0 0 0 0 0 0 1
Y0 0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 0 0 0 0
1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0
Y7 = I 2 I1 I 0

Y6 = I 2 I1 I 0

Y5 = I 2 I1 I 0

Y4 = I 2 I1 I 0

Y3 = I 2 I1 I 0

Y2 = I 2 I1 I 0

Y1 = I 2 I1 I 0

Y0 = I 2 I1 I 0

I2
I1
I0

Fig: 3X8 decoder


DECODERS
Y3
 “Enable” Control
Y3 Y2
I1 Decoder
Binary
Y2
I0 Y1 Y1
E Y0
Y0
E I1 I0 Y3 Y2 Y1 Y 0
0 x x 0 0 0 0 I1
1 0 0 0 0 0 1 I0
E
1 0 1 0 0 1 0
1 1 0 0 1 0 0
1 1 1 1 0 0 0
DECODERS
 Active-High / Active-Low
I1 I0 Y 3 Y 2 Y 1 Y 0 I1 I0 Y 3 Y 2 Y 1 Y 0
0 0 0 0 0 1 0 0 1 1 1 0
0 1 0 0 1 0 0 1 1 1 0 1
1 0 0 1 0 0 1 0 1 0 1 1
1 1 1 0 0 0 1 1 0 1 1 1

Y3 Y3
Decoder

I1 I1 Decoder
Binary
Binary

Y2 Y2
Y1 Y1
I0 Y0 I0 Y0
DECODERS
DESIGN A 3X8 LINE DECODER USING TWO 2X4 DECODERS
I2 I1 I0

 Expansion

2X4 Binary
I 2 I1 I0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Y3 Y7
I0 Y2 Y6

Decoder
0 0 0 0 0 0 0 0 0 0 1 I1 Y1 Y5
0 0 1 0 0 0 0 0 0 1 0 E Y4
Y0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0

2X 4 Binary
1 0 0 0 0 0 1 0 0 0 0 Y3 Y3
I0 Y2 Y2

Decoder
1 0 1 0 0 1 0 0 0 0 0
I1 Y1 Y1
1 1 0 0 1 0 0 0 0 0 0
E Y0 Y0
1 1 1 1 0 0 0 0 0 0 0
BOOLEAN FUNCTION IMPLEMENTATION USING
DECODERS
 Design and implement F= (3,5,6,7) using a 3-to-8
decoder.
Truth Table:

ABC F
000 0
0
001 0 A 1

3X8 Decoder
010 0 2
B 3
011 1 4 F
100 0 5
C 6
101 1 7
110 1
111 1
BOOLEAN FUNCTION IMPLEMENTATION USING DECODERS

3 X8
Binary
 Each output is a minterm Decoder

 All minterms are produced Y7


 Sum the required minterms Y6
Y5
x I2 Y4
Example: Full Adder y I1 Y3
S(x, y, z) = ∑(1, 2, 4, 7) z I0 Y2
C(x, y, z) = ∑(3, 5, 6, 7) Y1
Y0

S C 12 / 65
ENCODERS
 Does reverse operation to decoder
 An encoder has 2n (or fewer) input lines and n
output lines
 Constraint – only one input is active at a time

 Example: 4X2, 8X3,16X4, 512X9 encoder etc


ENCODERS I7
 Octal-to-Binary Encoder (8-to-3) I6
I5

Encoder
I7 I6 I5 I4 I3 I2 I1 I0 Y 2 Y 1 Y 0 Y2

Binary
I4

8X3
0 0 0 0 0 0 0 1 0 0 0 Y1
I3 Y0
0 0 0 0 0 0 1 0 0 0 1
I2
0 0 0 0 0 1 0 0 0 1 0
I1
0 0 0 0 1 0 0 0 0 1 1
I0
0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
I7
0 1 0 0 0 0 0 0 1 1 0 I6 Y2
1 0 0 0 0 0 0 0 1 1 1 I5
I4
Y2 = I 7 + I 6 + I 5 + I 4 I3
I2
Y1

Y1 = I 7 + I 6 + I 3 + I 2 I1
I0 Y0
Y0 = I 7 + I 5 + I 3 + I1
PRIORITY ENCODERS
 Encoder with priority function
 Multiple inputs may be true simultaneously
 Higher priority input gets the precedence
PRIORITY ENCODERS
 4-Input Priority Encoder I3

Encoder
Priority
I2 Y1
I3 I2 I1 I0 Y1 Y0 I1 Y0
0 0 0 0 x x I0
0 0 0 1 0 0
0 0 1 x 0 1
0 1 x x 1 0
1 x x x 1 1

Y1 = I 3 + I 3 I 2 = I 3 + I 2
Y0 = I 3 + I 3 I 2 I1 = I 3 + I 2 I1
DEMULTIPLEXERS
 A circuit receives information from a single line
and directs it to one of 2n possible output lines.
 The selection of a specific output line is controlled
by the bit values of n selection lines.

S1 S0 Y3 Y2 Y1 Y0
Y3
1X4 Y2 0 0 0 0 0 I
I
DeMUX Y1 0 1 0 0 I 0
S S Y0 1 0 0 I 0 0
1 0
1 1 I 0 0 0
DEMULTIPLEXERS / DECODERS
 A decoder with enable input can function as a
demultiplexer
Y3
I1 Decoder
Binary
Y2 Y3
I0 Y1
E Y0 Y2

Y1
E I1 I0 Y3 Y2 Y1 Y0
0 x x 0 0 0 0 Y0

1 0 0 0 0 0 1
1 0 1 0 0 1 0 I1
1 1 0 0 1 0 0 I0
E
1 1 1 1 0 0 0
DEMULTIPLEXERS

Y3
Y2
I DeMUX
Y1 Y3
S S Y0
1 0
Y2

Y1
I S1 S0 Y3 Y2 Y1 Y0
Y0
0 x x 0 0 0 0
1 0 0 0 0 0 1
1 0 1 0 0 1 0 S
I11
S
I00
1 1 0 0 1 0 0 EI

1 1 1 1 0 0 0
PRACTICE
 Using a decoder and external gates, design the
combinational circuit defined by the following
three boolean functions:
 F1 = x’ y’z’ + xz = ∑ (0, 5, 7)

 F2 = xy’z’ + x’y = ∑ (2, 3, 4)

 F3 = x’y’z + xy = ∑ (1, 6, 7)
PRACTICE
 Implement the following Boolean function with a 4
X 1 multiplexer and external gates.
F(A, B, C, D) = ∑ (1, 3, 4, 11, 12, 1 3, 14, 15)
PRACTICE
 Implement the following Boolean function with a 4
X 1 multiplexer and external gates.
F(A, B, C, D) = ∑ (1, 2, 4, 7, 8, 9, 10, 11, 13, 15)
PRACTICE
 Construct a 16 X 1 multiplexer with two 8 X 1 and
one 2 X 1 multiplexers. Use block diagrams

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