LABORATORY WORK # 10.

MULTIPLEXER.

Aims: investigate operation of the 8*l multiplexer.

PREPARATION TO LAB WORK.

1. Learn the information multiplexer

2. Consider the scheme of experiment 10A and define the results theoretically. Draw the
scheme using Scheme Design System (SDS).
3. Construct and draw (using SDS) 16*1 multiplexer with 2 8*1 multiplexers and an OR gate.
This will be the scheme for experiment 10B
4. Answer the question below in written form.
4.1. What is a MUX?
4.2. A MUX’s another name is __________
4.3. Enable input of a MUX is called________.
4.4. How many functions can a MUX realize?
4.5. A MUX can be used as a DUX. True or false? Why?
4.6. What is a role of a MUX’s selection lines?

LAB WORK PERFORMANCE.

1. Demonstrate presence of your home preparation for lab work to your instructor.
2. Pass test of 10 questions.
3. Get a permission to begin the work.
4. Mount the scheme of experiment 10A on the breadboard and perform it. Fill in the table.
5. Make a conclusion about functionality of the scheme. Compare your results with
theoretical ones.
6. Demonstrate your results to your instructor. If your results are correct you may dismount
your scheme, if no – find the mistake.
7. Repeat steps 4-6 for experiment 10B.
8. Be ready to answer your instructor’s questions in process of work.
9. Complete your work, dismount your schemes, clean your working place.
10. Answer your instructor’s final questions, obtain your mark.
11. Ask your instructor’s permission to leave.

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Experiment 10A. Realize the following circuit on a breadboard. Connecting I 0-I7 to GND or
VCC based on the following table, fill in the blanks (X-don’t –care conditions). Write ON or
OFF for LEDs.
U? L5
4 5 330
I0 Z
3
I1
2 6
I2 Z
1 330
I3
S0 S 1 S2 15
I4
14 L 6
I5
13
I6
L4 12
I7
330 11
A
10
B
9
C
7
330 E
E
330 74151
330
L
3 L 2

L 1

N Inputs outputs
I0 I1 I2 I3 I4 I5 I6 I7 E S2 S1 S0 Z Z’
L1 L2 L3 L4 L5 L6
1 0 5V 5V 0 5V 5V 0 5V 0 0 0 0
2 0 5V 5V 0 5V 5V 0 5V 0 0 0 5V
3 0 5V 5V 0 5V 5V 0 5V 0 0 5V 0
4 0 5V 5V 0 5V 5V 0 5V 0 0 5V 5V
5 0 5V 5V 0 5V 5V 0 5V 0 5V 0 0
6 0 5V 5V 0 5V 5V 0 5V 0 5V 0 5V
7 0 5V 5V 0 5V 5V 0 5V 0 5V 5V 0
8 0 5V 5V 0 5V 5V 0 5V 0 5V 5V 5V
9 5V 0 0 0 0 0 5V 5V 0 0 0 0
10 5V 0 0 0 0 0 5V 5V 0 0 0 5V
11 5V 0 0 0 0 0 5V 5V 0 0 5V 0
12 5V 0 0 0 0 0 5V 5V 0 0 5V 5V
13 5V 0 0 0 0 0 5V 5V 0 5V 0 0
14 5V 0 0 0 0 0 5V 5V 0 5V 0 5V
15 5V 0 0 0 0 0 5V 5V 0 5V 5V 0
16 5V 0 0 0 0 0 5V 5V 0 5V 5V 5V
17 5V 0 0 0 0 0 5V 5V 5V X X X
18 5V 0 0 0 0 0 5V 5V 5V X X X
19 5V 0 0 0 0 0 5V 5V 5V X X X

Experiment 10B. Construct and mount 16*1 multiplexer with 2 8*1 multiplexers and an OR
gate. Define how should inputs I0-I15 be connected so that the output of the circuit (Z) would
match the table below, which shows the relation between configuration of selection lines (S)
and output of the circuit (Z).
S 5 1 12 7 6 8 15 9 0 3 11 2 4 10 13 14
Z 1 1 0 0 0 1 0 1 1 1 0 1 1 1 0 1

Conclusion.

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 TEST QUESTIONS

1. A multiplexer is a combinational circuit that

A.converts binary information from n input lines to a maximum of 2n unique output lines
B. has 2n (or less) unique input lines and n output lines
C. selects binary information from one of many input lines and direct it to a single output line
D. receives information on a single line and transmits this information on one of 2n possible
output lines
E. converts binary information from n input lines to m output lines

2. Strobe is
A. enable input of decoder B. disable input of decoder
C. enable input of multiplexer D. disable input of demultiplexer
E. disable input of multiplexer

3. What will the output signal of 4*1 multiplexer be if selection lines S 1S0=11?

I 0

4*1 A. I0
I 1

Y B. I1
I 2 MUX C. I2
I3 S1 S 0 D. I3
E. any of them

4. What are selection lines of 4*1 multiplexer if output signal Y=I1 ?

I 0
A. 00
4*1 B. 01
I 1
C. 10
Y D. 11
I 2 MUX
E. any of them
I3 S1 S 0

5. What function is implemented with multiplexer?

A I 0 4*1 A. F(A,B,C)=Σ(2,3,5,6)
0 I 1 MUX B. F(A,B,C)=Σ(1,3,5,6)
F
1 I 2 Y C. F(A,B,C)=Σ(2,3,5,7)
A' I 3 D.F(A,B,C)=Σ(2,3,4,6)
S1 S0 E. F(A,B,C)=Σ(1,3,5,7)
B 0 I 0
8*1
C I 1 MUX
I 2
1
I 3

6. What function is implemented with multiplexer? F

I 4 Y
I 5

A. F(A,B,C,D)= Σ(2,5,6,7,10,11,12,13,14) I 6

A' I
B. F(A,B,C,D)= Σ(0,1,3,4,7,14) 7

C. F(A,B,C,D)= Σ(0,1,3,4,8,15) S2 S1 S0

D. F(A,B,C,D)= Σ(0,1,3,4,8,9,15) B

E. F(A,B,C,D)= Σ(0,1,3,5,7,14,15) C
D

40
7. Decoder is __________ component.
A. SSI B. MSI C. LSI D. VLSI E. SSI or MSI
8. For the circuit below if selection lines S 2S1S0=011 the output Z will be ____, if S2S1S0=100,
Z will be ____, if S2S1S0=001, Z will be ____.
U?
1 4 5 330
I0 Z
1 3
I1
0 2 6
I2 Z
1 1 330
I3
S0 S 1 S2 0 15
I4
1 14
I5
0 13
I6
1 12
I7
330 11
A
10
B
9
C
7
330 0 E
330 74151
330

A. 1,1,0 B. 0,1,1 C. 1,1,1 D. 0,1,0 E.1,0,1

9. For the circuit in question 8 the output Z is equal to _____ for periods of time between t 3 and
t4, t4 and t5, t5 and t6.

t0 t1 t2 t 3 t 4 t 5 t6 t7 t8 t 9 t 10 t 11

E'

S 0

S 1

S 2

A. 0,1,1 B. 0,1,0 C. 1,1,1 D. 0,0,1 E. 1,0,1

10. What function is implemented with multiplexer?

1 I 0
A. F(A,B,C,D)= Σ(0,1,3,4,5,8,15)
8*1
I 1 MUX
0 I 2
B. F(A,B,C,D)= Σ(0,1,3,4,7,14)
I 3
F
I 4 Y C. F(A,B,C,D)= Σ(0,1,3,4,8,15)
I 5

I 6 D. F(A,B,C,D)= Σ(0,1,3,4,8,9,15)
B I 7

E. F(A,B,C,D)= Σ(0,1,3,5,7,14,15)
S2 S1 S0

A
C
D

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