UNIT – 2 : INTRODUCTION AND ARCHITECTURE OF 8085

Introduction:
Microcomputer: The term microcomputer is generally synonymous with
personal computer, or a computer that depends on a microprocessor.
 Microcomputers are designed to be used by individuals, whether in the form
of PCs, workstations or notebook computers.
 A microcomputer contains a CPU on a microchip (the microprocessor), a
memory system (typically ROM and RAM), a bus system and I/O ports,
typically housed in a motherboard.
Microprocessor: A silicon chip that contains a CPU. In the world of personal
computers, the terms microprocessor and CPU are used interchangeably.
 A microprocessor (sometimes abbreviated µP) is a digital electronic
component with miniaturized transistors on a single semiconductor integrated
circuit (IC).
 One or more microprocessors typically serve as a central processing unit
(CPU) in a computer system or handheld device.
 Microprocessors made possible the advent of the microcomputer.
 At the heart of all personal computers and most working stations sits a
microprocessor.
 Microprocessors also control the logic of almost all digital devices, from clock
radios to fuel-injection systems for automobiles.
 Three basic characteristics differentiate microprocessors:
1. Instruction set: The set of instructions that the microprocessor can
execute.
2. Bandwidth: The number of bits processed in a single instruction.
3. Clock speed: Given in megahertz (MHz), the clock speed determines how
many instructions per second the processor can execute.
 In both cases, the higher the value, the more powerful the CPU. For example,
a 32-bit microprocessor that runs at 50MHz is more powerful than a 16-bit
microprocessor that runs at 25MHz.
 In addition to bandwidth and clock speed, microprocessors are classified as
being either RISC (reduced instruction set computer) or CISC (complex
instruction set computer)
Microprocessor Architecture:
A microprocessor is a semiconductor device consisting of electronic logic circuit
manufactured by using very large-scale integration. It is capable of performing
various computing function and making decision to change the sequence of program
execution. The microprocessor is in many ways similar to the CPU including the
control unit and logic circuitry on one chip.

In this system, the microprocessor is the master and all other peripherals are
slaves. The master controls all peripherals and initiates all operations. The buses are
group of lines that carry data, address or control signals. The CPU interface is
provided to demultiplex the multiplexed lines, to generate the chip select signals and
additional control signals. The system bus has separate lines for each signal.
All the slaves in the system are connected to the same system bus. At any
instant of time communication takes place between the master and one of the slaves.
All the slaves have tristate logic and hence normally remain in high impedance state.
The processor selects a slave by sending an address. When a slave is selected, it
comes to the normal logic and communicates with the processor.
The EPROM memory is used to store permanent programs and data. The RAM
memory is used to store temporary programs and data. The input device is used to
enter program, data and to operate system. The output device is also used for
examining the results. Since the speed of IO devices does not match with speed of
microprocessor, an interface device is provided between system bus and IO device.
 Bit: A bit is a single binary digit.
 Word: A word refers to the basic data size or bit size that can be processed by
the arithmetic and logic unit of the processor. A 16-bit binary number is called a
word in a 16-bit processor.
 Bus: A bus is a group of wires/lines that carry similar information.
 System Bus: The system bus is a group of wires/lines used for communication
between the microprocessor and peripherals.
 Memory Word: The number of bits that can be stored in a register or memory
element is called a memory word.
 Address Bus: It is a group of wires or lines that are used to transfer the addresses
of Memory or I/O devices. It is unidirectional. For example, if an Address bus
have 16 bits. This means that Microprocessor can transfer maximum 16-bit
address which means it can address 65,536 different memory locations. This bus
is multiplexed with 8-bit data bus. So, the most significant bits (MSB) of address
goes through Address bus (A7-A15) and LSB goes through multiplexed data bus
(AD0-AD7).
 Data Bus: The data bus is used to transfer data between memory and processor
or between I/O device and processor. For example, an 8-bit processor will
generally have an 8-bit data bus and a 16-bit processor will have 16-bit data bus.
 Control Bus: The control bus carry control signals, which consists of signals for
selection of memory or I/O device from the given address, direction of data
transfer and synchronization of data transfer in case of slow devices.
 Central Processing Unit: The CPU consists of ALU (Arithmetic and Logic
Unit), Register unit and control unit. The CPU retrieves stored instructions and
data word from memory; it also deposits processed data in memory.
 ALU (Arithmetic and Logic Unit): This section performs computing functions
on data. These functions are arithmetic operations such as additions subtraction
and logical operation such as AND, OR rotate etc. Result are stored either in
registers or in memory or sent to output devices.
 Register Unit: It contains various register. The registers are used primarily to
store data temporarily during the execution of a program. Some of the registers
are accessible to the uses through instructions.
 Control Unit: It provides necessary timing & control signals necessary to all the
operations in the microcomputer. It controls the flow of data between the µp. and
peripherals (input, output & memory). The control unit gets a clock which
determines the speed of the µp. .
Microprocessor Initiated operations (or) 8085 Bus organisation:
The MPU (microprocessor unit) performs primarily four operations -
 Memory Read: Reads data (or instruction) from memory.
 Memory Write: Writes data (or instruction) into memory.
 I/O Read: Accepts data from input device.
 I/O Write: Sends data to output device.
All the operations are path of the communication process between the MPU and
peripheral devices. To communicate with a peripheral, the MPU needs to perform
the following steps:
Step 1: Identify the peripheral location.
Step 2: Transfer data.
Step 3: Providing timing signals.

The 8085 MPU performs these functions using three sets of communication lines
called busses.
1. The address bus
2. The data bus
3. The control bus
Address Bus: The address bus is a group of 16 lines generally identified as A0 to
A15. The address bus is unidirectional. Bits flow in one direction from MPU to
peripheral devices. The MPU uses the address bus to identify a peripheral or a
memory location (In a computer system, each peripheral or memory location is
identified by a binary number called as address). The address is used to carry 16-bit
address. The number of address lines of MPU determines its capacity to identify
different memory locations or peripherals. The 8085 MPU with its 16 address lines
is capable of addressing 216 memory locations.
The 16-bit address bus and are generally identified as A0 - A15. The higher order
address lines (A8 – A15) are unidirectional and the lower order lines (A0 – A7) are
multiplexed (time-shared) with the eight data bits (D0 – D7) and hence, they are
bidirectional.

Data Bus: The MPU uses the data bus to transfer data. The data bus is group of 8
lines used for data flow. The data refers to any binary information that may include
an instruction, an address or number. The lines are bidirectional. i.e., data flow in
both directions between the MPU and memory and peripheral devices. the 8-bit data
lines enable the MPU to manipulate 8-bit arranging from 00 to FF (28 = 256). The
longest number on data bus is 1111 1111.

Control Bus: The control bus is compressed of various single lines that carry
synchronization signal. The MPU uses such lines to perform the providing timing
signals. These are not group of lines like address or data bus, but individual lines
that provide a pulse to indicate an MPU operation. The MPU generates specific
control signals for memory read of I/O read write instructions.
To read an instruction from a memory location, the MPU places the 16-bit address
as the address on the address bus to communicate with memory. The address on the
bus is decoded by an external logic circuit and the memory location is identified.
The MPU sends a pulse called memory read as the control signal. The pulse activates
the memory chip and the contents of the memory location (8-bit data) are placed on
the data bus and brought inside the microprocessor.
8085 Microprocessor Architecture:

Features of 8085:
• 8-bit general purpose µp
• Capable of addressing 64 k of memory
• Has 40 pins as shown in fig 2
• Requires +5 v power supply
• Can operate with 3 MHz clock
• 8085 upward compatible

The internal architecture of the 8085 microprocessor determines how and what
operations can be performed with the data operations are,
 Store 8-bit data.
 Perform arithmetic and logical operations
 Test for conditions.
 Sequence the execution of instructions.
 Store data temporarily in read write memory called stack.
To perform these operations, the microprocessor requires registers, an ALU, control
logic and internal bus.
Registers: The 8085 has 6 general purpose registers to store 8-bit data during
program execution. These 6 registers are identified as B, C, D, E, H and L. They can
be combined as register pairs BC, DE and HL to perform some 16-bit operations.
These registers are programmable. It can use to load or transfer data from the
registers by using instructions.
Accumulator: The accumulator (A) is an 8-bit register that is part of ALU. It is used
to store 8-bit data and to perform ALU operations. The result of an operation is stored
in Accumulator. The Accumulator is identified as register A. The data on which
operations is to be performed is operand. One of the operands must be Accumulator.
Program Counter (PC): This 16-bit register deals with sequencing the execution
of instructions. This register is a memory pointer. Memory locations have 16-bit
address. The microprocessor uses this register to sequence the execution of the
instructions. The function of the program counter is to point to the memory address
from which the next byte is to be fetched. When a byte is being fetched, the program
counter is automatically incremented by one to point to the next memory location.
Stack Pointer (SP): The stack pointer is also a 16-bit register, used as a memory
pointer. It points to a memory location in R/W memory, called stack. The beginning
of the stack is defined by loading 16- bit address in the stack pointer.
Timing and control unit: This unit synchronizes all the microprocessor operations
with the clock and generates the control signal necessary for communication
between the microprocessor and peripherals. The control signals are similar to a sync
pulse in anoscilloscope. The 𝑅𝐷 and 𝑊𝑅 signals are sync pulses indicating the
availability of data on the data bus.
Instruction register and Decoder: The instruction register and decoder are part of
the ALU. When an instruction is fetched from the memory it is loaded in to the
instruction register. The decoder decodes the instruction and establishes the
sequence of events to follow. The instruction register is not programmable and
cannot be accessed by any instruction.
Register Array: There are two additional registers called temporary registers W and
Z, which are included in the register array along with programmable registers
namely B, C, D, E, H, L, SP and PC. These registers are used to hold 8-bit data
during the execution of instructions. However, they are used internally by
microprocessor, they are available to the program.
MUX / DEMUX unit: This unit is used to select a register out of all the available
registers. This unit behaves as Multiplexer (MUX) when data going from the register
to the internal data bus. It behaves as Demultiplexer(DEMUX) when data is coming
to a register from the internal data bus of the processor. The register select will
behave as the function of selection lines at the Mux / Demux.
Address Buffer: This is an 8-bit unidirectional buffer. It is used to drive external
high order address bus (A15 – A8). It is also used to tri-state the high order address
bus under certain conditions such as reset, hold, halt and when address lines are not
in use.
Address/Data Buffer: This is an 8-bit bi-directional buffer. It is used to drive
multiplexed address/data bus. i.e., low order address bus (A7-A0) and data bus (D7-
D0). It is also to tri-state the multiplexed address/data bus under certain conditions
such as reset, hold, halt and when the bus is not in use.
Incrementer / Decrementer address latch: This 16-bit register is used to increment
or decrement the contents of program counter or stack pointer as part of execution
of instructions related to them.
Flag register: The ALU includes five flip-flops, which are set (or) reset after an
operation according to data condition of the result in the accumulator and other
registers. They are called Zero (Z), Carry (CY), Sign (S), Parity (P) and Auxiliary
Carry (AC) flags. Their bit positions in the flag register are shown in Fig. The
microprocessor uses these flags to test data conditions.

Microprocessor Operations:
The operations of a microprocessor can be divided into several stages, often
referred to as the "fetch-decode-execute" cycle.
Here's an overview of these stages:
Fetch: The control unit fetches the next instruction from memory, using the
program counter (PC) to determine the memory address. The instruction is then
stored in the instruction register (IR).
Decode: The control unit decodes the instruction in the IR, determining the
operation to be performed and the operands involved. It generates control signals
to configure the microprocessor for the specific instruction.
Execute: The ALU performs the actual operation specified by the instruction. It
operates on the data stored in registers or fetched from memory. The result is
stored back into a register or memory location as required.
Memory Access: If the instruction involves accessing memory (e.g., loading or
storing data), the microprocessor interacts with the memory system to read from
or write to the specified memory location.
Writeback: After executing the instruction and storing the result, if any, the
microprocessor updates the appropriate registers or memory locations.

This fetch-decode-execute cycle repeats for each instruction in the program,

allowing the microprocessor to sequentially process instructions and perform the
desired computations.
Microprocessors can also handle interrupts, which are signals that temporarily
pause the normal execution of instructions to handle external events. Interrupts
can be triggered by hardware devices or software instructions and are used for
tasks such as input/output operations and real-time processing.

Memory:
Memory is a crucial component of a computer system that is responsible for storing
and retrieving data and instructions. It provides the ability to store information
temporarily or permanently, allowing the microprocessor to access and manipulate
the stored data as needed. In this context, we'll discuss the types of memory
commonly found in computer systems.
1. Random Access Memory (RAM):
RAM is a type of volatile memory that provides temporary storage for data and
instructions that are actively being used by the microprocessor. It allows for fast read
and write operations. RAM is further categorized into:

- Static RAM (SRAM): SRAM uses flip-flop circuits to store each bit of data. It is
faster and more expensive than dynamic RAM but does not require constant
refreshing.
- Dynamic RAM (DRAM): DRAM stores each bit of data in a capacitor within a
memory cell. It is slower and requires constant refreshing to maintain the stored data.

RAM is typically used for tasks like running programs, caching data, and storing the
operating system.
2. Read-Only Memory (ROM):
ROM is a type of non-volatile memory that stores permanent instructions or data
that should not be modified. The stored data is retained even when the power is
turned off. Examples of ROM include:

- Programmable Read-Only Memory (PROM): PROM is a type of memory that

can be programmed with specific data or instructions once, after which it becomes
permanent and cannot be changed.
- Erasable Programmable Read-Only Memory (EPROM): EPROM allows for
erasing and reprogramming multiple times using ultraviolet light exposure.
- Electrically Erasable Programmable Read-Only Memory (EEPROM):
EEPROM can be erased and reprogrammed electronically without the need for UV
light.

ROM is commonly used for storing firmware, boot instructions, and other essential
system data.

3. Cache Memory:
Cache memory is a small, high-speed memory located closer to the microprocessor.
It serves as a temporary storage for frequently accessed data and instructions,
providing faster access compared to the main memory (RAM). Cache memory helps
reduce the time it takes to retrieve data from the main memory, improving overall
system performance.

4. Secondary Storage:
Secondary storage devices, such as hard disk drives (HDDs) and solid-state drives
(SSDs), are used for long-term storage of data, files, and software. Unlike primary
memory (RAM), secondary storage devices are non-volatile and retain data even
when the power is turned off. Secondary storage offers a much larger storage
capacity compared to RAM but has slower access times.

These are the primary types of memory commonly used in computer systems. Each
type plays a specific role in storing and retrieving data and instructions, enabling the
microprocessor to perform its tasks efficiently.
I/O Device:
Input/Output (I/O) devices serve as the interface between the microprocessor and
the external world, allowing the exchange of data and control signals. I/O devices
enable the microprocessor to receive input from users or other devices and provide
output to control or communicate with external components.
Some commonly used I/O devices: Keyboard, Mouse, Monitor/Display, Printer,
Scanner, Speaker/Headphones, Webcam, Hard Disk Drive (HDD) and Solid-State
Drive (SSD), Network Interface Card (NIC), USB Flash Drives etc.
Let's explore the significance of I/O devices in a microprocessor-based system:
1. Serial Communication Interfaces: Serial communication interfaces, such as
UART (Universal Asynchronous Receiver-Transmitter), SPI (Serial Peripheral
Interface), and I2C (Inter-Integrated Circuit), facilitate communication between the
microprocessor and external devices using a serial data transfer protocol. These
interfaces are commonly used to connect devices such as sensors, displays, memory
chips, or other peripherals that communicate serially.
2. Parallel Communication Interfaces: Parallel communication interfaces, such as
parallel ports or data buses, enable the microprocessor to exchange data with
external devices using multiple parallel data lines. These interfaces are often used to
connect devices such as printers, external memory, or other data-intensive
peripherals that require high-speed data transfer.
3. General-Purpose Input/Output (GPIO): GPIO pins provide flexible digital I/O
capabilities for the microprocessor, allowing it to interface with a wide range of
devices. GPIO pins can be configured as inputs to receive signals from sensors,
switches, or buttons, or as outputs to drive LEDs, relays, or other actuators. GPIO
pins provide a versatile means of communication and control for various
applications.
4. Analog-to-Digital Converters (ADC): ADCs enable the microprocessor to
convert analog signals, such as temperature, light intensity, or sound, into digital
values that can be processed. ADCs are commonly used to interface with sensors
and capture real-world data for further processing or analysis by the microprocessor.
5. Digital-to-Analog Converters (DAC): DACs perform the opposite function of
ADCs by converting digital signals from the microprocessor into analog voltages or
currents. DACs are utilized in applications such as audio playback, motor control,
or generating analog control signals for various devices.
6. Display Devices: Display devices, such as LCD (Liquid Crystal Display), LED
(Light-Emitting Diode), or OLED (Organic Light-Emitting Diode) screens, can be
connected to the microprocessor to provide visual output. These displays enable the
microprocessor to present information, graphics, or user interfaces to the user or
other connected devices.
7. Storage Devices: Microprocessors can interface with storage devices such as hard
disk drives (HDD), solid-state drives (SSD), or memory cards through interfaces like
SATA (Serial ATA) or SD (Secure Digital). This allows for data storage, retrieval,
and transfer between the microprocessor and external storage media.
8.Communication Interfaces: Microprocessors often include integrated
communication interfaces, such as Ethernet, USB (Universal Serial Bus), Wi-Fi, or
Bluetooth. These interfaces enable the microprocessor to connect and communicate
with other devices, networks, or the internet, facilitating data transfer and remote
control capabilities.
9. Specialized I/O Devices: Depending on the specific application, microprocessors
may require specialized I/O devices. These can include motor controllers, analog
signal conditioners, RFID (Radio-Frequency Identification) readers, or industrial
control interfaces tailored to specific industrial or embedded system requirements.

I/O devices are controlled and accessed by the microprocessor through specific
protocols, commands, or registers. The microprocessor's software or firmware
communicates with the I/O devices to receive inputs, process data, and generate
appropriate outputs, allowing the microprocessor to interact with the external world
and perform its intended functions.

Memory and I/O Operations:

Memory Operations:
1. Read Operation: The microprocessor initiates a read operation to retrieve data
or instructions from memory. It specifies the memory address from which it wants
to read, and the memory subsystem fetches the corresponding data and transfers it
to the microprocessor.
2. Write Operation: The microprocessor initiates a write operation to store data or
instructions into memory. It provides the data to be written along with the memory
address where the data should be stored. The memory subsystem writes the data to
the specified memory location.
3. Fetch Operation: During instruction execution, the microprocessor fetches
instructions from memory using the program counter (PC) to determine the address.
The fetched instruction is loaded into the instruction register (IR) for decoding and
execution.
4. Memory Mapping: Memory mapping is the process of assigning addresses to
different memory locations. It enables the microprocessor to access specific regions
of memory for different purposes, such as program code, data storage, and system
registers.
Memory operations are typically performed using the following steps:
 The microprocessor sends a read or write request to the memory controller.
 The memory controller determines the address of the memory location that is
being accessed.
 The memory controller sends a signal to the memory to read or write the data.
 The memory reads or writes the data and sends it back to the memory controller.
 The memory controller sends the data to the microprocessor.

I/O Operations:
1. Input Operation: The microprocessor performs an input operation to receive data
or signals from peripheral devices. It sends appropriate commands or addresses to
the I/O device, and the device transfers the requested data to the microprocessor for
processing.
2. Output Operation: The microprocessor performs an output operation to send
data or signals to peripheral devices. It provides the necessary data or commands to
the I/O device, which then performs the requested action or stores the data.
3. I/O Addressing: I/O addressing involves assigning addresses to different I/O
devices to establish communication between the microprocessor and peripherals.
The microprocessor uses specific I/O instructions and addresses to read from or write
to the desired I/O device.
4. Interrupt Handling: Interrupts are signals generated by peripheral devices to
request attention from the microprocessor. When an interrupt occurs, the
microprocessor suspends its current execution, saves the current context, and
responds to the interrupt by executing an interrupt service routine (ISR) specific to
the interrupting device.

I/O operations are typically performed using the following steps:

 The microprocessor sends an I/O request to the I/O controller.
 The I/O controller determines the address of the I/O device that is being accessed.
 The I/O controller sends a signal to the I/O device to read or write the data.
 The I/O device reads or writes the data and sends it back to the I/O controller.
 The I/O controller sends the data to the microprocessor.

There are two main ways to perform I/O operations:

1. Memory-mapped I/O: In memory-mapped I/O, the I/O devices are mapped to
specific memory addresses. This means that the microprocessor can access I/O
devices using the same instructions that it uses to access memory.
2. Port-mapped I/O (I/O mapped I/O): In port-mapped I/O, the I/O devices are
accessed using separate I/O ports. This means that the microprocessor needs to use
special instructions to access I/O devices.

IO mapped IO V/s Memory Mapped IO:

Memory Mapped IO IO mapped IO
IO is treated as memory. IO is treated IO.
16-bit addressing. 8- bit addressing.
More Decoder Hardware. Less Decoder Hardware.
Can address 216=64k locations. Can address 28=256 locations.
Less memory is available. Whole memory address space is
available.
Memory Instructions are used. Special Instructions are used like
IN,OUT.
Memory control signals are used. Special control signals are used.
Arithmetic and logic operations can be Arithmetic and logic operations cannot
performed on data. be performed on data.
Data transfer b/w register and IO. Data transfer b/w accumulator and IO

Pin Functions:
Pin functions refer to the specific roles or functions assigned to the pins of a
microprocessor or integrated circuit. Each pin serves a particular purpose and
connects the microprocessor to the external components, allowing for
communication and control. The pin functions can vary depending on the specific
microprocessor architecture or IC design.
However, let's discuss some common pin functions found in microprocessors:
1. Power Supply Pins:
- VCC/VDD: These pins provide the positive supply voltage to power the
microprocessor.
- GND: These pins are connected to the ground or 0V reference potential.

2. Clock Pins:
- CLK/CLKIN: The clock input pin receives an external clock signal, which
synchronizes the internal operations of the microprocessor.
3. Address and Data Bus Pins:
- Address Bus (AD[0: n]): These pins carry the address information, allowing the
microprocessor to select memory locations or I/O devices.
- Data Bus (D[0: n]): These pins transfer data between the microprocessor and
memory or I/O devices.

4. Control and Status Pins:

- Control Signals: Pins that carry control signals, such as Read (RD), Write (WR),
Interrupt Request (IRQ), and Reset (RESET), control the microprocessor's
operations and interactions with external components.
- Status Signals: Pins that indicate the status of the microprocessor, such as Busy,
Interrupt Acknowledge, or Error signals.

5. I/O Pins:
- Input/Output (I/O) Pins: These pins provide bi-directional communication
between the microprocessor and external devices, such as sensors, actuators, or other
peripheral devices.
- Interrupt Pins: These pins receive interrupt signals from external devices,
requesting the microprocessor's attention.

6. Other Pins:
- Oscillator Pins: These pins are used to connect external crystal or oscillator
circuits to provide the clock signal for the microprocessor.
- Debug/Programming Pins: Some microprocessors include dedicated pins for
debugging or programming purposes, allowing for software development,
debugging, or firmware updates.

It's important to note that the specific pin functions can differ significantly between
different microprocessors or integrated circuits. The manufacturer's datasheet or
technical documentation for a specific microprocessor should provide detailed
information about the pin functions and their usage.
Pin Diagram of 8085:
Properties:
• It is a 8-bit microprocessor
• Manufactured with N-MOS technology
• 40 pin IC package
• It has 16-bit address bus and thus has 216 = 64 KB addressing capability.
• Operate with 3 MHz single-phase clock
+5 V single power supply

All the signals are classified into 7 groups:

 Address bus
 Data bus
 Control & status signals
 Power supply and frequency signals
 Externally initiated signals
 Serial I/O signals
 Interrupt signals
1. Address Bus: The 8085 has 8 signal lines from A8 – A15 which are unidirectional
and used as higher order address bus.

2. Multiplexed Address & Data bus: The signal lines from AD7 – AD0 are
bidirectional, they serve for a dual purpose. They are used as the lower order address
bus as well as the data bus.

3. Control and Status signals: This group of signals includes two control signals
RD and WR, three status signal IO/ M, S1 and S0. To identify the nature of operation
one special signal ALE is used to indicate the beginning of the program.
 RD (Read): This is a read control signal (active low). This signal indicates that
the selected IO or memory device is to be read and are available on the data bus.
 WR (write): This is a write control signal (active low). This signal indicates that
the data on the data bus are to be written into a selected memory of IO location.
 IO/ M, S1 and S0: This is a status signal used to differentiate between IO and
memory operations. When it is high it indicates an IO operation, when it is low
it indicates a memory operation. This signal is combined with read and write to
generate IO and memory control signals. S1 and S0 indicate the type of machine
cycle in progress. (Note: In table S2=S0)

 ALE (Address Latch Enable): It is an output signal used to give information of

AD0-AD7 contents. This is a positive going pulse generated any time the 8085
begins its operation. When pulse goes high it indicates that AD0-AD7 lines are
address. When it is low it indicates that the contents are data. This signal is used
primarily to latch the lower order address from the multiplexed bus and generate
a separate set of 8-bit address lines.
 4. Power supply and clock frequency:
 Vcc: +5 V DC power supply
 Vss: Ground reference
 X1, X2: A crystal is connected at these two pins having frequency of 6 MHz. The
frequency is internally divided by 2.
 CLK Out: Clock output signal can be used as the system clock for the other
devices.

5. Externally initiated signals:

 RESET IN: When the signal on this pin is low, the PC is set to 0, the buses are
tri-stated and the processor is reset.
 RESET OUT: This signal indicates that the processor is being reset. The signal
can be used to reset other devices.
 READY: When this signal is low, the processor waits for an integral number of
clock cycles until it goes high.
 HOLD: This signal indicates that a peripheral like DMA (direct memory access)
controller is requesting the use of address and data bus.
 HLDA: This signal acknowledges the HOLD request.

6. Serial I/O signals: The 8085 has two signals to implement the serial transmission.
 SID (Serial Input Data): This input signal is used to accept serial data bit by bit
from the external device by using RIM instruction.
 SOD (Serial Output Data): This is an output signal which enable the
transmission of serial data bit by bit to the external device by using SIM
instruction.

7. Interrupt signals: The 8085 has 5 interrupt signals: INTA, RST 7.5, RST 6.5,
RST 5.5 & TRAP. They can be used to interrupt a program execution.
 INTR: Interrupt request is a general-purpose interrupt.
 INTA: This signal is used to acknowledge an interrupt by the processor.
 RST 7.5, RST 6.5, RST 5.5 (Restart interrupt): These are vectored interrupts
and have highest priority than INTR interrupt.
 TRAP: This is a non-maskable interrupt and has the highest priority.
Concept of Multiplexing and De-Multiplexing of Buses:
Multiplexing and demultiplexing of buses in a microprocessor system refer to the
techniques used to share a single bus for multiple purposes. These techniques allow
different devices or subsystems to effectively utilize a limited number of bus lines.
Let's explore multiplexing and demultiplexing in more detail:
1. Multiplexing:
- Address Bus Multiplexing: In some microprocessors, the address bus is shared for
both address and data transfer. The microprocessor uses specific control signals, such
as Address Latch Enable (ALE), to indicate the availability of a valid address on the bus
during the address phase. After the address phase, the bus lines are multiplexed to carry
data during the data transfer phase.
- Data Bus Multiplexing: In certain microprocessor systems, the data bus is shared
among different devices. Multiplexing techniques, such as time-division multiplexing,
can be employed. Each device is given a specific time slot to access the data bus and
transfer its data. The microprocessor controls the time slots through appropriate control
signals like Read (RD) or Write (WR).
2. Demultiplexing:
- Address Bus Demultiplexing: When the microprocessor receives an address on the
shared bus, demultiplexing is used to separate the address lines from the data lines.
Demultiplexing circuitry, often controlled by the ALE signal, extracts the address
information from the bus and provides it to the memory or peripheral devices.
- Data Bus Demultiplexing: In systems where the data bus is multiplexed,
demultiplexing is performed at the receiving end to separate the data from the bus. The
microprocessor uses control signals, such as RD or WR, to indicate the appropriate time
for devices to read or write data from or to the bus. Demultiplexing circuitry ensures
that each device receives the relevant data during its designated time slot.
Generation of Control Signals:
The 8085 Microprocessor provides RD and WR signals to initiate read or write
cycle. Because these Control Signals of 8085 are used both for reading/writing
memory and for reading/writing an input device, it is necessary to generate separate
read and write signals for memory and I/O devices.

The 8085 provides IO/M signal to indicate whether the initiated cycle is for I/O
device or for memory device. Using IO/M signal along with RD and WR, it is
possible to generate separate four Control Signals of 8085:

Below Fig. 4.8 shows the circuit which generates MEMR, MEMW, IOR and IOW
signals –

We know that for OR gate, when both the inputs are low then only output is low.
Table 4.1 shows the truth table used to generate MEMR, MEMW, IOR and IOW
signals. The signal IO/M goes low for memory operation. This signal is logically
ORed with RD and WR to get MEMR and MEMW signals. When both RD and
IO/M signals go low, MEMR signal goes low.

Similarly, when both WR and IO/M Signals go low, MEMW signal goes low. To
generate IOR and IOW signals for I/O operation, IO/M signal is first inverted and
then logically ORed with RD and WR signals.

Same truth table can be implemented using 3:8 decoder as shown in Fig. 4.9.
Instruction Cycle:
The instruction cycle, also known as the fetch-decode-execute cycle, is the basic
sequence of operations performed by a microprocessor to execute instructions.
The instruction cycle of the 8085 microprocessor consists of four basic steps, which
are:
1. Fetch: In this step, the microprocessor fetches the instruction from the memory
location pointed to by the program counter (PC). The PC is incremented by one after
the fetch operation.
2. Decode: Once the instruction is fetched, the microprocessor decodes it to
determine the operation to be performed and the operands involved.
3. Execute: In this step, the microprocessor performs the operation specified by the
instruction on the operands.
4. Store: Finally, the result of the execution is stored in the appropriate memory
location or register.
Once the execution of an instruction is complete, the microprocessor returns to the
fetch step to fetch the next instruction to be executed. This cycle repeats until the
program is complete or interrupted.

Why need the Instruction cycle in 8085 microprocessor ?

The instruction cycle is a fundamental concept in the operation of the 8085
microprocessor because it is the process by which the microprocessor fetches,
decodes, and executes instructions. The execution of a program in a microprocessor
involves a sequence of instructions, and each instruction is executed using the
instruction cycle.

The instruction cycle is necessary in the 8085 microprocessor because it ensures that
the instructions are executed in the correct sequence and that the correct operation is
performed on the correct data. The fetch step ensures that the correct instruction is
obtained from memory, the decode step ensures that the correct operation is
determined, and the execute step ensures that the correct operation is performed on
the correct data.

Furthermore, the instruction cycle allows the microprocessor to execute instructions

at a very high speed, which is critical in applications where real-time performance
is required. By efficiently executing instructions using the instruction cycle, the
microprocessor can perform complex tasks and computations quickly and
accurately.
Time required to execute and fetch an entire instruction is called instruction cycle.
It consists:
Fetch cycle - The next instruction is fetched by the address stored in program
counter (PC) and then stored in the instruction register.
Decode instruction - Decoder interprets the encoded instruction from instruction
register.
Reading effective address - The address given in instruction is read from main
memory and required data is fetched. The effective address depends on direct
addressing mode or indirect addressing mode.
Execution cycle - consists memory read (MR), memory write (MW), input output
read (IOR) and input output write (IOW)
The time required by the microprocessor to complete an operation of accessing
memory or input/output devices is called machine cycle. One time period of
frequency of microprocessor is called t-state. A t-state is measured from the falling
edge of one clock pulse to the falling edge of the next clock pulse. Fetch cycle takes
four t-states and execution cycle takes three t-states.

Uses of Instruction cycle in 8085 microprocessor:

1. Execution of instructions: The instruction cycle is used to execute the
instructions in a program. Each instruction in the program is fetched, decoded,
and executed using the instruction cycle.

2. Control flow: The instruction cycle is used to control the flow of instructions in
a program. Once an instruction is executed, the microprocessor moves on to the
next instruction in the program.
3. Real-time processing: The instruction cycle allows the 8085 microprocessor to
execute instructions quickly and accurately, making it well-suited for real-time
processing applications where speed and accuracy are critical.

4. Resource management: The instruction cycle is used to manage the resources

of the 8085 microprocessor, including the memory and registers. The fetch step
retrieves instructions from memory, while the store step writes results back to
memory or registers.

5. Interrupt handling: The instruction cycle is used to handle interrupts in the

8085 microprocessor. When an interrupt occurs, the current instruction cycle is
suspended, and the microprocessor jumps to a separate interrupt routine to handle
the interrupt.

Issues of Instruction cycle in 8085 microprocessor:

1. Timing: The instruction cycle requires precise timing to ensure that each step is
executed correctly. If the timing is off, it can lead to incorrect results or cause the
microprocessor to malfunction.

2. Instruction set limitations: The 8085 microprocessor has a limited instruction

set, which can make it difficult to perform certain operations or tasks. This can
lead to inefficient code and slower execution times.

3. Data transfer: The instruction cycle is used to transfer data between memory
and registers, but this process can be slow and inefficient. This can be a problem
when working with large amounts of data or when real-time processing is
required.

4. Interrupt handling: Although the instruction cycle is used to handle interrupts,

it can be challenging to ensure that the microprocessor returns to the correct point
in the program after handling an interrupt.

5. Instruction sequencing: The instruction cycle requires instructions to be

executed in a specific sequence, which can limit the flexibility of the
microprocessor and make it difficult to optimize code for specific tasks.
Machine Cycles:
The time needed for completing one operation of accessing memory, I/O or
acknowledging an external request is termed as Machine cycle. It is comprised of T-
states. One subdivision of the operation completed in one clock period is termed as
T-state.
The 8085 microprocessor has 5 basic machine cycles. They are -
1. Opcode fetch cycle (4T)
2. Memory read cycle (3 T)
3. Memory write cycle (3 T)
4. I/O read cycle (3 T)
5. I/O write cycle (3 T)

All instructions have at least one Opcode Fetch machine cycle. Depending on the
type of instruction one or more other machine cycles are required to complete the
execution of the instruction. The number and type of machine cycles for different
instructions are shown in table:

No. of
S. machine Machine Machine Machine Machine
No. Instruction cycles cycle - 1 cycle - 2 cycle - 3 cycle - 4
1 MOV A,B 1 OF - - -
2 MVI A, 50H 2 OF MR - -
3 LDA 5000H 4 OF MR MR MR
4 STA 5000H 4 OF MR MR MW
5 IN 80H 3 OF MR IOR -
6 OUT 80H 3 OF MR IOW -

1. Opcode Fetch (OF) machine cycle of 8085:

Each instruction of the microprocessor has one byte Opcode. The Opcode is stored
in memory. In order to fetch the Opcode from memory, processor executes the
Opcode Fetch machine cycle. So, every instruction starts with Opcode Fetch
machine (OFM) cycle. The time taken by the microprocessor to execute the Opcode
Fetch cycle is 4T (T- states). Inorder to fetch the Opcode from memory, the first 3
T-states are used. The remaining T-state is used for internal operations by the
microprocessor.
The timing diagram for Opcode Fetch machine cycle is shown in figure:

The steps in Opcode Fetch machine cycle are given in table:

S. No T state Operation
The microprocessor places the higher order 8-bits of the
memory address on A15 – A8 address bus and the lower
order 8-bits of the memory address on AD7 – AD0 address
1 / data bus.
The microprocessor makes the ALE signal HIGH and at the
2 middle of T1 state, ALE signal goes LOW.
The status signals are changed as IO/𝑀’ = 0, S1 =1 and S0
= 1. These status signals do not change throughout the OF
3 T1 machine cycle.
The microprocessor makes the RD’ line LOW to enable
4 memory read and increments the Program Counter.
The contents on D7 – D0 (i.e. the Opcode) are placed on the
5 T2 address / data bus.
The microprocessor transfers the Opcode on the address /
6 data bus to Instruction Register (IR).
The microprocessor makes the RD’ line HIGH to disable
7 T3 memory read.
8 T4 The microprocessor decodes the instruction.
2. Memory Read Machine Cycle of 8085:
Single byte instructions require only Opcode Fetch machine cycles. But, 2-byte and
3-byte instructions require additional machine cycles to read the operands from
memory. The additional machine cycle is called Memory Read machine cycle. For
example, the instruction MVI A, 50H requires one OF machine cycle to fetch the
operand from memory and one MR machine cycle to read the operand (50H) from
memory. The MR machine cycle takes 3 T-states.
The timing diagram for Memory Read machine cycle is shown in figure:

The steps in Memory Read machine cycle are given in table.

S. No T state Operation
The microprocessor places the higher order 8-bits of the
memory address on A15 – A8 address bus and the lower
order 8-bits of the memory address on AD7 – AD0 address
1 / data bus.
The microprocessor makes the ALE signal HIGH and at the
2 middle of T1 state, ALE signal goes LOW.
The status signals are changed as IO/𝑀’ = 0, S1 =1 and S0
= 0. These status signals do not change throughout the
3 T1 memory read machine cycle.
The microprocessor makes the RD’ line LOW to enable
4 memory read and increments the Program Counter.
The contents on D7 – D0 (i.e. the data) are placed on the
5 T2 address / data bus.
The data loaded on the address / data bus is moved to the
6 microprocessor.
The microprocessor makes the RD’ line HIGH to disable
7 T3 the memory read operation.
3. Memory Write Machine Cycle of 8085:
Microprocessor uses the Memory Write machine cycle for sending the data in one
of the registers to memory. For example, the instruction STA 5000H writes the data
in accumulator to the memory location 5000H. The MW machine cycle takes 3 T-
states.
The timing diagram for Memory Write machine cycle is shown in figure:

The steps to disable the memory write machine cycle are given in table:

S. No T state Operation
The microprocessor places the higher order 8-bits of the
memory address on A15 – A8 address bus and the lower
order 8-bits of the memory address on AD7 – AD0 address
1 / data bus.
The microprocessor makes the ALE signal HIGH and at the
2 middle of T1 state, ALE signal goes LOW.
The status signals are changed as IO/𝑀’ = 0, S1 =0 and S0
= 1. These status signals do not change throughout the
3 T1 memory write machine cycle.
The microprocessor makes the 𝑊𝑅’ line LOW to enable
4 memory write.
The contents of the specified register are placed on the
5 T2 address / data bus.
The data placed on the address / data bus is transferred to
6 the specified memory location.
The microprocessor makes the 𝑊𝑅’ line HIGH to disable
7 T3 the memory write operation.
4. I/O Read Machine Cycle of 8085:
Microprocessor uses the I/O Read machine cycle for receiving a data byte from the
I/O port or from the peripheral in I/O mapped I/O systems. The IN instruction uses
this machine cycle during execution. The IOR machine cycle takes 3 T-states.

The timing diagram for I/O Read machine cycle is shown in figure:

The steps in I/O Read machine cycle are given in table:

S. No T state Operation
The microprocessor places the address of the I/O port
specified in the instruction on A15 – A8 address bus and
1 also on AD7 – AD0 address / data bus.
The microprocessor makes the ALE signal HIGH and at the
2 middle of T1 state, ALE signal goes LOW.
The status signals are changed as IO/𝑀’ = 0, S1 =1 and S0
= 0. These status signals do not change throughout the I/O
3 T1 read machine cycle.
The microprocessor makes the 𝑅𝐷’ line LOW to enable I/O
4 read.
The contents on D7 – D0 (i.e. the data) are placed on the
5 T2 address / data bus.
The data loaded on the address / data bus is moved to the
6 microprocessor ie., to the accumulator.
The microprocessor makes the 𝑅𝐷’ line HIGH to disable
7 T3 the I/O read operation.
5. I/O Write Machine Cycle of 8085:
Microprocessor uses the I/O Write machine cycle for sending a data byte to the I/O
port or to the peripheral in I/O mapped I/O systems. The OUT instruction uses this
machine cycle during execution. The IOR machine cycle takes 3 T-states.
The timing diagram for I/O Write machine cycle is shown in figure:

The steps in I/O Read machine cycle are given in table:

S. No T state Operation
The microprocessor places the address of the I/O port
specified in the instruction on A15 – A8 address bus and
1 also on AD7 – AD0 address / data bus.
The microprocessor makes the ALE signal HIGH and at the
2 middle of T1 state, ALE signal goes LOW.
The status signals are changed as IO/𝑀’ = 0, S1 =0 and S0
= 1. These status signals do not change throughout the I/O
3 T1 write machine cycle.
The microprocessor makes the 𝑊𝑅’ line LOW to enable
4 I/O write.
The contents of the Accumulator are placed on the address /
5 T2 data bus.
The data placed on the address / data bus is transferred to
6 the specified I/O port.
The microprocessor makes the 𝑊𝑅’ line HIGH to disable
7 T3 the I/O write operation
T-States:
The machine cycle and instruction cycle take multiple clock periods. A portion of an
operation carried out in one system clock period is called as T-state, short for timing
states.

Memory Interfacing:
Memory is an integral part of a microprocessor system, and in this section, we will
discuss how to interface a memory device with the microprocessor. The Memory
Interfacing in 8085 is used to access memory quite frequently to read instruction
codes and data stored in memory. This read/write operations are monitored by
control signals. The microprocessor activates these signals when it wants to read
from and write into memory.
In the earlier section we have already seen the memory read and memory write
machine cycles, and status of the RD, WR and IO/M status signals for read/write
operation. In the following section we will see memory structure and its
requirements, concepts in Memory Interfacing in 8085 and interfacing examples.
Memory Structure and its Requirements:
As mentioned earlier, read/write memories consist of an array of registers, in which
each register has unique address. The size of the memory is N x M as shown in
Figure below where N is the number of registers and M is the word length, in number
of bits.
Basic Concepts in Memory Interfacing:
For Memory Interfacing in 8085, following important points are to be kept in mind:
1. Microprocessor 8085 can access 64Kbytes memory since address bus is 16-bit.
But it is not always necessary to use full 64Kbytes address space. The total memory
size depends upon the application.
2. Generally EPROM (or EPROMs) is used as a program memory and RAM (or
RAMs) as a data memory. When both, EPROM and RAM are used, the total address
space 64Kbytes is shared by them.
3. The capacity of program memory and data memory depends on the application.
4. It is not always necessary to select 1 EPROM and 1 RAM. We can have multiple
EPROMs and multiple RAMs as per the requirement of application.
5. We can place EPROM/RAM anywhere in full 64 Kbytes address space. But
program memory (EPROM) should be located from address 0000H since reset
address of 8085 microprocessor is 0000H.
6. It is not always necessary to locate EPROM and RAM in consecutive memory.
For example: If the mapping of EPROM is from 0000H to OFFFH, it is not must to
locate RAM from 1000H. We can locate it anywhere between 1000H and FFFFH.
Where to locate memory component totally depends on the application.

Memory Interfacing: Example

Interface 4kB of EPROM with starting address from 0000H and 2kB of RAM with
starting address followed by EPROM.
Step-1:
Total EPROM required = 4kB
Chip size available = 4kB
No. of chips required = 4kB/4kB=1

Total RAM required = 2kB

Chip Size Available = 2kB
No. of Chips required = 2kB/2kB=1

Step-2:
EPROM Chip-1:
 Starting Address = 0000H
Chip Size = 4kB (i.e. address Line=12, m/m = 212 = 4096B = 4k)
Ending Address = OFFFH
Step-3:
RAM Chip-1:
Starting address = Ending address of EPROM +1 = OFFFH+1 = 1000H
Chip Size = 2kB = 07FFH
Ending address = 1000H+07FFH = 17FFH
THE END