CHAPTER FOUR

INPUT/OUTPUT ORGANIZATION
I/O SUBSYSTEM ( OR I/O )

The input output subsystem of a computer, referred to as I/O, provides an efficient mode of
communication between the central system and the outside environment. Programs and data must be
entered into computer memory for processing and results obtained from computations must be
recorded or displayed for the user.

A computer serves no useful purpose without the ability to receive information from an outside source
and to transmit results in a meaningful form. The most familiar like keyboard that allows a person to
enter alphanumeric information directly.

The CPU is an extremely fast device capable of performing operations at very high speed. When input
information is transferred to the processor via a slow keyboard, the processor will be idle most of the
time while waiting for the information to arrive. To use a computer efficiently, a large amount of
programs and data must be prepared in advance and transmitted into a storage medium such as
magnetic tapes or disks.

Devices that are under the direct control of the computer are said to be connected on-line. these
devices are designed to read information into or out of the memory unit upon command from the CPU
and are considered to be part of the total computer system.

Peripheral Device (Or I/O Device)

Input or output devices attached to the computer are called Peripherals. Among the most common
peripherals are keyboards, display units, and printer.

Example:
Monitor (Visual Output Device) : CRT, LCD
KBD (Input Device) : light pen, mouse, touch screen, joy stick, digitizer
Printer (Hard Copy Device) : Dot matrix (impact), thermal, ink jet, laser (non-impact)
Storage Device : Magnetic tape, magnetic disk, optical disk

Every time a key is depressed, the terminal sends a binary coded character to the computer. There are
different types of video monitors, but the most popular use a cathode ray tube(CRT). The CRT contains
an electronic gun that sends an electronic beam to a phosphorescent screen in front of the tube. The
beam can be deflected horizontally and vertically. To produce a pattern on the screen, a grid inside the
CRT receives a variable voltage that causes the beam to hit the screen and make it glow at selected
spots. A characteristic feature of display devices is a cursor that marks the position in the screen where
the next character will be inserted. The cursor can be moved to any position in the screen, to a single
character, the beginning of a word,or to any line.

Printers provide a permanent record on paper of computer output data or text. There are three basic
types of character printers. The daisywheel printer contains a wheel with the characters placed along

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the circumference. To print a character, the wheel rotates to the proper position and an energized
magnet then presses the letter against the ribbon.

The dot matrix contains a set of dots along the printer mechanism. For example, a 5 X 7 dot matrix
printer that prints 80 characters per line has seven horizontal lines, each consisting of 5 x 80 = 400 dots.
Each dot can be printed or not, depending on the specific characters that are printed on the line. The
laser printer uses a rotating photographic drum that is used to imprint the character images. The
pattern is then transferred onto paper in same manner as a copying machine.

Disks are used mostly for bulk storage of programs and data. Magnetic disks have high speed rotational
surfaces coated with magnetic material. Other input and output devices encountered in computer
systems are digital incremental plotter, optical and magnetic character readers, analog to digital
converters, and various data acquisition equipment.

Input and output devices that communicate with people and the computer are usually involved in the
transfer of alphanumeric information to and from the device and the computer.

INPUT-OUTPUT INTERFACE

Input output interface provides a method for transferring information between internal storage and
external I/O devices. Peripherals connected to a computer need special communication links for
interfacing them with the CPU.

The purpose of the communication link is to resolve the differences that exist between the central
computer and each peripheral.

The major differences are:

1. Peripherals are electromechanical and electromagnetic devices and their manner of
operation is different from the operation of the CPU and memory, which are electronic
devices. Therefore, a conversion of signal values may be required.
2. The data transfer rate of peripherals is usually slower than the transfer rate of the CPU, and
consequently, a synchronization mechanism may be needed.
3. Data codes and formats in peripherals differ from the word format in the CPU and memory.
4. The operating modes of peripherals are different from each other and each must be
controlled so as not to disturb the operation of other peripherals connected to the CPU.

To resolve these differences, computer systems include special hardware components between the CPU
and peripherals to supervise and synchronize all input and output transfers. These components are
called interface units because they interface between the processor bus and the peripheral device.

In addition, each device may have its own controller that supervises the operations of the particular
mechanism in the peripheral.

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 Processor DATA
Address
Control

Interface Interface Interface Interface

Keyboard and Printer Magnetic Magnetic

display disk tape
terminal

--Connection of I/O bus to input output devices--

There are four types of commands that an interface may receive. They are classified as control, status,
data output and data input.

A control command is issued to activate the peripheral and to inform it what to do. The particular
control command issued depends on the peripheral, and each peripheral receives its own distinguished
sequence of control commands, depending on its mode of operation.

A status command is used to test various status conditions in the interface and the peripheral. For
example, the computer may wish to check the status of the peripheral before a transfer is initiated.
During the transfer, one or more errors may occur which are detected by the interface. These errors are
designated by setting bits in a status register that the processor can read at certain intervals.

A data output command causes the interface to respond by transferring data from the bus into one of
its registers. The interface responds to the address and command and transfers the information from
the data lines in the bus to its buffer register.

The data input command is the opposite of the data output. In this case the interface receives an item
of data from the peripheral and places it in its buffer register.

The processor checks if data are available by means of a status command and then issues a data input
command. The interface places the data in the data lines, where they are accepted by the processor.

ASYNCHRONOUS DATA TRANSFER

The internal operations in a digital system are synchronized by means of clock pulses supplied by clock
pulses supplied by a common pulse generator. Clock pulses are applied to all registers within a unit and
all data transfers among internal registers occur simultaneously during the occurrence of a clock pulse.

Two units, such as a CPU and an I/O interface, are designed independently of each other.
Synchronous Data Transfer
 All data transfers occur simultaneously during the occurrence of a clock pulse
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  Registers in the interface share a common clock with CPU registers

Asynchronous Data Transfer

 Internal timing in each unit ((CPU and Interface) is independent
 Each unit uses its own private clock for internal registers
 This approach is widely used in most compu
computer systems.

Asynchronous data transfer between two independent units requires that control signals be transmitted
between the communicating units to indicate the time at which data is being transmitted.

One way of achieving this is by means of a strobe pulse supplied by one of the units to indicate to the
other unit when the transfer has to occur.

Strobe control:
The strobe control method of asynchronous data transfer employs a single control line to time each
transfer. The strobe may be activated by either the source or the destination unit.

The data bus carries the binary information from source unit to the destination
destination unit. Typically, the bus
has multiple lines to transfer an entire byte or word. The strobe is a single line that informs the
destination unit when a valid data word is available in the bus.

As shown in the timing diagram of Figure, the source unit first places the data on the data bus. After a
brief delay to ensure that the data settle to a steady value, the source activates the strobe pulse. The
information on the data bus and the strobe signal
signal remain in the active state for a sufficient time period
to allow the destination unit to receive the data.

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The source removes the data from the bus a brief period after it disables its strobe pulse. The fact that
the strobe signal is disabled indicates that the data bus does not contain valid data. New valid data will
be available only after the strobe is enabled again.

Figure shows a data transfer initiated by the destination unit. In the case the destination unit activates
the strobe pulse, informing the source to provide the data. The source unit responds by placing the
requested binary information on the data bus. The data must be valid and remain in the bus long
enough for the destination unit to accept it. The destination unit then disables the strobe. The source
removes the data from the bus after a predetermined time interval.

In many computers the strobe pulse is actually controlled by the clock pulses in the CPU. The CPU is
always in control of the buses and informs the external units how to transfer data.

Handshaking
The disadvantages of the strobe method is that the source unit that indicates the transfer has no way of
knowing whether the destination unit has actually received the data item that was placed in the bus.
Similarly, a destination unit that indicates the transfer has no way of knowing whether the source unit
has actually placed the data on the bus.

The handshake method solves this problem by introducing a second control signal that provides a reply
to the unit that initiates the transfer.

One control line is in the same direction as the data flow in the bus from the source to the destination. It
is used by the source unit to inform the destination unit whether there are valid data in the bus. The
other control line is in the other direction from the destination to the source. It is used by the
destination unit to inform the source whether it can accept data. The sequence of control during the
transfer depends on the unit that initiates the transfer.

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 Source-initiated handshake

Destination-initiated
Destination handshake
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Asynchronous Serial Transfer
The transfer of data between two units may be done in parallel or serial.
 In parallel data transmission, each bit of the message has its own path and the total message is
transmitted at the same time. This means that an n-bit
n bit message must be transmitted through n
separate conductor paths.

 In serial data transmission, each bit in the message is sent in sequence one at a tim
time. This
method requires the use of one pair of conductors or one conductor and a common ground.

 Parallel transmission is faster but requires many wires. It is used for short distances and where
speed is important.

 Serial transmission is slower but is le

less
ss expensive since it requires only one pair of conductors.

Serial transmission can be synchronous or asynchronous.

Synchronous transmission:
 The two unit share a common clock frequency
 Bits are transmitted continuously at the rate dictated by the clock pulses

Asynchronous transmission:
 Special bits are inserted at both ends of the character code
 Each character consists of three parts :
1) start bit : always “0”, indicate the beginning of a character
2) character bits : data
3) stop bit : always “1”

Asynchronous transmission rules

 When a character is not being sent, the line is kept in the 1-state
1
 The initiation of a character transmission is detected from the start bit, which is always “0”
 The character bits always follow the start bit
 After the last bit of the character is transmitted, a stop bit is detected when the line returns to
the 1-state
state for at least one bit time (stop bits : 1, 1.5, 2)

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Input And Output Organisation- Modes Of Data Transfer
Accessing I/O Devices:-

->Most modern computers use single bus arrangement for connecting I/O devices to CPU & Memory
-> The bus enables all the devices connected to it to exchange information
->Bus consists of 3 set of lines : Address, Data & Control Lines
->Processor places a particular address (unique for an I/O Dev.) on address lines
->Device which recognizes this address responds to the commands issued on the Control lines
-> Processor requests for either Read / Write
-> The data will be placed on Data lines

I/O INETRFACE:-

-> It is a special hardware used to connect the I/O device to the bus , i.e, I/O interface.

->The I/O module has 3 section:-

(a)Address decoder:- It enables the device to recognize its address when this address appears on the
address lines.

(b)Data register:- The data register holds the data being transferred to or from the processor.

->The status register contains information relevant to the operation of the I/O module.

* Both the data and status register are connected to the data bus.

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MODES OF DATA TRANSFER:-
1.Programmed I/O Mode:-

-> In programmed I/O mode data are exchanged between the processor and the I/O module. When a
processor is executing a program and encounters an instruction relating to I/O, it executes that instruction
by issuing a command to that appropriate I/O module. With programmed I/O the I/O module will perform
the requested action and then set the appropriate bit in the I/O status register .

-> The I/O module takes no further action to alert the processor (it doesn’t interrupt the processor).

-> The I/O commands issued by the processor to the I/O module

 Test
 Control
 Read
 Write

2.Memory Mapped I/O:-

->There is a single address space for memory location and I/O devices.( the address space is shared)

->With memory mapped I/O a single read line a single write line are needed on the bus. The bus may
be equipped with memory read and write plus Input and output command lines.

->Now the command lines specifies whether the address refers to memory location or an I/O device.

->Most CPU uses memory mapped I/O.

-> Always CPU assigns address to memory some of memory space is stolen and assigned to I/O device.

->It deals with fewer address lines.

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3.Interrupt Driven I/O:-

->In this method the program issues an I/O command and than continues to execute untill it is interrupted
by the I/O hardware to signal the end of I/O operation.

-> Here the program enters a wait loop in which it repeatedly checks the device status. During this
process the processor is not performing any useful computation.

->There are many situations where tasks can be performed while waiting for an I/O device to be ready, to
allow this the I/O device should alert the processor when it becomes ready. It can be done by sending a
hardware signal called an interrupt.

->The routine executed in response to an interrupt request is called Interrupt Service Routine(ISR).

->The processor first completes execution of instruction then it loads the program counter(pc) with the
address of 1st instruction of ISR.

4.Direct Memory Access:-

->In this method the input and output devices read/write information from the main memory
without interference of the CPU through the system bus.

-> For I/O transfer, processor determines the status of I/O by:

 Polling
 Waiting for interrupt signal.

->Considerable Overhead is incurred in above I/O transfer processing.

->By DMA approach , large blocks of data at high speed can be sent between external device and main
memory.

DMA CONTROLLER:-

->It allows the data transfer between I/O device and memory.

->DMA controllers acts a processor but it is controlled by the CPU. To initiate the transfer of a block of
words, the processor sends the following data to controller

 Starting address of memory block

 The word count
 Control to specify the mode of transfer such as read or write.
 A control to start the DMA transfer.

->The DMA controller performs the required I/O operation and send a interrupt to the processor
upon completition.

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