coa Chapter 2
coa Chapter 2
A logic gate is an elementary building block of a digital circuit. It is a circuit with one output and one or more
inputs. At any given moment, logic gate takes one of the two binary conditions low (0) or high (1), represented
by different voltage levels.
A voltage level will represent each of the two logic values. For example +5V might represent a logic 1 and 0V
might represent a logic 0.
There are three fundamental logic gates namely, AND, OR and NOT. Also we have other logic gates like NAND,
NOR, XOR and XNOR. Out of these NAND and NOR gates are called the Universal Gates. The circuit symbol
and the truth table of these logic gates are explained here.
AND Gates
The AND Gate has two or more input signals but only one output signal. All the inputs must be high to get a
high output. If we have two inputs to this AND gate and both the inputs are high then the output will be high
otherwise the output will be low. All the possible inputs and outputs are shown in the following table.
Truth Table
A B Y
0 0 0
(Output) A
0 1 0 Y=A.B
1 0 0
B Y
1 1 1
AND Gate symbol AND function
OR Gates
The OR gates has two or more input signals but only one output signal. If any input signal is high, the
output signal is high. If we have two inputs to this OR gate and any of the two inputs is high then the
output will be high. This can be shown in a table below with all the possible inputs and corresponding
outputs.
Truth Table
A
A B Y
0 0 0
(Output) Y=A+B
0 1 1 B Y
1 0 1 b
1 1 1 b
OR Gate symbol OR function
NOT or Inverter:
A Low input produces a high output, and a high input produces low output. In binary format if the input is
0 the output will be 1 and if the input is 1 then the output will be 0. The table shows the input and output
possibilities.
Input Output
0 1 Y=A
1 0
NOT Gate symbol NOT function
NAND Gate
NAND Gate is a combination of an AND gate with an inverter. An AND Gate followed by an inverter.
A Page 1 of 14
A
B Y B Y
Whatever the output of the AND gate, it will be inverted by the inverter. This is the formation of NAND
gate. The sign and the table is shown below. The NAND operation is called Universal Operation or gate.
Y = AB
A B Y
NAND Sign 0 0 1
(Output)
0 1 1
1 0 1
1 1 0
NOR Gate
NOR Gate is a combination of an OR gate with an inverter. An NOR Gate followed by an inverter.
The NOR operation is also a Universal Operation or Gate.
A
Y
B
A B Y
Y = A+B 0 0 1
(Output)
0 1 0
NOR Sign 1 0 0
1 1 0
Exclusive OR Gate
An OR Gate recognizes with one or more 1s as inputs and gives output as 1. The Exclusive-OR is different;
it recognizes only that have odd number of 1s. The following table shows different inputs and outputs.
A B Y (Output)
Y= A XOR B 0 0 0
Y= A B 0 1 1
Ex-OR sign 1 0 1
1 1 0
Y
Y=A B+A B
B
Page 2 of 14
A
Y
B
A A
B Y B Y
Y= A ENOR B A B Y
Y= A B 0 0 1
(Output)
Ex-NOR sign 0 1 0
1 0 0
1 1 1
They are CMOS (Complementary Metal – Oxide Semiconductor), TTL (Transistor – Transistor Logic) and ECL
(Emitter – Coupled Logic).
BOOLEAN ALGEBRA
Boolean Algebra is mathematical system for formulating logical statements with symbols so that problems can
be solved in a manner to ordinary algebra.
Boolean algebra is the mathematics of digital systems
A basic knowledge in the Boolean algebra required to study and analysis of logic circuits.
It is a convenient and systematic way of expressing and analyzing the operations of logic circuits.
Combinational circuits are those logic circuits whose operations can be completely described by a truth table
/ Boolean expression. A combinational circuit is realized using AND, OR, NOT gates (or NAND OR NOR gates).
Examples of combinational circuits are: adder, subtractors, code converters, decoders, encoders, digital
multiplexers, demultiplexers, programmable logic arrays, ROMs etc.,
Logic circuits for some important arithmetic operations are half-adder and full adder.
HALF ADDER:
A logic circuit which performs addition of two binary bits is called a half-adder.
Truth table for the addition of two binary bits.
Inputs Outputs
A B Sum S Carry C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
It is concluded that the sum is equal to A XOR B. It means that the outputs of an EXCLUSIVE-OR gate will give
the sum. The carry is equal to A AND B. The output of an AND gate will give the carry.
S= A B + A B
Sum
=A B A Sum S
HALF
C=AB B SS A
ADDER
Carry
B
C
Carry
C Page 4 of 14
FULL ADDER
A logic circuit which performs addition of three binary bits is called a Full-adder.
A full adder can be built using two half adders and an OR gate.
Inputs Outputs
A B C Sum S Carry C
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
S= x y z
C= z (x y) + xy
A Carry
HALF
ADDER Carry
B Sum A
Y
HALF Carry
ADDER
Sum
Page 5 of 14
FLIP FLOPS:
The flip flop is a bistable device. It exists in one of two states and, in the absence of input, remains in that
state. Thus, the flip flop can function as a 1 bit memory.
The flip flop has two outputs, which are always the complementary of each other; these are generally labelled
Q and Q
First, Let us show that the circuit is bistable. Assume that both S and R are 0 and that Q is 0. The inputs to the
lower NOR gate are Q = 0 and S = 0. Thus, the output Q = 1 means that the inputs to the upper NOR gate are
Q=1 and R=0, which has the output Q = 0.
Thus, the state of the circuit is internally consistent and remains stable as long as S = R = 0. A similar line of
reasoning shows that the state Q = 1, Q = 0 is also stable for R = S = 0.
Thus, this circuit can function as a 1-bit memory. Suppose that S changes to the value 1. Now the inputs to the
lower NOR gate are S =1 , Q =0. After some time delay t, the output of the lower NOR gate will be Q = 0.
R characteristic Table
Q
S R Qn+1
0 1 Qn
0 1 0
1 0 1
S Q 1 1 --
So, at this point in time, the inputs to the upper NOR gate become R=0 , Q = 0. After another gate delay of t,
the output Q becomes 1. This is again a stable state. The inputs to the lower gate are now S = 1, Q =1, which
maintain the output Q=0. As long as S =1 and R =0, the outputs will remain Q =1, Q = 0. Furthermore, if S
returns to 0, the outputs will remain unchanged.
Observe that the inputs S = 1, R =1 are not allowed, because these would produce an inconsistent output (
both Q and Q equal 0).
Page 6 of 14
Clocked S-R Flip-Flop:
The output of the S-R latch changes, after a brief time delay, in response to a change in the input. This is
referred to as asynchronous operation. More typically, events in the digital computer are synchronized to a
clock pulse, so that changes occur only when a clock pulse occurs. This type of device is referred to as a
clocked S-R flip-flop. Note that the R and S inputs are passed to the NOR gates only during the clock pulse.
R
Clock
D Flip – Flop:
One problem with S-R flip flop is that the condition R = 1, S = 1 must be avoided. One way to do this is to allow
just a single input. The D flip flop accomplishes this. By using an inverter, the two AND gates are guaranteed to
be the opposite of each other.
The D flip flop is sometimes referred to as the data flip flop because it is, in effect, storage for one bit of data.
the output of the D flip flop is always equal to the most recent value applied to the input. Hence, it
remembers and produces the last input. It is also referred to as the delay flip flop, because it delays a 0 or 1
applied to its input for a single clock pulse.
clk
Q
D
Page 7 of 14
J-K Flip-Flop:--
Like the S-R flip flop, it has 2 inputs. However, in this case all possible combinations of input values are valid.
In its characteristic table, we can note that the first three combinations are the same as for the S-R flip-flop.
With no input, the output is stable. The J input alone performs a set function, causing the output to be 1; the
K input alone performs a reset function, causing the output to be 0. When both J and K are 1, the function
performed is referred to as the toggle function: the output is reversed.
SEQUENTIAL CIRCUITS
A sequential circuit is an interconnection of Flip-flops and Gate. A sequential circuit consists of a
combinational logic and storage elements. The output of a sequential circuit is not only a function of a present
inputs but also of past inputs.
The state of the storage elements depends upon the preceding inputs and the preceding states of the
elements. To realize sequential circuits in addition to AND, OR and NOT gates, flip-flops are also required.
Examples of sequential circuits are: registers, shift registers, counters, etc.,
The sequential circuits which employ clock are called synchronous sequential circuits. In a synchronous
sequential circuit all memory elements are clocked latches or clocked flip flops. The design and operation of
sequential circuits is greatly simplified by the use of clock signals.
The sequential circuits which do not employ clock are known as unclocked or asynchronous sequential
circuits. Unclocked sequential circuits are difficult to design and therefore, they are relatively uncommon.
Page 8 of 14
example of a Sequential Circuits
It has one input variable x, one output variable y, and two clocked D flip flops. The AND gates, OR gates,
and inverter form the combinational logic part of the circuit. The interconnections among the gates in the
combinational circuit can be specified by a set of Boolean expression. The part of the combinational circuit
that generates the inputs to flip-flops are described by a set of Boolean expressions called flip-flop input
equations.
DIGITAL COMPONENTS
Integrated Circuits(IC)
Digital circuits are constructed with Integrated Circuits
An Integrated Circuits is a small silicon semiconductor crystal, called chip
The various gates are interconnected inside the chip to form the required circuit
The chip is mounted in a ceramic or plastic container, and connections are welded by thin gold wires to
external pins to form the integrated circuits
The number of pins may range from 14 in a small IC package to 100 or more in a larger package
Each IC has a numeric designation printed on the surface of the package for identification
Page 9 of 14
Plastic/Ceramic Pin Grid Array
o SSI, MSI, LSI: They perform small tasks such as addition of few bits. small memories,
small processors
o VLSI Tasks: - Large memory - Complex microprocessors, CPUs
Decoder
A combinational circuit that converts binary information from the n coded inputs to a maximum of 2n
unique outputs
o n-to-m line decoder = n x m decoder i.e., n inputs, m outputs
Selectors / Enable (active high or active low)
The truth table of 2-to-4 Decoder
Page 10 of 14
A 3-to-8 Decoder constructed with two with 2-to-4 Decoder
Encoders
Perform the inverse operation of a decoder
2n (or less) input lines and n output lines
Multiplexer (MUX)
A multiplexer can use addressing bits to select one of several input bits to be the output.
A selector chooses a single data input and passes it to the MUX output
Page 11 of 14
It has one output selected at a time.
D0
DIGITAL
D1
MULTIPLEXER
INPUT D2 OUTPUT SIGNAL
SIGNALS .
.
DN
SELECT LINES
FIG: DIGITAL MULTIPLEXER
4 to 1 line multiplexer
Consists of:
Inputs (multiple) = 2n
Output (single)
Registers
A group of flip-flops with each flip-flop capable of storing one bit of information
An n-bit register has a group of n flip-flops and is capable of storing any binary information of n bits
The simplest register consists only of flip-flops, with no external gate :
Parallel Registers:
A parallel register consists of a set of 1-bit memories that can be read or written simultaneously. It is used to
store data.
The 8 bit register of figure illustrates the operation of a parallel register using D flip flops. A control signal,
labelled load, controls writing into the register from signal lines, D11 through D18. These lines might be the
output of multiplexers, so that data from a variety of sources can be loaded into the register.
Page 12 of 14
Data Lines
D Q D Q D Q D Q D Q D Q D Q D Q
CLk --
Load---
D08 D07 D06 D05 D04 D03 D02 D01
Output Lines
--8-bit Parallel Register--
Shift Registers
A register capable of shifting its binary information in one or both directions
The logical configuration of a shift register consists of a chain of flip-flops in cascade
The simplest possible shift register uses only flip-flops
The serial input determines what goes into the leftmost position during the shift
The serial output is taken from the output of the rightmost flip-flop
Counter
o Used for counting the number of occurrences of an event and useful for generating timing signals to
control the sequence of operations in digital computers
o An n-bit binary counter is a register of n flip-flop(count from 0 to 2n -1)
Counters can be designated as asynchronous or synchronous, depending on the way in which they operate.
Asynchronous counters are relatively slow because the output of one flip flop triggers a change in the status
of the next flip flop.
In synchronous counter, all of the flip flops change state at the same time. This type is much faster, it is the
kind used in CPUs.
Memory Unit
A collection of storage cells together with associated circuits needed to transfer information in and out of
storage. The memory stores binary information in groups of bits called words
Read-Only Memory
o A memory unit that performs the read operation only; it does not have a write capability.
o ROM comes with special internal electronic fuses that can be
“programmed” for a specific configuration.
m x n ROM :
�k address input lines to select one of 2k = m words of memory,
and n output lines(n bits word).
o ROM is classified as a combinational circuit, because the outputs are
a function of only the present inputs(address lines).
�There is no need for providing storage capabilities as in a RAM.
o ROM is also employed in the design of control units for digital computers.
�A Control Unit that utilizes a ROM to store binary control information is called a micro-programmed
control.
Types of ROMs
�UVEPROM(Chip level erase), EEPROM(Byte level erase), Flash ROM(Page or block level erase)
Page 14 of 14