Lect 2 ETEN403 Microcontroller and Embedded System Applications
Lect 2 ETEN403 Microcontroller and Embedded System Applications
COMPUTER
SYSTEM
CPU
INTER
CONNECTION
MEMORY
I/O DEVICES
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
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CPU
I/O 0
R/W MEMORY
CPU is responsible for sequentially fetching instruction and data from the
memory and stored temporarily inside the CPU and then execute one after
the other. The result may be stored inside the CPU or back to the memory.
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a) Overflow
b) Outcome (‘+tive’ or ‘_tive’)
c) Parity of the result
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User Accessible
Not User Accessible
General Purpose
User Accessible
Special Purpose
MAR
Not MDR
User
Accessible IR
TEMP
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ACC (8)
GENERAL
B (8) C (8)
D (8) E (8) PURPOSE
H (8) L (8)
REGISTERS
PC (16)
SP (16)
PSW Flag bit S – Z – AC – P - CY
CARRY
PARITY
AUXILIARY CARRY
ZERO
SIGN
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Note: Flag bits are very important for implementing various types of
control loops or decision making & they are useful in writing programs for
different applications.
BC • Cascading register B
&C
DE • Cascading register D
&E
HL • Cascading register H
&L
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ARITHMETIC OPERATIONS
ADDITION
SUBTRACTION
INCREMENT
DECREMENT Note: Arithmetic operation are restricted
to 8-bit DATA.
LOGICAL OPERATIONS 16-bit and 32-bit ADDITION will not be
AND possible. One has to write program for
such bits additions.
OR
EXOR
NOT
CLEAR
COMPARE
SHIFT/ROTATE
Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
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ETEN403 Microcontroller and Embedded System Applications
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Vcc
+5V GND
TRAP
AD0-7
8
INTERRUPT RST 7.5
INPUTS
RST 6.5
A8-15
CPU RST 5.5
0
& INTR RD
BUS
CONTROL INTA
WR
RESET-IN
8
RESET-OUT IO/M MEMORY
AND
HOLD ALE I/O
CONTROL
HLDA READY
5
CRYSTAL X1
INPUTS
X2 S0
STATUS
SERIAL SID
S1 LINES
I/O SOD
LINES
A8-15 AD0-7 20
ETEN403 Microcontroller and Embedded System Applications Lecturer: Engr. Dr. M. J. MUSA MCOREN, MNIAE, MIAENG, MMACE.
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