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15.Two marks with answers

The document outlines a series of questions and answers related to Embedded Systems and IoT design for third-year Electronics and Communication Engineering students. It covers topics such as ARM processors, CPU performance evaluation, embedded system design, and various operating system concepts. Additionally, it includes definitions, comparisons, and explanations of key terms and principles relevant to the subject matter.

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0% found this document useful (0 votes)
34 views32 pages

15.Two marks with answers

The document outlines a series of questions and answers related to Embedded Systems and IoT design for third-year Electronics and Communication Engineering students. It covers topics such as ARM processors, CPU performance evaluation, embedded system design, and various operating system concepts. Additionally, it includes definitions, comparisons, and explanations of key terms and principles relevant to the subject matter.

Uploaded by

kingsly
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING

ET3491 – EMBEDDED SYSTEMS AND IOT DESIGN


TWO MARKS WITH ANSWERS

III YEAR ELECTRONICS AND COMMUNICATION


ENGINEERING
VI SEMESTER
ACADEMIC YEAR 2023 - 2024
EVEN SEMESTER

Prepared by
Dr.A.Kingsly Jabakumar
Associate Professor & Head
Department of ECE
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

UNIT II
EMBEDDED SYSTEMS

1. What is the purpose of supervisor mode?

It is provided by CPU. This mode has privileges that user modes do not have. The ARM
instruction that puts the CPU in supervisor mode is called SWI.

2. State the functions of coprocessor.

These are attached to the CPU and implement some of the instructions. For example, floating-
point arithmetic was introduced into the Intel architecture by providing separate chips that
implement the floating-point instructions.

3. Differentiate top-down and bottom-up design.

4.List the functions of ARM Processor in Supervisor mode.

The argument of the SWI instruction is a 24-bit immediate value that is passed on to the
supervisor mode that allows the program to request various services.

5.Enumerate various issues in real time computing.

•Complex algorithms
•Complex user interface
•Data must be ready by deadline
•Multirate data to be handled
•Manufacturing cost and power are critical

6.Write short notes on ARM processor.


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

It is a family of RISC architectures that have been developed over many years. ARM7 is a Von
Neumann architecture, while ARM9 is Harvard architecture. It is also a load store architecture.

7.What are the instruction set features useful for embedded programming?

•Fixed and Variable length instructions


•Various addressing modes
•Operand sizes must be variable
•Different types of operations must be supported

8.What are the parameters used to evaluate the CPU performance?

•Pipelining
•Superscalar execution
•Caching

9.What is function of exceptions?

They are generally implemented as a variation of interrupt. Handlers are defined for different
types of internal errors that can be generated.

10.How is ARM processor different from other processors?

It is a family of RISC architectures that have been developed over many years. ARM7 is a Von
Neumann architecture, while ARM9 is Harvard architecture. It is also load store architecture.
It supports fast interrupt requests too.

11. When is Application Specific System processors (ASSPs) used in an embedded system?

In computers, an ASSP (application-specific standard product) is a device integrated


circuit product that is dedicated to a specific market and sold to more than one user (and
thus,"standard"). The ASSP is to multiple customers just as a general-purpose product is, but to a
smaller number of customers since it is for a specific application. Like an (application-specific
integrated circuit), the ASSP is for a special application, but it is sold to any number of
companies. (An ASIC is designed and built to order for a specific company).

12.What are the various embedded system design model refining/partitioning techniques?

•Abstract co-design finite-state machines


•Extended co-design finite-state machines
 Components System Integration Architecture Specification Requirements
•Using Unified Modeling Language

13.What is an embedded computer system?

An Embedded system is one that has computer hardware with software embedded in it as one
of its most important component. The three main components of an embedded system are1.Hardware2.
Main application software3.RTOS
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

14. Sketch the major levels of abstraction in the design process

.
15. Define Embedded systems.

A Device that includes programmable computer but is not itself intended to be a


general purpose computer is called as embedded computers.
Eg: Fax, automobiles.

16. What are the main components of an embedded system?

The main three components of an embedded system are hardware main application software
RTOS.

17. Why Microprocessors are used in embedded computing?

•They are an efficient way to implement digital systems.


•They make it easier to design families of products that can be built to provide various feature sets
ate different price points and can be extended to provide new features to keep up with rapidly changing
market.

18. What are the characteristics of Embedded Systems?

Embedded computing systems have to provide sophisticated functionality.


Embedded computing operation must be performed to meet deadlines.
Manufacturing cost and power consumption.

19. What are the challenges of Embedded Systems?

•How much hardware do we need?


• How do we meet deadlines?
•How do we minimize power consumption?
•How do we design for upgradeability?
•Does it really work? - Complex Testing

20. List the Design Process in Embedded Systems.

Requirements, Specification Architecture Components System Integration.

21. What is meant by Harvard Architecture and Von Neumann Architecture?

In Von Neumann architecture the computer memory holds both data and instructions whereas
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

Harvard machines holds separate memories for data and program.

22. What is meant by UML Language?

Unified Modeling Language is used to conceptualize the various steps of the design processes
diagrams such as creating requirement and specifications, architecting the system, designing code and
designing tests.

23. Name some of the events in Behavioral Description.

Signal, Call Event, Time-out event..

24. What happens when interrupt is encountered by the processor?

When interrupt is encountered by the processor the control is immediately transferred to the
Interrupt Service Routine which contains the handler for the interrupt.

25. Differentiate Supervisor mode and User mode.

It is provided by CPU. This mode has privileges that user modes do not have. The ARM
instruction that puts the CPU in supervisor mode is called SWI.

26. Define Co- Processor.

These are attached to the CPU and implement some of the instructions. For example, floating-
point arithmetic was introduced into the Intel architecture by providing separate chips that
implement the floating-point instructions.

27. What is the difference between process and processor?

Process is a program under execution and a processor is the device that executes the program.

28. Differentiate microcontroller and microprocessor.


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

29. Define cache.


Cache is an on chip memory device for improving data access speeds to reduce the access time of the
main memory for every data operation.

30. Define Cache hit and Cache miss.

When the data to be fetched is present in the cache it is called Cache hit but when the data
required is not present in the cache it is called cache miss and then it has to be fetched from main
memory.

31. Write a note on pipelining?

When one instruction is being executed the fetch unit is idle and this time is efficiently
utilized by prefetching the next opcode by the bus. This is called pipelining.

32. Define Superscalar Execution.

Used to improve CPU performance where the CPU can execute more than one instruction ata time.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

UNIT III
PROCESSES AND OPERATING SYSTEMS

1. What is meant by control bus in a CPU?

Control bus carries control signals R/W’, Data Ready, Interrupt signals.

2. Can latches be used to construct input ports? Justify.

Latches are level sensitive whereas flip flops are edge sensitive, if input ports are constructed
using latches they become transparent to inputs when enabled and in most processors
wewrite‘1’ to the port to enable it which obviates the reason. So latches are a better choice for
input ports.

3. What is the bus protocols especially, the four-cycle handshake?

• Device 1 raises its output to signal an enquiry


• When Device 2 is ready to receive, it sends acknowledgement
• After data transfer Device 2 lowers its output
• After seeing this release of acknowledgement, Device 1 lowers its output

4. What is meant by Little Endian and Big Endian Mode?

In Little Endian mode the lowest order byte resides in the lower order bits of the word whereas
in Big Endian mode the lowest order byte resides in the higher order bits of the word.

5. What are CPU buses?

It is a collection of wires and it defines a protocol by which the CPU, memory and devices
communicate.

6. Define CPSR Register in ARM Processor.

Current Program Status Register is set automatically during arithmetic, logical or shifting
operation. Negative Flag, Zero Flag, Carry Flag and Overflow Flag is present.

7. What are the different CPU buses? State the function of each one.

Clock – For synchronization/W’ – Differentiates bus Read or Write operation


Address – Bundle of signals that transmits the address of an access Data – Bundle of signals
that carry data Ready’ – Signals when data on data bus is valid

8. What are the four types of data transfer used in USB?


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

• Control Transfer• Isochronous Transfer• Interrupt Transfer• Bulk Transfer

9. Define Bus protocol?

Bus protocol is a set of rules for communication between Processor. Memory and Devices.

10. Name the types of RAM?

Static RAM and Dynamic RAM are the two major categories of RAM.

11. Name the types of ROM.

Factory Programmable ROM, Field Programmable ROM – Anti-fuse programmable ROM,UV


Erasable PROM, Flash PROM.

12. Define CISC and RISC.

CISC RISC
It provides a number of addressing modes It provides very few addressing modes
It has micro programmed unit with a control memory It has a hardwired unit without a control
memory
An easy compiler design Complex compiler design

13. What is Glue Logic?

It is required when a device is connected to a bus for which it is not designed for.

14. What is meant by Host and Target system?

Part of the software development is done on a workstation or Host System. The


hardware on which the code will finally run is called as the Target System.

15. List the Software and Hardware debugging Techniques.

Software Debugging – Breakpoint, CPU Simulators. Hardware Debugging – Logic


Analyzer, In circuit Emulation.

16. What is DMA?

Direct Memory Access is used for bulk data transfers. It takes control of data bus and
processor leaves its control of the bus for a while and DMA becomes the bus master and CPU
becomes free to execute some other internal operations.

17. List the advantages of Flash memory?

It is electrically erasable memory and can be reprogrammed inside a typical system and
allows memory to erase as blocks not as a whole.

18. Define Procedure In lining.


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

An in lined procedure does not have a separate procedure body and procedure linkage
rather the body of the procedure is substituted in place of the procedure call.

19. What are the two modes of operation of Logic Analyzer?

State mode and Timing mode

UNIT II
EMBEDDED SYSTEMS (Assembly, Linking and Loading & Program level performance
analysis)
1.State the principle of basic compilation techniques.
High level language code is parsed and symbol table is generated and is semantically analyzed
and machine independent optimizations are done, instruction level optimizations are performed
and assembly codes are generated.
2.Give the limitations of polling technique.
Polling technique cannot be used for prioritizing the interrupt inputs, therefore high priority
requests might remain pending while Low priority requests are being served.
3.Name any two techniques used to optimize execution time of a program.
Try to use registers efficiently and analyze cache behavior to avoid cache conflicts.
4.What does a linker do?
The linker translates relative addresses into absolute addresses and produces an Executable
Binary File.
5.What is a data flow graph?
It is a model of a program with no conditionals.
6.What is the difference between Timers and Counters?
Timer has its count input connected to an periodic signal whereas Counter has its count input
connected to an aperiodic signal.
7.Define Watch Dog Timer.
It is an I/O device used for internal operation of a system. CPU’s software is designed to reset
the watch dog timer periodically and prevents it from overflowing. If program hangs then this
timer overflows and resets the processor automatically.
8.Define the function of in-circuit Emulator?
It is a specialized hardware tool that can help debug software. It is a special version of
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

microprocessor that allows its internal registers to be read out when stopped.
9. What is a cross compiler?
It is compiler that runs on one type of machine but generates code for another.
10.What are the different types of Programming Model?
Data Flow Graphs, Control / Data Flow Graphs.
11.What are the power optimization strategies used for processes?
•Power up the system when the request is received
•Predictive Shutdown
Predict when the next request will arrive and start the System just in time.
12. Mention the uses of interrupt service routines?
Whenever an interrupt occurs the Interrupt Service Routine is invoked which consists of the
handler for the specific interrupt that occurs.
13.List the three conditions that must be satisfied by the re -entrant functions?
•The functions should not use variables in a non-atomic way
•The function should not call any other functions that are non-re-entrant
•The function should not be non-re-entrant by itself
14. Brief on predictive shut down.
Predictive Shutdown
Predict when the next request will arrive and start the system just in time to optimize power
consumption.
15.Why do you use infinite loop in embedded software?
Embedded software run on real time systems which keep running continuously, just for
instance an ATM machine can be considered which keeps waiting for a user to swipe his card,
which is again an aperiodic process with unlimited inter arrival time. In such cases an infinite
loop is used.
16.What is watchdog timer?
It is an I/O device used for internal operation of a system. CPU’s software is designed to
reset the watch dog timer periodically and prevents it from overflowing. If program hangs then
this timer overflows and resets the processor automatically.
17.Define kernel.
In computing, Kernel is a computer program that manages input/output requests from
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

Software and translates them into a data processing instruction for the central processing unit
and other devices of a computer. It is fundamental part of a modern computer operating system
18.List the difference between General purpose OS and RTOS.
•RTOSs are used in applications where the response must be close to real time as possible, but
Oss focuses on computing throughput.
•Oss use time sharing architecture but RTOSs uses the same with few number of Processes and
also uses Event Driven Design/Architecture.
•Coding practices are much stricter for RTOSs when compared to OS.
19.What is handshaking in bus interface?
Handshaking is a process of exchanging control signals in a systematic way so that data
can be exchanged between two devices.
20.Why do you need at least one timer device in an embedded system?
Timer devices are needed in an embedded system to synchronize the operation of all the
interconnected components.
21.What is meant by Debounce Logic?
When you press a key on your computer, you expect a single contact to be recorded
by your computer. In fact, however, there is an initial contact, a slight bounce or lightening up
of the contact, then another contact as the bounce ends, yet another bounce back, and so forth.
A similar effect takes place when a switch made using a metal contact is opened. The usual
solution is a debouncing device or software that ensures that only one digital signal can be
registered within the space of a given time (usually milliseconds).
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

UNIT III
PROCESSES AND OPERATING SYSTEMS (Task assignment and scheduling, Distributed
Embedded Systems)

1.List the names of various Scheduling Algorithms.

Rate Monotonic and Earliest Deadline First Scheduling Algorithm.


2.What is context switching?
Context switching is the mechanism for moving the CPU from one executing process to
another. But the switch must be bug free.
3.List the process scheduling policies.
Rate Monotonic and Earliest Deadline First Scheduling policies.
4.What are hardware accelerators?

These are a specific hardware attached to CPU buses to quickly execute certain functions. They
can provide large performance increases for applications with computational kernels that spend
a great deal of time in a small section of code.

5.State some of the networks dedicated for embedded systems.

I2C, CAN and SHARC Link ports.

6.Brief on Processes.

Processes are programs under execution. There are two types Light Weight and Heavy Weight
Processes.

7.List the OSI layers from lowest to the highest level of abstraction.

Physical Layer, Data Link Layer, Network Layer, Transport Layer, Session Layer, Presentation
Layer and Application Layer.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

8.What is a distributed embedded architecture?

It is the organization of a distributed embedded system, its basic units are Processing
Elements which can be instruction set processor or non programmable units also.

9.What does a scheduler do in an operating system environment?

The scheduler decides which process has to be sent to the CPU next for execution.

10.State the advantages of Network based design.

The jobs can be scheduled and allocated to processing elements based on their computation
time and all the embedded networks are designed for low cost. One part of the system can be used
to diagnose the other part.

11.What is the use of attaching accelerator to CPU?

These are a specific hardware attached to CPU buses to quickly execute certain functions. They
can provide large performance increases for applications with computational kernels that spend
a great deal of time in a small section of code.

12.State the important requirements to develop Network based embedded Systems.

a.When the devices with which the PEs communicate are physically separated.
b.The system has component subsystems that have their own embedded processors.
c.To meet real time requirements.

13.What are the merits of embedded distributed architecture?

The jobs can be scheduled and allocated to processing elements based on their computation
time and all the embedded networks are designed for low cost. One part of the system can be used
to diagnose the other part of the system.

14.Differentiate counting semaphore and binary semaphore.

Counting Semaphore : It takes a count value of integer data type and every time it is taken the
count is decremented and when it reaches zero the task is blocked. Binary Semaphore: It can take
only 0/1, when taken it takes value of 1 and when released It takes value of 0.

15.What is priority inheritance?

Priority Inheritance is the solution for Priority Inversion problem where a low priority task
executes whereas a high priority task keeps waiting. When semaphores are taken the task that has
taken the semaphore inherits the priority of the highest priority task that it blocks to avoid
priority inversion.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

16.List the two ways of assigning priorities?

Fixed Priority and Dynamic Priority Schemes.

17.What is SMTP & HTTP?

Simple Mail Transfer Protocol (SMTP) is an Internet standard for electronic mail (e-mail)
transmission. First defined by RFC 821 in 1982, it was last updated in 2008 with the Extended
SMTP additions by RFC 5321 - which is the protocol in widespread use today. SMTP by default
uses TCP port 25. The Hypertext Transfer Protocol (HTTP) is an application protocol for
distributed, collaborative, hypermedia information systems. HTTP is the foundation of data
communication for the World Wide Web. Hypertext is structured text that uses logical
links(hyperlinks) between nodes containing text.

18.Write the significance of stub code?

A stub is a small program routine that substitutes for a longer program, possibly to be loaded
later or that is located remotely. For example, a program that uses Remote Procedure Calls is
compiled with stubs that substitute for the program that provides a requested procedure. The stub
accepts the request and then forwards it (through another program) to the remote procedure. When
that procedure has completed its service, it returns the results or other status to the stub
which passes it back to the program that made the request.

19.Define round robin scheduling.

Round-robin (RR) is one of the algorithms employed by Process Scheduler and Network
Scheduler in Computing. As the term is generally used, time slices are assigned to
each process in equal portions and in circular order, handling processes without priority (also
known as Cyclic Executive). Round-robin scheduling is simple, easy to implement, and Resource
Starvation-free. Round-robin scheduling can also be applied to other scheduling problems, such as
data packet scheduling in computer networks.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

UNIT III
PROCESSES AND OPERATING SYSTEMS (Interprocess Communication Mechanisms)

1.Give any two properties of an Operating System.

•OS defines a job which has predefined sequence of commands, programs and data as a single
unit.
• OS keeps a number a jobs in memory and executes them without any manual information.

2.Define: Multitasking

Multitasking is the process of running multiple tasks simultaneously in different ways. Examples
are Co-routines, Cooperative Multitasking and Preemptive Multitasking

3.What do you mean by co-design?

The hardware and software must be designed together to make sure that the implementation not
only functions properly but also meets the goals of performance, cost and reliability.

4.What is a Set-top box. List out its advantages.

A set-top box or set-top unit is an information appliance device that generally contains a TV-
tuner input and displays output connects to a television set and an external source of signal, turning the
source signal into content in a form that can then be displayed on the television screen or other
display device.

5.What is PDA?

Short for personal digital assistant, a handheld device that combines computing, telephone/fax,
Internet and networking features. A typical PDA can function as a cellular phone,
fax sender, Web browser and personal organizer. PDAs may also be referred to as a palmtop, hand-
held computer or pocket computer.

6.List the major components in the Personal Digital Assistant system


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

a. Screen Display
b. Power Section (including Battery)
c. Built in memory
d. PDA Operating System / Software

7.What are FOSS tools?

Free and open-source software (FOSS) is Computer Software that can be classified
as both Free Software and Open Source Software. That is, anyone is freely licensed to use,copy, study,
and change the software in any way, and the source code is openly shared so that people are
encouraged to voluntarily improve the design of the software. This is in contrast to Proprietary
Software, where the software is under restrictive Copyright and the source code is usually hidden from
the users.

8.Why do most designers use Foss tools in embedded system development?

a. Lots of ready to use components for most parts of the system. Lets you focus on the
innovative part of your product, what differentiates it.
b. You do not need to wait for months or years for some features to be implemented by others.
At least, you can implement the critical ones that you need.
c. Constant innovation. Features brought in at a quick pace, sometimes even before you need
them.
d. Possible to port Linux to a new innovative architecture. Easy to port your entire system then.

9.What is signal servicing function?

Signals are one form Inter Process Communication mechanisms where one process carries
message to nearby process. It might be of one bit length and might not hold any information by itself.

10.Give the steps to destroy a message queue.

In vxworks msqQDelete( ) function is used to eliminate the message queue by freeing the
memory.

11.What are the functions of network layer and data link layer in network enabled systems.

Network Layer defines the basic end to end data transmission service. It is important in multi
hop networks. The purpose of Data link layer is Error Detection and control over a single link.

12. Distinguish between coprocessor and multiprocessor.

Co- processor is tightly coupled with the parent processor and performs specific designated
functions. Other I/O Programmable Processor
Keyboard/Pointer
Video decomp
Display
Speech Codec
Wireless Network Interface
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

Multiprocessors are loosely coupled processors that are independent of each other in a distributed
architecture.

13.What is the H/W and S/w Debugging?

Hardware debugging is carried out using Logic Analyzer, In circuit emulator to check the
correctness of the system. Software debugging is implemented using Breakpoints and CPU Simulators.

14. What are the Design Challenges of SOS?

•Traditional Embedded System debugging becomes impractical.


•Fabrication of chip takes weeks or months.
•The circuit cannot be modified.
•Fabrication is very expensive.
•Observing signals is very difficult.

15. List the layers between application and hardware in PDA.

There is a hardware and software platform between the application layer and
underlying peripherals in PDA but there is no network layer functions in between.
16. What is an Application Specific Instruction Set processor?
To meet highly specialized processing requirements in their SoCs, designers often turn to
application-specific instruction-set processors (ASIPs), which offer more architectural specialization as
well as instruction and data – level parallelism compared to general-purpose processors.

17. Brief on the term “first-time correctness”.

The cost of mistakes are very expensive in System – on – Silicon since fabrication itself takes
a long time and the chances of debugging and monitoring signals is quite impractical therefore first-
time correctness is aimed at.

18. Write a note on Frequency Shift Keying.

It is a technique used in 1200-baud modem. This scheme transmits sinusoidal tones with 0and 1
assigned to different frequencies.

19. List the two different ways of testing a modem system.

By having the modem’s transmitter send bits to its receiver or by connecting two different modems.

21.Write a short note on Huffman coding.


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

It is used for text compression in Data Compressor. It uses the information on the frequency of
characters to assign variable length codes to characters. If shorter bit sequences are used to
identify more frequent characters, then the length of the total sequence will be reduced.

22.What are the major inter process communication mechanisms?

Shared Memory and Message Passing Mechanisms.

23.What is meant by multirate systems?

In multirate systems, certain operations must be executed periodically and each operation is
executed at its own rate.

24. Why is context Switching needed? List its types.


Context switching is the mechanism for moving the CPU from one executing process to
another. But the switch must be bug free. Examples are- Cooperative Multi-tasking and Preemptive
Multitasking.

25.Define the term scheduling in RTOS?

Scheduling is the mechanism by which tasks are dispatched to the processor according to any
policy so that the process completes by its deadline.

26.How many states can a process be in? List them.

A process can be in any of the three scheduling states: waiting, ready, executing.

27.Mention the roles of Operating Systems?


When job completes its execution, its memory is released and the output for the job gets copied
into an output spool for later printing or processing by the OS, it defines a task, Context switching is
done without manual intervention.

28.What is meant by Inter Process Communication?

Processes often need to communicate with each other. Inter Process


Communication is provided by the operating system as a part of process abstraction. A process
can send either a blocking or a non-blocking communication.
29.Write about Shared Memory Problem.

Two CPUs share a common address location, each of them see that flag indicates ready, and
both of them write to the same location leading to conflict. This problem can be solved by using
semaphores.

30.What are Signals in operating systems?

Signals are mechanisms used in operating systems for Inter Process Communication. It is
analogous to an interrupt but is entirely a software creation. Eg: Signals is POSIX – SIGALRM,
SIGPIPE, SIGILL, SIGSEGV.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

31.Distinguish between Multi-tasking and Multi-process Systems.

The need to structure programs to perform multiple tasks is the motivation behind
introducing the notion of a process. Eg: In Telephone Answering Machine – Recording a phone call
and operating the user control panel are two different tasks but both are run at different rates.

32.How does pre-emption help in meeting deadlines?

When a task with higher priority (with respect to deadline etc.,) arrives then the lower
Priority task is pre-empted since it has only a later deadline / finishing time.

33.Mention the roles played by Ethernet, Internet and Myrinet.

Ethernet is a widely used local area network for general purpose computing. Internet uses a
fundamental protocol that provides connectionless packet based Communication. Myrinet is a
high performance network that provides a full duplex connection.

UNIT I
8051 MICROCONTROLLER
1. What is microcontroller?
A single IC which contains the microprocessor with integrated peripherals like memory,
serial ports, parallel ports, timer/counter, interrupt controller, data acquisition interfaces like
ADC, DAC is called Microcontroller. CPU ROM RAM Timers I/O Ports Serial Port
Internal blocks of Microcontroller.
2. Compare Microprocessor and Microcontroller
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

3. List the features of 8051.


Features of 8051 are:
o Data size is 8-bit

o Address lines is 16-bit

o Memory capacity of On-chip RAM is 128 Bytes

o Memory capacity of On-chip ROM is 4 KB

o Total program memory space is 64KB

o Total data memory space is 64KB

o On-chip Timers - 2 x 16-bit each

o 4 x 8-bit I/O Ports

o One full duplex Serial port (TxD & RxD)

o Six Interrupt sources (inclusive of two H/w interrupts – INT0, INT1

4. List the alternate functions of Port 3 in 8051.


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

5. What is the significance of EA pin?


EA stands for External Access. By applying LOW to this pin, makes 8051 to omit internal
4KB on-chip ROM and use only external memory for program storage. By applying HIGH
to this pin, makes 8051 to use internal 4KB on-chip ROM along with external memory for
program storage
6. Draw the program memory organization in 8051

7. Draw the data memory organization in 8051


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

8. Draw the internal RAM memory organization in 8051

9. What is Program Status Word?


PSW is another name for Flag register. It holds various flags, which are useful for the
programmer to test the condition of the result and make decisions. The format of PSW of 8051
microcontroller is shown in fig below

The PSW consists of four math flags and two register bank select bits. The math flags are
Carry, Auxiliary Carry, and Overflow and Parity flags. The register bank select bits RS1
and RS0 are used to select any one of the four register banks of the internal RAM. At any
instant, the microcontroller can work with (or access) only one register bank, which is
selected by these bits
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

10. State the function of RS1 and RS0 bits in the flag register of 8051

11. List the various registers used in 8051.


The registers used in 8051 are Accumulator (A), B-Register, Stack Pointer (SP), Program
counter (PC), Flag Register (PSW), Data Pointer (DPTR), Timer Registers (TH0, TL0, TH1,
TL1) and other SFRs

12. Define Stack Pointer.


The stack pointer is 8 bit register which points the stack top. It is incremented before data is
stored during PUSH and CALL instructions. After reset of the processor, the SP is 07H.

13. Define Program Counter.


Program counter is a 16 bit register which holds the 16-bit address of the program
instruction currently executed by the processor. PC is automatically incremented after every
fetch of instruction byte from the memory for its execution.
14. What is the significance of DPTR?
DPTR is a 16-bit register which is used as Data Pointer for external data memory. It holds
the 16-bit address of the data stored in the external data memory. This can also be used as two
numbers of 8-bit data pointers namely DPH and DPL. The 8-bit data pointers are used for
accessing internal RAM and SFR. The contents of data pointer are programmable using
instructions

15. List the Special Function Registers (SFRs) :


The 21 internal registers which form SFR are listed in table below. Each register of SFR has
one byte address (between 80H and FFH). Some of the registers are both byte and bit
addressable (the registers whose address ends with 0H or 8H are bit addressable). These
registers can be accessed either by their names or by their 8-bit address in direct addressing
mode.
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

16. Draw the structure of a pin in port 1

17. Why all pins of a port is loaded with value “FF” before using it?
All ports of 8051 are configured by default as Output port. Hence, to make it configured as
Input Port, all pins of a port are loaded with value “FF” i.e., 1111 1111.
18. Justify why the crystal oscillator frequency in 8051 is chosen as11.0592Mhz.
When an 8051 microcontroller based system is connected to an external serial
communication device, the speed of the data transfer should be in standard baud rates such as
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

4800, 9600, etc. Only XTAL (Crystal Oscillator) of 11.0592 MHz can provide such standard
baud rates, after down scaling down by 12, 32 at UART and by a factor set in timer register
TH1.

19. Draw the format of TMOD register of 8051

20. List the modes of Timer in 8051.


The modes of timer in 8051 are chosen with the help of two bits, viz., M0 & M1 in TMOD
register. The different modes of timer are as follows.

21. What is the significance of C/T bit in TMOD register of 8051?


The C/T bit in the TMOD register is a selector bit for the type of operation we want to
perform in the timer register. HIGH in that bit indicates Counter operation and LOW in that
bit indicates Timer operation.

22. What is the significance of TRx bit in TCON register of 8051?


TRx bit in the TCON register is used to Start / Stop the timer register for both timer and
counter operation, by setting that bit with value ‘1’ or ‘0
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

23. Explain the Timer operation of 8051.


In this mode, the timer register is used to generate the time delay using the clock signal
applied to the processor. An initial count is loaded in the timer register. When the timer is
started, the timer register content gets incremented after every machine cycle. When the
timer register crosses (i.e., overflows) the count FFFFH and goes to 0000H,the timer
overflow flag in TCON register becomes set. Hence, by loading appropriate value in the
timer register, a specific time delay can be generated using timer. One machine cycle
consists of 12 clock signal periods and the delay is equal to count value loaded * time
period of one machine cycle.

24. Explain the Counter operation of 8051


In this mode, the timer register is used to count the external events with thehelp of external
pulses received through the counter input (t0 & T1).An initial count is loaded in the timer
register. When the timer is started, thetimer register content gets incremented after every
external pulse. When thetimer register crosses (i.e., overflows) the count FFFFH and goes to
0000H,the timer overflow flag in TCON register becomes set. Hence, by loading appropriate
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

value in the timer register, counting of external event can be performed using timer

25. List the Interrupt sources in 8051.


The Six Interrupt sources in 8051 are
 RESET
 INT0, INT1
 TF0, TF1
 SPI (TI/RI)
26. Define Baud rate.
Baud Rate: It is the speed of serial data transfer, expressed in bits/sec.The standard baud
rates are110, 150, 300, 600, 1200, 2400, 4800, 9600, 19200…

27. What are the types of serial communication?


The serial communication can be,
o Synchronous (continuous)

o Iso-Synchronous (with regular time intervals)

o Asynchronous (with irregular time intervals)


III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

UNIT IV
IOT ARCHITECTURE AND PROTOCOLS

1. Define IoT
By embedding short range mobile transceivers into a wide array of additional gadgets and
everyday items, enabling new forms of communication between people and things and between
things
IoT is the network of physical objects i.e devices, vehicles, buildings and other items embedded
with electronics, software, sensors, and network connectivity that enables these objects to
collect and exchange data.
2. How IoT differ from traditional computing
IoT data differs from traditional computing. The data can be small in size and frequent in
transmission. The numbers of devices, or nodes, that are connecting to the network are also
greater in IoT than in traditional PC computing.
3. List the characteristics of the Internet of Things
o Interconnectivity
o Heterogeneity
o Things related services
o Dynamic changes

4. List the advantages of IoT


o Improved customer engagement and communication
o Support for technology optimization
o Support wide range of data collection
o Reduced waste
5. What do you mean autonomy in IoT
It can be realized by implementing self-managing systems. Self-management is the property of
a system to achieve management and maintenance of its resources intrinsically and internally.
Management and maintenance is realized through many levels of decision making
6. What is M2M communication/
M2M communication is a form of data communication that involves one or more entities that
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

do not necessarily require human interaction or intervention in the process of communication.


7. What are the key features of M2M communication?
1. Low mobility: M2M devices do not move and if moves only within a certain area.
2. Time controlled: Data can be send or receive only at certain predefined time periods.
3. Time tolerant: sometimes data transfer can be delayed
4. Packet switched: Network operator to provide packet switched service
8. What is M2M device?
A device that runs application using M2M capabilities and network domain functions.
An M2M device is either connected straight to an access network or interfaced to M2M
gateways via an M2M area network
9. What is the use of MQTT?
MQTT is designed for high latency, low bandwidth or unreliable networks. The design
principle minimizes the network bandwidth and device resource requirements.
MQTT is a light weight broker based publish /subscribe messaging protocols designed to be
open, simple, light weight and easy to implement.
10. What is the need for IoT systems management
Automating configuration
Monitoring operational and statistical data
Improved reliability
System wide configurations
Multiple systems configurations
Retrieving and reusing configurations

11. What is NETCONF?


NETCONF is a session based network management protocol. The NETCONF protocol is based
upon remote procedure call, a client/server protocol that allows one program to request a
service from another program without having to understand network details.
12. List the limitations of SNMP.
SNMP is stateless in nature and each SNMP request contains all the information to process the
request.
SNMP is connectionless protocol which uses UDP as the transport protocol
MIBs often lack writable objects without which device configuration is not possible using
SNMP
It is difficult to differentiate between configuration and state data in MIBs
Retrieving the current configuration from a device can be difficult with SNMP. Earlier versions
of SNMP did not have strong security features.
13. Discuss requirement of network operator
Ease of use
Distinction between configuration and state data
Fetch configuration and state date separately
Configuration of the network as a whole
Configuration transactions across devices
Configuration database schemes
Comparing configurations
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

14. Define Modbus


Modbus is a serial communication protocol for use with programmable logic controllers. It is
typically used to transmit signals from instrumentation and control devices back to main
controller, or data gathering system, for example a system that measures temperature and
humidity and communicate the results to a computer. It is an open protocol developed by
Modicon
15. What is CAN bus
The controller Area network bus uses bit-serial transmission. CAN runs at rates of 1 MB/s over
A twisted pair connection of 40m.An optical link can also be used .The bus protocol supports
multiple masters on the bus
16. Define Ethernet
Ethernet is a kind of local area network for general purpose computing. Because of its low cost
it is use as a network for embedded computing. Ethernet is particularly useful when PC s are
used as platform.

UNIT V
IOT SYTEM DESIGN
1. List the typical IoT device
Typical IoT devices are CPU,GPU, memory interfaces, USB host, Ethernet, I/O interface like
SPI,UART and CAN ,storage interface like MMC and SD.
2. List various IoT communication protocol
IoT communication models are request/response model, publish/subscribe model,push/pull
model and exclusive pair model
3. What is python?
Python is an object oriented, high level programming language with integrated dynamic
semantics primarily for web and app development
4. List and explain features of python
Python is simple and minimalistic language
Easy to learn
Free and open source
Python supports procedure oriented programming as well as object oriented programming
Extensive libraries: The python standard library is huge indeed
Embeddable: You can embed python within your C/C++ programs to give scripting capabilities
for your programs users
5. List the benefits of python
III YEAR ELECTRONICS AND COMMUNICATION ENGINEERING EVEN SEMESTER

Python allows for a more productive coding environment than massive languages like C # and
java
Python powers Django, a complete and open source web application framework
Most automation, data mining and big data platforms rely on python
Python supports modules and packages which encourages program modularity and code reuse
6. What is Raspberry pi
Raspberry pi is the name of a series of single board computers made by tge Raspberry pi
foundation. The original Pi had a single core 700 MHz CPU and just 256 MB RAM and the
latest model has a quad core 1.4 GHZ CPU with 1 GB RAM
7. What are the different Raspberry pi model types
Model A(Introduced later as a hardware reduced model)
Model B(Introduced first and is the full hardware model)
8. Explain difference between Model A & Model B of RASPBERRY PI
Parameters Model A Model B
GPU type Video core IV Video core IV
USB port 1 2
memory 256 mb 512mb
Ethernet port Mo Ethernet port 10/100 Ethernet
SoC type Broadcom BCM2837b0 Broadcom BCM2837b0
Number of cores 4 4
Type It is hardware reduced model It is hardware reduced model

9. What is GND in GPIO?


GND means ground pins. Ground GPIO pins are physical numbers 6,9,14,20,25,30,34,39
10. Define Raspberry pi hardware
Raspberry pi hardware includes ARM processor ,GPU,RAM & USB port

11. What is raspbian OS


Raspbian is a free operating system based on debian optimized for the raspberry Pi hardware
An operating system is the set of basic programs and utilities that make your raspberry pi run
However Raspbian provides more than a pure OS : It comes with over 35000 packages pre-
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compiled software bundled in a nice format for easy installation on your raspberry pi
As Raspberry is a linux operating system it has good security features has excellent networking
capabilities
12. What is smart parking
Smart parking systems are typically obtains information about available parking spaces in a
particular geographic area and process is designed by making us eof someIot supportable
hardwares such as Raspberry pi,uridino boards etc
13. When urban centers are labeled as smart
Urban centers are labeled as smart when they leverage technologies to improve the
management of common resources such as street space or waste collection and improve the
quality of urban life for citizens

14. What are consequences for smart parking use cases?


Contributes to pollution
Increases traffic incidents
Causes motorist frustration
15. What is smart irrigation system?
The smart irrigation system was developed to optimize water use for agricultural crops.The
system has a distributed wireless network of soil moisture and temperature sensors placed in the
root zone of the planets .Wireless transmitter unit is comprised of a soil moisture sensor , a
microcontroller a RF transceiver and power source. Several WTU can be incorporated in filed
to form a distributed network of sensors

Faculty in charge HOD/ECE

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