JSPM’s

Rajarshi Shahu College of Engineering Tathawade Pune

Electronics & Telecommunication Dept

S. Y. B. Tech
Academic Year 2020-21
Subject Name: Digital System Design

Unit-1
Combinational logic Design
 Number System

1) Decimal number
2) Binary
3) Octal number
4) Hexadecimal number

1) What is binary of decimal 12

Quotient Remainder
12/2 6 0 LSB
6/2 3 0
3/2 1 1
1/2 0 1 MSB
12= 1100

MSB- Most significant bit LSB-Least significant bit

2) What is binary of 23 3) What is binary of 35

 Number System
Binary to decimal conversion

1) 11111.11

1x24 + 1x23 + 1x22 + 1x21 + 1x20 +1x2-1 +1x2-2

16+8+4+2+1+0.5+0.25

(31.75)
2) 110001.101
3) 1110001
4) 1110011
5) 100001
Decimal to octal conversion
247 quotient Remainder
247/8 30 7 least significant
30/8 3 6
3/8 0 3 Most significant
247 = 367 octal number
 Number System
Decimal Octal Binary Decimal Octal Binary
0 0 000 11 13 1011
1 1 001 12 14 1100
2 2 010 13 15 1101
3 3 011 14 16 1110
4 4 100 15 17 1111
5 5 101
6 6 110 1) Convert 1001110 to to its octal equivalent
7 7 111
001 001 110
8 10 1000
116
9 11 1001 2) Convert (0.10100110) to its equivalent octal
10 12 1010 number
0.101 001 100
0.514
It is highly inconvient to handle long strings of binary numbers. It may cause error also, therefore, the knowledge of octal number system is
very important
 Number System

Hexadecimal Number System

Decimal Hexadecimal Binary Decimal Hexadecimal Binary

0 0 0000 9 9 1001
1 1 0001 10 A 1010
2 2 0010 11 B 1011
3 3 0011 12 C 1100
4 4 0100 13 D 1101
5 5 0101 14 E 1110
6 6 0110 15 F 1111
7 7 0111
Hexadecimal to decimal conversion
8 8 1000 3A.2F
3x161 + 10x160 + 2x16-1 + 15x16-2
58.1836
 Binary Arithmetic

Binary Addition

Augend Addend sum carry

0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Binary subtraction

Minuend Subtrahend Diff Borrow

0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
 Signed binary number system

1) Sign magnitude
2) One’s complement 3) Two’s complement

 8 = 01000 8 = 01000 8 = 01000

 -8 = 10111
-8 = 10111 one’s complement
 -8 = 11000 1 add 1
= 11000
 Two’s Complement Arithmetic
. This 2’s complement concept eliminates the need of additional circuits for subtraction .

rather the same adder circuit is used two times to perform subtraction

1 1 1
1) Perform binary subtraction using two’s
complement representation of negative
numbers
0111
i) 7
1011
-5
2
1 0 01 0
7 = 0111 Discard carry Ans
5 = 0101
1’s comp of 5 =1010
is positive
+
2’s comp of 5 1011
1 =2
 ii) 5 5 = 0101 -7 = 0111 0101
 -7 One’s complement of 7 1000 + 1001
 -2 (1110) + 1 1110
 Two’s complement of 7 1001 Ans = -2 Ans is Two’s
o complement form
 If carry =0, ans is negative and it is in its 2’complement form.
 Two’s Complement Arithmetic
i) 48 + (-23)

48 = 0110000 -23 = 0010111 0110000

1101000 1101001 Ans is positive
48 1 1 0011001 Ans = 25
-23 1101001
25 Discard carry

ii) -48 + (-23) -48 = 0110000 -23 = 0010111 11010000 10111001

1001111 1101000 11101001 01000110
-48 1 1 1 10111001 1
-23 1010000 1101001 01000111
-71 Discard carry. Ans is positive but should
be negative ie -71
-48 1010000
-23 1101001
1 0111001 Sign of answer is positive, wrong output
If the two operands are the same sign, the sign bit of the result is to be compared with sign bit of
operands.
In case sign bits are same, the result is correct and is in two’s complement form.
If the sign bits are not same there is problem of overflow.
 Assignment

1) Convert (725.25) octal to its decimal binary and hexadecimal

2) Covert (11001011.01110) binary into decimal
3) Convert decimal number 61.3 to binary.
4) Convert octal number 574 to binary & decimal.
5) Convert A92H ot octal
6) Convert following number to hexadecimal
i) (3608)8 ii) (2262)10 decimal iii) (10011.1101) binary
7) Convert (268.75) decimal to binary, octal and hexadecimal
8) Convert the following hexadecimal into their equivalent decimal and octal numbers
i) (23867)H ii) (368170.AB)H
 Logic Gates
Truth Table of NOT gate IC 7404
A Y

0 1

1 0

Truth Table of AND GATE (IC 7408)

A B Y

0 0 0
0 1 0
1 0 0
1 1 1

Truth Table of OR GATE ( IC 7432)

A B Y

0 0 0
0 1 1
1 0 1
1 1 1
Logic Gates
Truth Table of NAND Gate IC 7400
A B Y

0 0 1
0 1 1
1 0 1
1 1 0

Truth Table of NOR Gate IC 7402

A B Y
0 0 1
0 1 0
1 0 0
1 1 0

Truth Table of XOR Gate IC 7486

A B Y
0 0 0
0 1 1
1 0 1
1 1 0
 Boolean Algebra
In 19th Century an English mathematician George Boole developed rules for manipulations of binary variables,
known as boolean algebra

Theorem No. Theorem

1.1 A+0=A
1.2 A.1=A
1.3 A+1=1
1.4 A.0=0
1.5 A+A=A
1.6 A.A=A
1.8 A+A’=1
1.9 A.(B+C)=AB+AC
1.10 A+BC=(A+B)(A+C)
1.11 A+AB=A
 A+0=A
 A=1, 1+0=1
 A=0, 0+0=0
Basic Theorem of Boolean Algebra

T1 : Properties of 0
(a) 0 + A = A
(b) 0 A = 0
T2 : Properties of 1
(a) 1 + A = 1
(b) 1 A = A
 Basic Theorem of Boolean Algebra

T3 : Commutative Law
(a) A + B = B + A
(b) A B = B A
T4 : Associate Law
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)
T5 : Distributive Law
(a) A (B + C) = A B + A C
(b) A + (B C) = (A + B) (A + C)
(c) A+A’B = A+B
Basic Theorem of Boolean Algebra

T6 : Indempotence (Identity ) Law

(a) A + A = A
(b) A A = A

T7 : Absorption (Redundance) Law

(a) A + A B = A
(b) A (A + B) = A
Basic Theorem of Boolean Algebra

T8 : Complementary Law
(a) X+X’=1
(b) X.X’=0
T9 : Involution
(a) x’’ = x
T10 : De Morgan's Theorem
(a) (X+Y)’=X’.Y’
(b) (X.Y)’=X’+Y’
 Boolean Algebra

Theorem No. Theorem

1.12 A(A+B)=A 1) Boolean algebraic theorem are
used for the Manipulations of logic
1.13 A+A’B=(A+B)
expression.
1.14 A(A’+B)=AB
1.15 AB+AB’=A
1.16 (A+B)(A+B’)=A
1.17 AB+A’C=(A+C)(A’+B)
1.18 (A+B)(A’+C)=AC+A’B
1.19 AB+A’C+BC=AB+A’C
1.20 (A+B)(A’+C)(B+C)=(A+B)(A’+C)
1.21 (A.B.C)’=A’+B’+C’
1.22 (A+B+C)’=A’.B’.C’
 Boolean Algebra

Truth table to prove theorem 1.10

A B C BC A+BC A+B A+C (A+B).(A+C)

0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
0 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
1 1 1 1 1 1 1 1
Demorgan’s theorem
Y=A+A’B+AB’
Y=A+A’B+AB’
 =A(1+B’)+A’B 1+B’=1
 =A+A’B ( A+A’)(A+B)
=A+B
 Boolean Algebra
Reduce equation using Boolean algebra

Conclusion :Reduction of equation before

Y= A’BCD’ + BCD’ + BC’D’ + BC’D Three I/P 3 AND gate, 4I/P AND gate, 4 I/P OR gate

implementation is very important

= BCD’(A’+1) + BC’D’ + BC’D [A + 1 = 1]
= BD’(C+C’) + BC’D
= BD’ + BC’D

▪ Reduction of hardware
= B(D’ + C’D)
= B (D’ + C’)
Two 2I/P AND gate , one 2 I/P OR gate

▪ Reduction of size
Y= A + A’B + AB’
= A + A’B + AB’ [A + A’B = A + B]

▪ Reduction of power requirement

= A + B + AB’
= A + A +B
=A+ B Sum Of
▪ Reduction of cost
Y = AC + C(A+A’B) Product
= AC + AC + A’BC
= AC + A’BC SOP
= C(A + A’B)
= C(A + B)
 Digital Design

Digital circuits are divided into two broad categories

1) Combinational logic
2) Sequential logic

In combinational circuits, the outputs of any instant of time depend upon the inputs
present at that instance of time. This means there is no memory in these circuits.
1) Mux
2) Demux
3) Logic gates

Sequential circuit
1) Flip flop
2) Shift register
3) counter
 Hardware Circuit

The representation of Eq. is known as sum-of products (SOP) form.

Y = (A+BC)(B+C’A)
This can be realised using AND-OR configuration. This realisation is
Hardware circuit of above equation
known as two level realisation. The first level consist of AND gates
Which gates , we will use
and the second level consist of OR gate.
By making use of the De-Morgan’s Theorem we can write equation

SOP equation
as

implemented
using Only NAND
gates
Sum of product form
Y= (A+BC) (B+C’A)
Y=AB + AC’A + BBC +BCC’A
A.A.C’ = (A.A) . C’ = AC’ Theorem 1.6
B.B.C = (B.B).C = BC Theorem 1.6
BCC’A =B.(C.C’).A = B.0.A = 0. Theorem 1.4

Y = AB + AC’ + BC
 Hardware Circuit
Hardware circuit
Products of Sums form

Y = (A + BC) (B +C’A)
Theorem A + BC = (A + B) (A + C) using this
theorem
Y = (A + B) (A + C) (B + C’) (B + A)
Theorem 1.6 A.A = A
Y= (A + B) (A + C) (B + C’)
The representation of above is known as
product-of-sums (POS) form. This can be
realised using OR-AND gates as shown in Fig.

Above equation can be realised using NOR gates only. This realisation is given in Fig. which is two level realisation.
Hence, if we express the equation in POS form we can always design the circuit using
only one type of gates (NOR).
To design any digital circuit

Problem statement
Functional table
Functional table Using

equation
equation
Logical
Logical equation reduction
method

Circuit
Minterm and Maxterm for 4 variable

ABC Minterm (m) Maxterm (M)

000 A’B’C’=m0 A+B+C=M0 Minterm
0=complement
001 A’B’C=m1 A+B+C’=M1 1=uncomplement
010 A’BC’=m2 A+B’+C=M2
011 A’BC=m3 A+B’+C’=M3
100 AB’C’=m4 A’+B+C=M4
Maxterm
101 AB’C=m5 A’+B+C’=M5 0=uncomplement
1=complement
110 ABC’=m6 A’+B’+C=M6
111 ABC=m7 A’+B’+C’=M7
 Minterm/ Maxterm for 4 variable
ABCD Minterm Maxterm ABCD Minterm Maxterm
0000 A’B’C’D’=m0 A+B+C+D=M0 1100 ABC’D’=m12 A’+B’+C+D=M12
0001 A’B’C’D=m1 A+B+C+D’=M1 1101 ABC’D=m13 A’+B’+C+D’=M13
0010 A’B’CD’=m2 A+B+C’+D=M2 1110 ABCD’=m14 A’+B’+C’+D=M14
0011 A’B’CD=m3 A+B+C’+D’=M3 1111 ABCD=m15 A’+B’+C’+D’=M15
0100 A’BC’D’=m4 A+B’+C+D=M4
0101 A’BC’D=m5 A+B’+C+D’=M5
0110 A’BCD’=m6 A+B’+C’+D=M6
0111 A’BCD=m7 A+B’+C’+D’=M7
1000 AB’C’D’=m8 A’+B+C+D=M8
1001 AB’C’D=m9 A’+B+C+D’=M9
1010 AB’CD’=m10 A’+B+C’+D=M10
1011 AB’CD=m11 A’+B+C’+D’=M11
 Logical Equation writing from table
Problem Statement :

A B C Y 1) SOP (Sum of product)

Write the minterms for which output is 1
0 0 0 0
0 0 1 1
0 1 0 1 Y=A’B’C+ A’BC’+AB’C’+ABC
0 1 1 0
F(A,B,C)= ∑ m(1,2,4,7)
1 0 0 1
1 0 1 0 Canonical SOP (Standard SOP ) : SOP equation in which all
product terms contains all input variables
1 1 0 0 (complement/uncomplement)
1 1 1 1
Each individual term in canonical SOP form is called
minterm.
 Logical Equation writing from table
Problem Statement :

A B C Y 2) POS (Product of sum)

0 0 0 0
Y=(A+B+C)(A+B’+C’)(A’+B+C’)(A’+B’+C)
0 0 1 1
0 1 0 1 F(A,B,C)=∏ M(0,3,5,6)
0 1 1 0
1 0 0 1 Canonical POS (Standard POS) : POS equation in which all
1 0 1 0 product terms contains all input variables
(complement/uncomplement)
1 1 0 0
1 1 1 1 Each individual term in canonical POS form is called
MAXterm.

SOP and POS are complement of each other.

SOP to Standard SOP

 Following SOP equation convert into canonical SOP equation-

 AND with sum of complement and uncomplete form of missing variable.
 Y=AB + AC’ + BC

 Y=AB(C+C’) + AC’(B+B’) + BC(A+A’)

 Y=ABC+ABC’+ABC’+AB’C’+ABC+A’BC
 Y=ABC+ABC’+AB’C’+A’BC
POS to Standard POS

 Following equation convert into canonical form

 Y=(A+B) (A+C) (B+C’)

 ORing with product term of complement and uncomplement form of missing variable

 =(A+B+C.C’) (A+B.B’+C)(A.A’+B+C)
 =(A+B+C)(A+B+C’)(A+B+C)(A+B’+C)(A+B+C)(A’+B+C)
 =(A+B+C)(A+B+C’)(A+B’+C)(A’+B+C)
Kmap
 3A.1 Introduction
37

 Simplification of Boolean functions leads to simpler (and

usually faster) digital circuits.
 Simplifying Boolean functions using identities is time-
consuming and error-prone.
 This special section presents an easy, systematic
method for reducing Boolean expressions.
 3A.1 Introduction
38

 In 1953, Maurice Karnaugh was a

telecommunications engineer at Bell Labs.
 While exploring the new field of digital logic and its
application to the design of telephone circuits, he
invented a graphical way of visualizing and then
simplifying Boolean expressions.
 This graphical representation, now known as a
Karnaugh map, or Kmap, is named in his honor.
 3A.2 Description of Kmaps
39
and Terminology
 A Kmap is a matrix consisting of rows and
columns that represent the output values of a
Boolean function.
 The output values placed in each cell are derived
from the minterms of a Boolean function.
 A minterm is a product term that contains all of
the function’s variables exactly once, either
complemented or not complemented.
 3A.2 Description of Kmaps
40
and Terminology
 For example, the minterms for a function having
the inputs x and y are:
 Consider the Boolean function,
 Its minterms are:
 3A.2 Description of Kmaps
41
and Terminology
 Similarly, a function
having three inputs,
has the minterms
that are shown in
this diagram.
 3A.2 Description of Kmaps
42
and Terminology
 A Kmap has a cell for each
minterm.
 This means that it has a cell
for each line for the truth table
of a function.
 The truth table for the function
F(x,y) = xy is shown at the
right along with its
corresponding Kmap.
 3A.2 Description of Kmaps
43
and Terminology
 As another example, we give
the truth table and KMap for
the function, F(x,y) = x + y at
the right.
 This function is equivalent to
the OR of all of the minterms
that have a value of 1.
 Thus:
 3A.3 Kmap Simplification
44 for Two Variables
 Of course, the minterm function that we derived
from our Kmap was not in simplest terms.
That’s what we started with in this example.
 We can, however, reduce our complicated
expression to its simplest terms by finding adjacent
1s in the Kmap that can be collected into groups
that are powers of two.
• In our example, we have two
such groups.
– Can you find them?
 3A.3 Kmap Simplification
45 for Two Variables
 The best way of selecting two groups of 1s
form our simple Kmap is shown below.
 We see that both groups are powers of two
and that the groups overlap.
 The next slide gives guidance for selecting
Kmap groups.
 3A.3 Kmap Simplification
46 for Two Variables
The rules of Kmap simplification are:
• Groupings can contain only 1s; no 0s.
• Groups can be formed only at right angles;
diagonal groups are not allowed.
• The number of 1s in a group must be a power
of 2 – even if it contains a single 1.
• The groups must be made as large as possible.
• Groups can overlap and wrap around the sides
of the Kmap.
 3A.3 Kmap Simplification
55 for Three Variables
 A Kmap for three variables is constructed as
shown in the diagram below.
 We have placed each minterm in the cell that will
hold its value.
Notice that the values for the yz combination
at the top of the matrix form a pattern that is
not a normal binary sequence.
 3A.3 Kmap Simplification
56 for Three Variables
 Thus, the first row of the Kmap contains all
minterms where x has a value of zero.
 The first column contains all minterms where y
and z both have a value of zero.
 3A.3 Kmap Simplification
57 for Three Variables
 Consider the function:

 Its Kmap is given below.

What is the largest group of 1s that is a
power of 2?
 3A.3 Kmap Simplification
58 for Three Variables
 This grouping tells us that changes in the
variables x and y have no influence upon the
value of the function: They are irrelevant.
 This means that the function,

reduces to F(x) = z.

You could
verify this
reduction with
identities or a
truth table.
 3A.3 Kmap Simplification
59 for Three Variables
 Now for a more complicated Kmap. Consider the
function:

 Its Kmap is shown below. There are (only) two

groupings of 1s.
Can you find them?
 3A.3 Kmap Simplification
60 for Three Variables
 In this Kmap, we see an example of a group that wraps
around the sides of a Kmap.
 This group tells us that the values of x and y are not
relevant to the term of the function that is encompassed
by the group.
 What does this tell us about this term of the function?

What about
the green
group in the
top row?
 3A.3 Kmap Simplification
61 for Three Variables

 The green group in the top row tells us that only the
value of x is significant in that group.
 We see that it is complemented in that row, so the
other term of the reduced function is .
 Our reduced function is:

Recall that we
had six minterms
in our original
function!
 3A.3 Kmap Simplification for Four
62 Variables
 Our model can be extended to accommodate the
16 minterms that are produced by a four-input
function.
 This is the format for a 16-minterm Kmap.
 3A.3 Kmap Simplification for Four
63 Variables
 We have populated the Kmap shown below with the
nonzero minterms from the function:

 Can you identify (only) three groups in this Kmap?

Recall
that
groups
can
overlap.
 3A.3 Kmap Simplification for Four
64 Variables
 Our three groups consist of:
A purple group entirely within the Kmap at the
right.
A pink group that wraps the top and bottom.
A green group that spans the corners.
 Thus we have three terms in our final function:
 3A.3 Kmap Simplification for Four
65 Variables
 It is possible to have a choice as to how to pick
groups within a Kmap, while keeping the groups
as large as possible.
 The (different) functions that result from the
groupings below are logically equivalent.
 3A.6 Don’t Care Conditions
66
 Real circuits don’t always need to have an output
defined for every possible input.
For example, some calculator displays consist
of 7-segment LEDs. These LEDs can display 2 7 -
1 patterns, but only ten of them are useful.
 If a circuit is designed so that a particular set of
inputs can never happen, we call this set of inputs
a don’t care condition.
 They are very helpful to us in Kmap circuit
simplification.
 3A.6 Don’t Care Conditions
67
 In a Kmap, a don’t care condition is identified by
an X in the cell of the minterm(s) for the don’t care
inputs, as shown below.
 In performing the simplification, we are free to
include or ignore the X’s when creating our
groups.
 3A.6 Don’t Care Conditions
68

 In one grouping in the Kmap below, we have the

function:
 3A.6 Don’t Care Conditions
69

 A different grouping gives us the function:

 3A.6 Don’t Care Conditions
70
 The truth table of:

differs from the truth table of:

 However, the values for which they differ, are the

inputs for which we have don’t care conditions.
 3A Conclusion
71

 Kmaps provide an easy graphical method of

simplifying Boolean expressions.
 A Kmap is a matrix consisting of the outputs of
the minterms of a Boolean function.
 In this section, we have discussed 2- 3- and 4-
input Kmaps. This method can be extended to
any number of inputs through the use of multiple
tables.
 3A Conclusion
72
Recapping the rules of Kmap simplification:
• Groupings can contain only 1s; no 0s.
• Groups can be formed only at right angles;
diagonal groups are not allowed.
• The number of 1s in a group must be a power of
2 – even if it contains a single 1.
• The groups must be made as large as possible.
• Groups can overlap and wrap around the sides
of the Kmap.
• Use don’t care conditions when you can.
Three-Variable K-Maps
f =  (0,4) = B C f =  (4,5) = A B f =  (0,1,4,5) = B f =  (0,1,2,3) = A

BC BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1

1 1 0 0 0 1 1 1 0 0 1 1 1 0 0 1 0 0 0 0

f =  (0,4) = A C f =  (4,6) = A C f =  (0,2) = A C f =  (0,2,4,6) = C

BC BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1
1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1
Three-Variable K-Map Examples

BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 1 1 1 0 1 1

1 1 1 1 1 1 1 1 1 1

BC BC BC
A 00 01 11 10 A 00 01 11 10 A 00 01 11 10
0 1 0 1 1 1 0

1 1 1 1 1 1 1 1
Four-Variable K-Maps
CD CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB AB
00 1 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0

01 0 0 0 0 01 0 1 0 0 01 0 0 0 0 01 1 0 0 1

11 0 0 0 0 11 0 1 0 0 11 0 1 1 0 11 0 0 0 0

10 1 0 0 0 10 0 0 0 0 10 0 0 0 0 10 0 0 0 0

f =  (5,13) = B • C • D f =  (13,15) = A • B • D f =  (4,6) = A • B • D

f =  (0,8) = B • C • D

CD CD CD CD
AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10 AB 00 01 11 10
00 0 0 1 1 00 0 0 0 0 00 0 0 1 1 00 1 0 0 1

01 0 0 1 1 01 1 0 0 1 01 0 0 0 0 01 0 0 0 0

11 0 0 0 0 11 1 0 0 1 11 0 0 0 0 11 0 0 0 0

10 0 0 0 0 10 0 0 0 0 10 0 0 1 1 10 1 0 0 1

f =  (2,3,6,7) = A • C f =  (4,6,12,14) = B • D f =  (2,3,10,11) = B • C f =  (0,2,8,10) = B • D

Four-Variable K-Maps
CD CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB AB
00 0 0 0 0 00 0 0 1 0 00 1 0 1 0 00 0 1 0 1

01 1 1 1 1 01 0 0 1 0 01 0 1 0 1 01 1 0 1 0

11 0 0 0 0 11 0 0 1 0 11 1 0 1 0 11 0 1 0 1

10 0 0 0 0 10 0 0 1 0 10 0 1 0 1 10 1 0 1 0

f =  (0, 3,5, 6, 9,10,12,15) f =  (1, 2, 4, 7,8,11,13,14)

f =  (4,5, 6, 7) = A • B f =  (3,7,11,15) = C • D
f = A  BC D f = A  B C D

CD CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB AB
00 0 1 1 0 00 1 0 0 1 00 0 0 0 0 00 1 1 1 1

01 0 1 1 0 01 1 0 0 1 01 1 1 1 1 01 0 0 0 0

11 0 1 1 0 11 1 0 0 1 11 1 1 1 1 11 0 0 0 0

10 0 1 1 0 10 1 0 0 1 10 0 0 0 0 10 1 1 1 1

f =  (1, 3,5, 7, 9,11,13,15) f =  (0,2,4,6,8,10,12,14) f =  (4,5,6,7,12,13,14,15) f =  (0,1,2,3,8,9,10,11)

f =D f =D f =B f =B
Four-Variable K-Maps Examples
CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 1 1 1 00 1 1 1 00

01 1 1 1 01 1 01 1 1 1
11 1 1 1 11 11 1 1 1

10 1 1 10 1 1 1 10 1

CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 1 1 00 00

01 1 1 1 1 01 01

11 1 1 1 11 11

10 1 10 10
 Four-Variable K-Maps Examples
CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 00 00

01 01 01

11 11 11

10 10 10

CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 00 00

01 01 01

11 11 11

10 10 10
Four-Variable K-Maps Examples

CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 00 00

01 01 01

11 11 11

10 10 10

CD CD CD
00 01 11 10 00 01 11 10 00 01 11 10
AB AB AB
00 00 00

01 01 01

11 11 11

10 10 10
Design of combinational digital circuits
 Steps to design a combinational digital circuit:
 From the problem statement derive the truth table
 From the truth table derive the unsimplified logic expression
 Simplify the logic expression
 From the simplified expression draw the logic circuit
 Example: Design a 3-input (A,B,C) digital circuit that will give at its output
(X) a logic 1 only if the binary number formed at the input has more
ones Inputs
than zeros.
Output
A B C X X =  (3, 5, 6, 7)
0 0 0 0 0
1 0 0 1 0 X
BC
2 0 1 0 0 A 00 01 11 10
3 0 1 1 1 0 0 0 1 0
4 1 0 0 0 1 0 1 1 1
5 1 0 1 1
6 1 1 0 1
7 1 1 1 1 X = AC + AB + BC
A B C
Design of combinational digital circuits
 Steps to design a combinational digital circuit:
 From the problem statement derive the truth table
 From the truth table derive the unsimplified logic expression
 Simplify the logic expression
 From the simplified expression draw the logic circuit
 Example: Design a 3-input (A,B,C) digital circuit that will give at its output
(X) a logic 1 only if the binary number formed at the input has more
ones Inputs
than zeros.
Output
A B C X X =  (3, 5, 6, 7)
0 0 0 0 0
1 0 0 1 0 X
BC
2 0 1 0 0 A 00 01 11 10
3 0 1 1 1 0 0 0 1 0
4 1 0 0 0 1 0 1 1 1
5 1 0 1 1
6 1 1 0 1
7 1 1 1 1 X = AC + AB + BC
A B C
Design of combinational digital circuits (Cont.)
 Example: Design a 4-input (A,B,C,D) digital circuit that will give at its
output (X) a logic 1 only if the binary number formed at the input is
between 2 and 9 (including).
Inputs Output
A B C D X X =  (2,3,4,5,6 ,7,8,9)
0 0 0 0 0 0
1 0 0 0 1 0 X
2 0 0 1 0 1 CD
3 0 0 1 1 1 AB 00 01 11 10
4 0 1 0 0 1 00 0 0 1 1 Same
5 0 1 0 1 1
01 1 1 1 1
6 0 1 1 0 1
7 0 1 1 1 1 11 0 0 0 0
8 1 0 0 0 1 10 1 1 0 0
9 1 0 0 1 1
10 1 0 1 0 0
11 1 0 1 1 0
12 1 1 0 0 0 X = AC + AB + A B C
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 0 A B C D X
Design of combinational digital circuits (Cont.)
 Example: Design a 4-input (A,B,C,D) digital circuit that will give at its
output (X) a logic 1 only if the binary number formed at the input is
between 2 and 9 (including).
Inputs Output
A B C D X X =  (2,3,4,5,6 ,7,8,9)
0 0 0 0 0 0
1 0 0 0 1 0 X
2 0 0 1 0 1 CD
3 0 0 1 1 1 AB 00 01 11 10
4 0 1 0 0 1 00 0 0 1 1 Same
5 0 1 0 1 1
01 1 1 1 1
6 0 1 1 0 1
7 0 1 1 1 1 11 0 0 0 0
8 1 0 0 0 1 10 1 1 0 0
9 1 0 0 1 1
10 1 0 1 0 0
11 1 0 1 1 0
12 1 1 0 0 0 X = AC + AB + A B C
13 1 1 0 1 0
14 1 1 1 0 0
15 1 1 1 1 0 A B C D X
Design of combinational digital circuits (Example)
 Example: Design a 4-input (A,B,C,D) digital circuit that will give at its
output (X) a logic 1 only if there more ones than zeros in the binary
number formed at the input.
Inputs Output
X=
A B C D
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0 CD
3 0 0 1 1 AB 00 01 11 10
4 0 1 0 0 00
5 0 1 0 1 01
6 0 1 1 0
7 0 1 1 1 11
8 1 0 0 0 10
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
X=
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1 A B C D X X
Reduction of Equation
Boolean algebra X K-map
 NAND Gate

A B Y
0 0 1 A’ A
0 1 1 B’ 1 11
B 1
1 0
1 0 1
1 1 0

Y=A’B’+A’B+AB’
=A’(B’+B)+AB’ Y=A’B’+A’B+A’B’+AB’
=A’+AB’ =A’(B’+B)+B’(A’+A)
=(A’+A)(A’+B’) =A’+B’
=A’+B’ Y= 𝐴𝐵
Y = 𝐴𝐵
3 Variable equation reduction :
K-map
 K-Map
1) Minimize the four variable logic function using k-map
f(A,B,C,D)= ∑m(0,1,2,3,5,7,8,9,11,14)

00 01 11 10

00 0 4 12 8

01 1 5 13 9

11 3 7 15 11

10 2 6 14 10
 Getting reduced equation using K-Map

A B C D Y

0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 1 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0
 K-Map
Minimize the four variable logic function
f(A,B,C,D) = ABC’D + A’BCD + A’B’C’ + A’B’D’ + AC’ + AB’C + B’

1. Enter 1 in the cell with A=1,B=1,C=0, D=1

corresponding to the minterm ABC’D.
2. Enter 1 in the cell with A=0,B=1,C=1,D=1
corresponding to the minterm A’BCD
3. Enter 1’s in the two cells with A=0, B=0, C=0
corresponding to the term A’B’C’.
4. Enter 1’s in the two cells with A=0, B=0, D=0 (one
of there is already entered) corresponding to the term
A’B’D’.
5. Enter 1’s in the two cells with A=1, B=0, C=1
corresponding to the term AB’C.
6. Enter 1’s in the four cells with A=1, C=0 (one of
them is already entered) corresponding to the term
AC’.
7. Enter 1’s in the eight cells with B=0 (all of them
except one have already been entered )
corresponding to the term B’.
 K-map

Example Minimise the four variable logic function

F(A,B,C,D) = (A+B+C’+D’) (A’+C+D’) (A’+B+C’+D’) (B’+C) (B’+C’) (A+B’) (B’+D’)
Convert POS in Standard POS.
Solution : The k-map cells in which 0’s are to be entered corresponding to each are given in table . even if a cell is
involved in more than one terms, a 0 is to be entered only once.

Term Cell(s) with 0’

A + B + C’ +D’ A=0,B=0,C=1,D=1
A’+C+D’ A=1,C=0,D=1
A’ + B + C’ + D’ A=1,B=0,C=1,D=1
B’ + C B=1,C=0
A + B’ A=0,B=1
B’ + D’ B=1, D=1
 K-Map
Minimize logic function A B C D Y
F(A,B,C,D)= M (4,6,10,12,13,15 ) in POS form.
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0
 Don’t care conditions
1) f(A,B,C,D)= ∑ m(1,3,7,11,15) + d(0,2,5) A B C D Y

0 0 0 0 X
0 0 0 1 1
0 0 1 0 X
0 0 1 1 1
0 1 0 0 0
0 1 0 1 X
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1
 Don’t care conditions

Example 2 In terms of Maxterms and don’t care conditions. For example A B C D Y

F(A,B,C,D) = ∏M (4,5,6,7,8,12). d(1,2,3,9,11,14) 0 0 0 0 1
0 0 0 1 X
0 0 1 0 X
0 0 1 1 X
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 X
1 0 1 0 1
1 0 1 1 X
1 1 0 0 0
1 1 0 1 1
1 1 1 0 X
1 1 1 1 1