® L4962

1.5A POWER SWITCHING REGULATOR

1.5A OUTPUT CURRENT

5.1V TO 40V OUTPUT VOLTAGE RANGE
PRECISE (± 2%) ON-CHIP REFERENCE
HIGH SWITCHING FREQUENCY
VERY HIGH EFFICIENCY (UP TO 90%)
VERY FEW EXTERNAL COMPONENTS POWERDIP HEPTAWATT
(12 + 2 + 2)
SOFT START
INTERNAL LIMITING CURRENT ORDERING NUMBERS : L4962/A (12 + 2 + 2 Powerdip)
L4962E/A (Heptawatt
THERMAL SHUTDOWN Vertical)
L4962EH/A (Horizontal
Heptawatt)

DESCRIPTION
The L4962 is a monolithic power switching regula- The L4962 is mounted in a 16-lead Powerdip plastic
tor delivering 1.5A at a voltage variable from 5V to package and Heptawatt package and requires very
40V in step down configuration. few external components.
Features of the device include current limiting, soft Efficient operation at switching frequencies up to
start, thermal protection and 0 to 100% duty cycle 150KHz allows a reduction in the size and cost of
for continuous operating mode. external filter components.

BLOCK DIAGRAM

Pin X = Powerdip
Pin (X) = Heptawatt

June 2000 1/16

L4962

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V7 Input voltage 50 V
V7 - V2 Input to output voltage difference 50 V
V2 Negative output DC voltage -1 V
Output peak voltage at t = 0.1µs; f = 100KHz -5 V
V11, V15 Voltage at pin 11, 15 5.5 V
V10 Voltage at pin 10 7 V
I11 Pin 11 sink current 1 mA
I14 Pin 14 source current 20 mA
Power dissipation at Tpins ≤ 90°C (Powerdip) 4.3 W
Ptot
Tcase ≤ 90°C (Heptawatt) 15 W
Tj, Tstg Junction and storage temperature -40 to 150 °C

PIN CONNECTION (Top view)

THERMAL DATA
Symbol Parameter Heptawatt Powerdip
Rth j-case Thermal resistance junction-case max 4°C/W -
Rth j-pins Thermal resistance junction-pins max - 14°C/W
Rth j-amb Thermal resistance junction-ambient max 50°C/W 80°C/W*
* Obtained with the GND pins soldered to printed circuit with minimized copper area.

PIN FUNCTIONS

HEPTAWATT POWERDIP NAME FUNCTION

1 7 SUPPLY VOLTAGE Unregulated voltage input. An internal regulator powers

the internal logic.

2 10 FEEDBACK INPUT The feedback terminal of the regulation loop. The output
is connected directly to this terminal for 5.1V operation;
it is connected via a divider for higher voltages.

3 11 FREQUENCY A series RC network connected between this terminal

COMPENSATION and ground determines the regulation loop gain
characteristics.

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 L4962

PIN FUNCTIONS (cont’d)

HEPTAWATT POWERDIP NAME FUNCTION

4 4, 5, 12, 13 GROUND Common ground terminal.

5 14 OSCILLATOR A parallel RC network connected to this terminal

determines the switching frequency. This pin must be
connected to pin 7 input when the internal oscillator is
used.

6 15 SOFT START Soft start time constant. A capacitor is connected

between this terminal and ground to define the soft start
time constant. This capacitor also determines the
average short circuit output current.

7 2 OUTPUT Regulator output.

1, 3, 6, N.C.
8, 9, 16

ELECTRICAL CHARACTERISTICS (Refer to the test circuit, Tj = 25 °C, Vi = 35V, unless otherwise
specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit

DYNAMIC CHARACTERISTICS
Vo Output voltage range Vi = 46V Io = 1A Vref 40 V

Vi Input voltage range Vo = Vref to 36V Io = 1.5A 9 46 V

∆ Vo Line regulation Vi = 10V to 40V Vo = Vref Io = 1A 15 50 mV

∆ Vo Load regulation Vo = Vref Io = 0.5A to 1.5A 8 20 mV

Vref Internal reference voltage Vi = 9V to 46V Io = 1A 5 5.1 5.2 V

(pin 10)

∆ Vref Average temperature Tj = 0°C to 125°C 0.4 mV/°C

∆T coefficient of refer. voltage Io = 1A

Vd Dropout voltage Io = 1.5A 1.5 2 V

Iom Maximum operating load Vi = 9V to 46V 1.5 A

current Vo = Vref to 36V

I2L Current limiting threshold Vi = 9V to 46V 2 3.3 A

(pin 2) Vo = Vref to 36V

ISH Input average current Vi = 46V; output short-circuit 15 30 mA

η Efficiency f = 100KHz Vo = Vref 70 %

Io = 1A Vo = 12V 80 %

SVR Supply voltage ripple ∆ Vi = 2Vrms 50 56 dB

rejection fripple = 100Hz
Vo = Vref Io = 1A

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L4962

ELECTRICAL CHARACTERISTICS (continued)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

DYNAMIC CHARACTERISTICS (cont’d)

f Switching frequency 85 100 115 KHz

∆f Voltage stability of Vi = 9V to 46V 0.5 %

∆ Vi switching frequency

∆f Temperature stability of Tj = 0°C to 125°C 1 %

∆ Tj switching frequency

fmax Maximum operating Vo = Vref Io = 1A 120 150 KHz

switching frequency

Tsd Thermal shutdown 150 °C

junction temperature

DC CHARACTERISTICS
I7Q Quiescent drain current 100% duty cycle 30 40 mA
pins 2 and 14 open
Vi = 46V
0% duty cycle 15 20 mA

-I2L Output leakage current 0% duty cycle 1 mA

SOFT START
I15SO Source current 100 140 180 µA

I15SI Sink current 50 70 120 µA

ERROR AMPLIFIER

V11H High level output voltage V10 = 4.7V I11 = 100µA 3.5 V

V11L Low level output voltage V10 = 5.3V I11 = 100µA 0.5 V

I11SI Sink output current V10 = 5.3V 100 150 µA

-I11SO Source output current V10 = 4.7V 100 150 µA

I10 Input bias current V10 = 5.2V 2 10 µA

Gv DC open loop gain V11 = 1V to 3V 46 55 dB

OSCILLATOR
-I14 Oscillator source current 5 mA

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 L4962

CIRCUIT OPERATION (refer to the block diagram)

The L4962 is a monolithic stepdown switching regu- allowed to rise, linearly, as this capacitor is charged
lator providing output voltages from 5.1V to 40V and by a constant current source. Output overload pro-
delivering 1.5A. tection is provided in the form of a current limiter.
The regulation loop consists of a sawtooth oscilla- The load current is sensed by an internal metal
tor, error amplifier, comparator and the output resistor connected to a comparator. When the load
stage. An error signal is produced by comparing the current exceeds a preset threshold this comparator
output voltage with a precise 5.1V on-chip refer- sets a flip flop which disables the output stage and
ence (zener zap trimmed to ± 2%). discharges the soft start capacitor. A second com-
parator resets the flip flop when the voltage across
This error signal is then compared with the sawtooth
the soft start capacitor has fallen to 0.4V.
signal to generate the fixed frequency pulse width
modulated pulses which drive the output stage. The output stage is thus re-enabled and the output
voltage rises under control of the soft start network.
The gain and frequency stability of the loop can be
If the overload condition is still present the limiter
adjusted by an external RC network connected to
will trigger again when the threshold current is
pin 11. Closing the loop directly gives an output
reached. The average short circuit current is limited
voltage of 5.1V. Higher voltages are obtained by
to a safe value by the dead time introduced by the
inserting a voltage divider.
soft start network. The thermal overload circuit dis-
Output overcurrents at switch on are prevented by ables circuit operation when the junction tempera-
the soft start function. The error amplifier output is ture reaches about 150°C and has hysteresis to
initially clamped by the external capacitor Css and prevent unstable conditions.

Figure 1. Soft start waveforms

Figure 2. Current limiter waveforms

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L4962

Figure 3. Test and application circuit (Powerdip)

1) D1: BYW98 or 3A Schottky diode, 45V of VRRM;

2) L1: CORE TYPE - MAGNETICS 58120 - A2 MPP
N° TURNS 45, WIRE GAUGE: 0.8mm (20 AWG)
3) C6, C7: ROE, EKR 220µF 40V

Figure 4. Quiescent drain Figure 5. Quiescent drain Figure 6. Quiescent drain

current vs. supply voltage (0% current vs. supply voltage current vs. junction tem-
duty cycle) (100% duty cycle) perature (0% duty cycle)

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 L4962

Figure 7. Quiescent drain Figure 8. Reference voltage Figure 9. Reference voltage

current vs. junction tem- (pin 10) vs. Vi rdip) vs. Vi (pin 10 ) vs. junction tem-
perature (100% duty cycle) perature

Figure 10. Open loop fre- Figure 11. Switching fre- Figure 12. Switching fre-
quency and phase re- sponse quency vs. input voltage quency vs. junction tem-
of error amplifier perature

Figure 13. Switching fre- Figure 14. Line transient Figure 15. Load transient
quency vs. R2 (see test circuit) response response

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L4962

Figure 16. Supply voltage Figure 17. Dropout voltage Figure 18. Dropout voltage
ripple rejection vs. frequency between pin 7 and pin 2 vs. between pin 7 and 2 vs.
current at pin 2 junction temperature

Fig ure 19. Effi ciency vs. Fi gure 20. Effici ency vs. Fi gure 21 . Effi ciency vs.
output current output current output current

F igu re 22. Effi ciency vs. Fi gure 23. Effici ency vs. Figure 24. Maximum allow-
output voltage output voltage able power dissipation vs. am-
bient temperature (Powerdip)

8/16
 L4962

APPLICATION INFORMATION

Figure 25. Typical application circuit

C1, C6, C7: EKR (ROE)

D1: BYW98 OR VISK340 (SCHOTTKY)
SUGGESTED INDUCTORS: (L1) = MAGNETICS 58120 - A2MPP - 45 TURNS - WIRE GAUGE 0.8mm (20AWG)
COGEMA 946043
OR U15, GUP15, 60 TURNS 1mm, AIR GAP 0.8mm (20 AWG) - COGEMA 969051.

Figure 26. P.C. board and component layout of the circuit of Fig. 25 (1 : 1 scale)

Resistor values for

standard output 7 voltages
Vo R3 R4
12V 4.7KΩ 6.2KΩ
15V 4.7KΩ 9.1KΩ
18V 4.7KΩ 12KΩ
24V 4.7KΩ 18KΩ

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L4962

APPLICATION INFORMATION (continued)

Figure 27. - A minimal 5.1V fixed regulator; Very few component are required

* COGEMA 946043 (TOROID CORE)

969051 (U15 CORE)
** EKR (ROE)

Figure 28. Programmable power supply

Vo = 5.1V to 15V
Io = 1.5A max
Load regulation (0.5A to 1.5A) = 10mV (Vo = 5.1V)
Line regulation (220V ± 15% and to Io = 1A) = 15mV (Vo = 5.1V)

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 L4962

APPLICATION INFORMATION (continued)

Figure 29. DC-DC converter 5.1V/4A, ± 12V/1A. A suggestion how to synchronize a negative output

L1, L3 = COGEMA 946043 (969051)

L2 = COGEMA 946044 (946045)

Figure 30. In multiple supplies several Figure 31. Preregulator for distributed supplies
L4962s can be synchronized as shown

* L2 and C2 are necessary to reduce the switching frequency spikes

when linear regulators are remote from L4962

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L4962

MOUNTING INSTRUCTION
The Rth-j-amb of the L4962 can be reduced by soldering the pins temperature must not exceed
soldering the GND pins to a suitable copper area of 260°C and the soldering time must not be longer
the printed circuit board (Fig. 32). than 12 seconds.
The diagram of figure 33 shows the Rth-j-amb as a The external heatsink or printed circuit copper are
function of the side "l" of two equal square copper must be connected to electrical ground.
areas having the thickness of 35µ (1.4 mils). During

Figure 32. Example of P.C. board copper area which is used Figure 33. Maximum dissipable
as heatsink power and junction to ambient
thermal resistance vs. side "l"

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 L4962

mm inch
DIM. OUTLINE AND
MIN. TYP. MAX. MIN. TYP. MAX. MECHANICAL DATA

a1 0.51 0.020

B 0.85 1.40 0.033 0.055

b 0.50 0.020

b1 0.38 0.50 0.015 0.020

D 20.0 0.787

E 8.80 0.346

e 2.54 0.100

e3 17.78 0.700

F 7.10 0.280

I 5.10 0.201

L 3.30 0.130
Powerdip 16
Z 1.27 0.050

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L4962

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.8 0.189 MECHANICAL DATA
C 1.37 0.054
D 2.4 2.8 0.094 0.110
D1 1.2 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
E1 0.7 0.97 0.028 0.038
F 0.6 0.8 0.024 0.031
F1 0.9 0.035
G 2.34 2.54 2.74 0.095 0.100 0.105
G1 4.88 5.08 5.28 0.193 0.200 0.205
G2 7.42 7.62 7.82 0.295 0.300 0.307
H2 10.4 0.409
H3 10.05 10.4 0.396 0.409
L 16.7 16.9 17.1 0.657 0.668 0.673
L1 14.92 0.587
L2 21.24 21.54 21.84 0.386 0.848 0.860
L3 22.27 22.52 22.77 0.877 0.891 0.896
L4 1.29 0.051
L5 2.6 2.8 3 0.102 0.110 0.118
L6 15.1 15.5 15.8 0.594 0.610 0.622
L7 6 6.35 6.6 0.236 0.250 0.260
L9 0.2 0.008
M 2.55 2.8 3.05 0.100 0.110 0.120
M1 4.83 5.08 5.33 0.190 0.200 0.210 Heptawatt V
V4 40˚ (typ.)
Dia 3.65 3.85 0.144 0.152

L V V
E
L1
M1

A M
C D
D1
L2 H2
L5 L3 F
E1
E

V4
L9

H3 H1 G G1 G2

Dia.
F
L7 L4 H2 F1
L6
HEPTAMEC

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 L4962

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.8 0.189 MECHANICAL DATA
C 1.37 0.054
D 2.4 2.8 0.094 0.110
D1 1.2 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
F 0.6 0.8 0.024 0.031
F1 0.9 0.035
G 2.41 2.54 2.67 0.095 0.100 0.105
G1 4.91 5.08 5.21 0.193 0.200 0.205
G2 7.49 7.62 7.8 0.295 0.300 0.307
H2 10.4 0.409
H3 10.05 10.4 0.396 0.409
L 14.2 0.559
L1 4.4 0.173
L2 15.8 0.622
L3 5.1 0.201
L5 2.6 3 0.102 0.118
L6 15.1 15.8 0.594 0.622
L7 6 6.6 0.236 0.260
L9 4.44 0.175 Heptawatt H
Dia 3.65 3.85 0.144 0.152

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L4962

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