Pb A Product Line of

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Lead-free Green

PI3USB31532Q

10Gbps USB Type-C DP2.1/USB3 6:4 Crossbar Switch

Description Features
The DIODES PI3USB31532Q is a 6:4 differential channels, bidi- y Six Differential Channels to Two/Four Differential Channels
rectional, 10Gbps crossbar switch solution for routing USB 3.2 Bidirectional Crossbar Switch
and/or DP 2.1 signals through USB Type-C® connector. It sup- y 10Gbps USB 3.2 Gen 2 Super Speed and DP 2.1 UHBR10
ports either one lane of USB 3.2 Gen 2, one lane of USB 3.2 Gen 2 Switching to USB Type-C Connector
and two channels of DP 2.1 UHBR10, or four channels of DP 2.1 y Supports Either Pin Control or I2C Control to Configure the
UHBR10 to the USB Type-C connector. Switch
In addition, AUX± channels are also switch to the USB Type-C y Low Insertion Loss: -1.7dB @ 10Gb/s
sideband pins, SBU1 and SBU2. The PI3USB31532Q offers excel- y Return Loss: -15dB @ 10Gb/s
lent signal integrity for high-speed signals and low-power dis- y CrossTalk: -38dB @ 10Gb/s
sipation. y Off Isolation: -22dB @ 10Gb/s
y -3dB Bandwidth: 8.3GHz
Application(s) y Multiplexes One of the Following to USB Type-C Connector:
à USB 3.2 Gen 2 Signal Only
y Smart Cockpit à One Lane of USB 3.2 Gen 2 Signal and Two Channels of DP
y Rear Seat Entertainment 2.1 UHBR10
à Four Channels of DP2.1 UHBR10
y With DP 2.1 UHBR10 Operating, AUX+ and AUX- are switch to
Application Diagram
SBU Pins
y Power Supply: 3.3V
USB3
y AEC-Q100 Grade 2, -40°C to 105°C
y Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
USB-C y Halogen and Antimony Free. “Green” Device (Note 3)
Crossbar Switch ReDriver
DP PI3USB31532Q PI3DPX1207Q y The PI3USB31532Q is suitable for automotive applications
Notebook/Mobile Phone/PAD
requiring specific change control; this part is AEC-Q100
qualified, PPAP capable, and manufactured in IATF 16949
DP
ReDriver Crossbar Switch certified facilities.
USB-C PI3DPX1207Q PI3USB31532Q
VR https://www.diodes.com/quality/product-definitions/
y Packaging (Pb-free & Green):
USB3
à 40-contact, TQFN (ZLC)

Figure 1. RSE Application

Ordering Information
DPALT
SSRX/RX
USB
Packaging
Crossbar Switch Ordering Code Package Description
CPU/GPU DP ML x4-lane
USB-C
Code
PI3USB31532Q SBU1/2
AUX-ch
40-Pin, 3mm x 6mm
CC/VBUS
PI3USB31532Q2ZLCEX ZLC
(TQFN) (W-QFN3060-40)
I2C
Notes:
Embedded Controller
I2C
PD Controller • Q = Automotive Compliant
• 2 = AEC-Q100 Grade Level
• E = Pb-free and Green
Figure 2. Smart Cockpit Application
• X suffix = Tape/Reel

Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm
antimony compounds.
4. Automotive products are AEC-Q100 qualified and are PPAP capable. Refer to https://www.diodes.com/quality/.
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 A Product Line of
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PI3USB31532Q

Pin Configuration Block Diagram

CONF2 CONF1 CONF0

Mode1
Mode
Conf2/SDA I2C
CONF2/SDA

CONF1/SCL
CONF0/A1 Conf1/SCL Register &
Conf0/A1 Control Control Decode
A0
DP0+
DP0-

GND

DP2+
40 39 38 37 36 35 DP2-
MODE 1 34 RX2+/TX2+
DP1+ 2 33 RX2-/TX2-
DP1- 3 32 VDD TX1+/RX1+
TX1-/RX1-
TX+/RX+
VDD 4 TX2+/RX2+
100KΩ 100KΩ

31 TX-/RX-
DP2+ 5 30 TX2-/RX2-
DP2- 6 29 VDD
VDD 7 28 TX1+/RX1+ DP1+
DP1-
TX2+/RX2+
TX2-/RX2-
GND 100KΩ 100KΩ

DP3+ 8 27 TX1-/RX1-
DP3- 9 26 VDD
VDD 10 25 RX1+/TX1+ DP3+
DP3-
TX+/RX+ 11 24 RX1-/TX1-
TX-/RX- 12 23 VDD
MODE1 13 22 SBU1/SBU2 RX1+/TX1+
RX1-/TX1-
A0 14 21 SBU2/SBU1 RX+/TX+
RX-/TX-
100KΩ 100KΩ

15 16 17 18 19 20
AUX+
AUX-
GND
RX+/TX+
RX-/TX-
GND

DP0+ RX2+/TX2+
DP0- RX2-/TX2-
100KΩ 100KΩ

SBU1/SBU2
SBU2/SBU1
AUX+
AUX-

Note:
1. The first pinout name (such as RX2+ in RX2+/TX2+) is for source reference schematic in page 4.
2. The second pinout name (such as TX2+ in RX2+/TX2+) is for sink reference schematic in page 5.

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 A Product Line of
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PI3USB31532Q

Pin Description

Pin# Pin Name Type Description

4, 7, 10, 23, 26,
VDD Power 3.0V to 3.6V power supply. All VDD pins must be tied to external power.
29, 32
11, TX+/RX+, Differential USB 3.2 Gen 2 Transmit signal (source application) or differential USB 3.2 Gen
I/O
12 TX-/RX- 2 Receive signal (sink application). Connected internally with 100kΩ pulldown to GND.
16, RX+/TX+, Differential USB 3.2 Gen 2 Receive signal (source application) or differential USB 3.2 Gen
I/O
17 RX-/TX- 2 Transmit signal (sink application). Connected internally with 100kΩ pulldown to GND.
39, 40 DP0+, DP0- I/O Differential DP0 signal.
2, 3 DP1+, DP1- I/O Differential DP1 signal.
5, 6 DP2+, DP2- I/O Differential DP2 signal.
8, 9 DP3+, DP3- I/O Differential DP3 signal.
19, 20 AUX+, AUX- I/O Differential Auxiliary signal for DP.
22, 21 SBU1, SBU2 I/O Sideband signal at Type-C connector.
25, RX1+/TX1+, Differential Receive signal 1 at Type-C connector (source application) or differential
I/O
24 RX1-/TX1- Transmit signal 1 at Type-C connector (sink application).
28, TX1+/RX1+, Differential Transmit signal 1 at Type-C connector (source application) or differential Re-
I/O
27 TX1-/RX1- ceive signal 1 at Type-C connector (sink application).
31, TX2+/RX2+, Differential Transmit signal 2 at Type-C connector (source application) or differential Re-
I/O
30 TX2-/RX2- ceive signal 2 at Type-C connector (sink application).
34, RX2+/TX2+, Differential Receive signal 2 at Type-C connector (source application) or differential Trans-
I/O
33 RX2-/TX2- mit signal 2 at Type-C connector (sink application).
Sideband signal 1 (source application) or side band signal 2 (sink application) at Type-C
22 SBU1/SBU2 I/O
connector.
Sideband signal 2 (source application) or side band signal 1 (sink application) at Type-C
21 SBU2/SBU1 I/O
connector.
Control mode selection
1 MODE I MODE = 1, I2C control
= 0, pin control through CONF[2:0]
Switch configuration selection pin when MODE = 0, refer to Switch Selection Truth Table
35, 36, 38 CONF[2:0] I
for detail. When MODE = 1, these pins are part of the I2C interface as SDA/SCL/A1.
38 SDA I/O Serial in data of I2C when MODE = 1.
36 SCL I I2C clock input pin when MODE = 1.
35 A1 I A[1] of A[1:0] I2C selectable address when MODE = 1.
14 A0 I A[0] of A[1:0] I2C selectable address when MODE = 1.
15, 18, 37,
GND Power Ground supply.
Center Pad
13 MODE1 I When MODE 1 = 0, I2C I/O is 1.8V interface. When MODE 1 = 1, I2C I/O is 3.3V interface.

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 A Product Line of
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PI3USB31532Q

Configuration Table for Source Application (V1.0a)

V1.0a DP ALT Spec Receptacle DFP_D pin Assignment

Type-C USB 3.2
Gen 1/Gen 2 only C, E C, E Flip D, F D, F flip
(Table 3-1) (Table 3-2) (Table 3-1) (Table 3-2)

USB 3.2 4 Lanes 4 Lanes of USB 3.2 Gen 1/ USB 3.2 Gen 1/Gen
USB 3.2
Switch Open Open Gen 1/Gen 2 of DP 2.1 DP 2.1 Gen 2 +2 Lanes of 2 +2 Lanes of DP
Gen 1/Gen 2
Flip UHBR10 UHBR10 flip DP 2.1 UHBR10 2.1 UHBR10 Flip
Conf[2:0] 000 001 100 101 010 011 110 111
TX x x TX1 TX2 x x TX1 TX2
RX x x RX1 RX2 x x RX1 RX2
DP0 x x x x RX2 RX1 RX2 RX1
DP1 x x x x TX2 TX1 TX2 TX1
DP2 x x x x TX1 TX2 x x
DP3 x x x x RX1 RX2 x x
AUX+ x x x x SBU1 SBU2 SBU1 SBU2
AUX- x x x x SBU2 SBU1 SBU2 SBU1
000 = switch open with power down
001 = switch open only, no power down

+3V3
C1 18-C 125 are "m ust hav e" t o p reve nt non- DP comp lia nt 3 .3V
+3V3 si gnal s f rom plu g-in as rea l-s een- cas e.
No -cho kes bet wee n 31 532 and ty pe-C co nnec tor , be cau se
1

+3V3 R47 R48 R49

NC (for I2 C) NC (for I2 C)
Source 31 532 is a pa ssi ve s wit ch w ith out EMI iss ue.
C64 C65 C66 C67 C68 C69 C70 C71 NC charging
circuit
21

1 0u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u R50 CONF2/SDA
2

CONF1/SCL Vbus
4 .7 K CONF0/A1 control

Use 0.22uf if output

swing >1.2V or using C72
2

re-drivers +3V3 J4
1 00 u f
B1
D0+ 1 R51 0 2 A12 GND
41

40
39
38
37
36
35

U4 B2 GND
D0- 1 R52 0 2 C73 0 .3 3 u RX2 + A11 TX2 +
G ND
PG ND

DP0 +

RX2 +
DP0 -

CO NF0 /A1
CO NF1 /SCL
CO NF2 /SDA

B3
D1+ 1 R53 0 2 C74 0 .3 3 u RX2 - A10 TX2 -
1 34 B4 RX2 -
D1- 1 R54 0 2 2 MODE RX2 +/TX2+ 33 C75 0 .2 u TX2 + A9 VBUS
3 DP1 + RX2 -/TX2 - 32 B5 VBUS
D2+ 1 R55 0 2 4 DP1 - VDD 31 C76 0 .2 u TX2 - A8 CC2
VDD TX2 +/RX2+ SBU1
DP source D2- 1 R56 0 2
5
6 DP2 + TX2 -/RX2 -
30
29 C77 0 .2 u TX1 +
B6
A7 D+
7 DP2 - VDD 28 B7 D-
D3+ 1 R57 0 2 8 VDD TX1 +/RX1+ 27 C78 0 .2 u TX1 - A6 D-
9 DP3 + TX1 -/RX1 - 26 B8 D+
D3- 1 R58 0 2 10 DP3 - VDD 25 C79 0 .3 3 u RX1 + A5 SBU2
11 VDD RX1 +/TX1+ 24 B9 CC1
12 TX+/RX+ RX1 -/TX1 - 23 C80 0 .3 3 u RX1 - A4 VBUS
AUX+ C81 0 .1 u 13 TX-/RX- VDD 22 B10 VBUS
14 MODE1 SBU1 /SBU2 21 A3 RX1 -
A0 SBU2 /SBU1 TX1 -
RX+/TX+

AUX- C82 0 .1 u B11

RX-/TX-

A2 RX1 +
AUX+
G ND

G ND

AUX-

ADDR0 B12 TX1 +

+3V3 A1 GND
PI3USB31532Q GND
2

2
15
16
17
18
19
20

2 R59 12 R60 1
NC 2 70 K R61 R62 Type-C Recep.
RX2 +

RX1 +

2M 2M
RX2 -

RX1 -

USB3 1 R63 1 00 K
2 KUSB-8-A-P-3-1-1-01-ST1,
controller 1 2
1

TX+ C83 0 .2 u R64 1 00 K R65 R67

+3V3 R66 R68 Layout
TX- C84 0 .2 u 2 00 K 2 00 K
RX+ 2 00 K 2 00 K
RX-
1

D- RX2 +
USB2 D+/- D+ RX2 -
TVS
TX2 +
TX2 -

CONF2/ CONF1/ CONF0/ Vbus CC2 CC1

SDA SCL A1 control TX1 +
TX1 -
See source truth table for
the control of CONF[2:0] PD controller RX1 +
TVS

RX1 -

ContactDiodes local salesforTVS

PI3USB31532Q Reference Schematic for Source Application

PI3USB31532Q 4 www.diodes.com March 2024

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 A Product Line of
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PI3USB31532Q

Configuration Table for Sink Application (V1.0a)

V1.0a DP ALT Spec Receptacle UFP_D pin Assignment

Type-C USB 3.2
Gen 1/Gen 2 Only C C Flip D D Flip
(Table 3-3) (Table 3-4) (Table 3-3) (Table 3-4)

USB 3.2 4 Lanes 4 Lanes of USB 3.2 Gen 1/ USB 3.2 Gen 1/Gen
USB 3.2
Switch Open Open Gen 1/Gen 2 of DP 2.1 DP 2.1 Gen 2 +2 Lanes of 2 +2 Lanes of DP
Gen 1/Gen 2
Flip UHBR10 UHBR10 flip DP 2.1 UHBR10 2.1 UHBR10 Flip
Conf[2:0] 000 001 100 101 010 011 110 111
TX x x TX1 TX2 x x TX1 TX2
RX x x RX1 RX2 x x RX1 RX2
DP0 x x x x TX2 TX1 TX2 TX1
DP1 x x x x RX2 RX1 RX2 RX1
DP2 x x x x RX1 RX2 x x
DP3 x x x x TX1 TX2 x x
AUX+ x x x x SBU2 SBU1 SBU2 SBU1
AUX- x x x x SBU1 SBU2 SBU1 SBU2
000 = switch open with power down
001 = switch open only, no power down

+3V3
C9 7-C1 03, C1 05 a re "mu st h ave " t o pr eve nt n on- DP comp lia nt 3.3V
+3V3 si gnal s f rom plu g-i n a s re al- see n-ca se.
No -cho kes be twee n 3 153 2 an d t ype -C c onn ecto r, bec ause
1

+3V3 R33 R34 R35

NC (for I2 C) NC (for I2 C)
Sink 31 532 is a p assi ve swi tch wit hou t EM I i ssue .
C43 C44 C45 C46 C47 C48 C49 C50 NC charging
circuit
21

1 0u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u 0 .1 u R36 CONF2/SDA
2

CONF1/SCL Vbus
4 .7 K CONF0/A1 control

C51
2

+3V3 J3
1 00u f
B1
D0+ A12 GND
41

40
39
38
37
36
35

U3 B2 GND
D0- C52 0 .2 u TX2 + A11 TX2 +
GND
PGND

DP0 +

RX2 +
DP0 -

CONF0 /A1
CONF1 /SCL
CONF2 /SDA

B3
D1+ C53 0 .2 u TX2 - A10 TX2 -
1 34 B4 RX2 -
D1- 2 MODE RX2 +/TX2+ 33 RX2 +
C54 0 .3 3 u A9 VBUS
3 DP1 + RX2 -/TX2 - 32 B5 VBUS
D2+ 4 DP1 - VDD 31 RX2 -
C55 0 .3 3 u A8 CC2
VDD TX2 +/RX2+ SBU1
DP D2-
5
6 DP2 + TX2 -/RX2 -
30
29 RX1 +
C56 0 .3 3 u
B6
A7 D+
receiver 7 DP2 - VDD 28 B7 D-
D3+ 8 VDD TX1 +/RX1+ 27 RX1 -
C57 0 .3 3 u A6 D-
9 DP3 + TX1 -/RX1 - 26 B8 D+
D3- 10 DP3 - VDD 25 C58 0 .2 u TX1 + A5 SBU2
11 VDD RX1 +/TX1+ 24 B9 CC1
AUX+ C59 0 .1 u 12 TX+/RX+ RX1 -/TX1 - 23 C60 0 .2 u TX1 - A4 VBUS
13 TX-/RX- VDD 22 B10 VBUS
AUX- C61 0 .1 u 14 MODE1 SBU1 /SBU2 21 A3 RX1 -
A0 SBU2 /SBU1 TX1 -
RX+/TX+

+3V3 B11
RX-/TX-

A2 RX1 +
AUX+
GND

GND

AUX-

TX1 +
2

ADDR0 B12
R37 A1 GND
NC PI3USB31532Q GND
2

2
15
16
17
18
19
20

+3V3 R38 R39 Type-C Recep.

12

RX2 +

RX1 +

1 R40 1 M 2 2M 2M
RX2 -

RX1 -

USB3 R41
2 70K 1 2
controller R42 1 M
1

R43 R45
TX+ C62 0 .2 u R44 R46 Layout
1

2 00K 2 00K
TX- C63 0 .2 u 2 00K 2 00K
RX+
RX-
1

D- TX2 +
USB2 D+/- D+ TX2 -
TVS
RX2 +
RX2 -

CONF2/ CONF1/ CONF0/ Vbus CC2 CC1

SDA SCL A1 control RX1 +
RX1 -
See sink truth table for
the control of CONF[2:0] PD controller TX1 +
TVS

TX1 -

ContactDiodes local sales forTVS

PI3USB31532Q Reference Schematic for Sink Application

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PI3USB31532Q

I2C Control
** I2C Function Reference:
" THE I2C-BUS SPECIFICATION, VERSION 2.1"
I2C Control Register:

Register Bits
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
0/1
Slave address (First byte is slave address) 1 0 1 0 1 A1 A0
(W/R)
Vendor ID (Second byte is vendor ID, read only) 0 0 0 0 0 0 0 0
Selection control (Third byte is for selection control,
0 0 0 0 0 conf[2] conf[1] conf[0]
read/write)
Note:
1. Bit7 - Bit3 = Version ID (00000) in (01H)
2. Bit2 - Bit0 = Pericom Vendor ID (000) in (01H)
3. A0, A1 are hardware selectable (pin35, pin36)
4. conf[2]/conf[1]/conf[0] are written into the register by the master PI3USB31532Q will decode Bit2 - Bit0 in (02h) for I2C control (Pin1/MODE = 1). Default pow-
erup state is 000.

Bus Transactions
Data transfers follow the format shown in Figure 3 After the START condition (S), a slave address is sent. This address is 7 bits long
followed by an eighth bit, which is a data direction bit (R/W)—a 'zero' indicates a transmission (WRITE), and a 'one' indicates a re-
quest for data (READ). A data transfer is always terminated by a STOP condition (P) generated by the master. However, if a master still
wishes to communicate on the bus, it can generate a repeated START condition (S) and address another slave without first generating
a STOP condition. Various combinations of read/write formats are then possible within such a transfer.

SDA

1-7 8 9 1-7 8 9 1-7 8 9

SCL

S ADDRESS R/W ACK DATA ACK DATA ACK P

(Vendor ID, read only) (Selection control,
START read/write) STOP
condition condition

Figure 3. A Complete Data Transfer

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PI3USB31532Q

Data is transmitted to the PI3USB31532Q registers using the Write mode as shown in Figure 4. Data is read from the PI3USB31532Q
registers using the Read mode as shown in Figure A4.

S SLAVE ADDRESS R/W A DATA A DATA A/A P

data transferred
‘0’ (Write) (n bytes + acknowledge)

from master to slave

A = acknowledge (SDA LOW)
A = not acknowledge (SDA HIGH)
from slave to master S = START condition
P = STOP condition

Figure 4. Write to Control Register

S SLAVE ADDRESS R/W A DATA A DATA A P

data transferred
(Read) (n bytes + acknowledge)

Figure A4. Read to Control Register

The example of PD-I2C Control for PI3USB31532Q, A0=0, A1=0.

PD-I2C Controlled Registers for PI3USB31532Q

DP USB3.2 USB3.2 + DP
Start → 10101000 → 00000000 → Start → 10101000 → 00000000 → Start → 10101000 → 00000000 →
Non Flip
00000010 → stop 00000100 → stop 00000110 → stop
Start → 10101000 → 00000000 → Start → 10101000 → 00000000 → Start → 10101000 → 00000000 →
Flip
00000011 → stop 00000101 → stop 00000111 → stop

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PI3USB31532Q

Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Note:
Supply Voltage to Ground Potential, VDD = 3.3V................. -0.3V to 4.3V
Stresses greater than those listed under MAXIMUM RATINGS
Control DC Input.............................................................-0.3V to VDD+0.3V
may cause permanent damage to the device. This is a stress
Junction Temperature........................................................................... 125°C rating only and functional operation of the device at these or
Storage Temperature............................................................ -65°C to +150°C any other conditions above those indicated in the operational
Channel DC Input for USB, DP.............................................. -0.3V to 1.2V sections of this specification is not implied. Exposure to ab-
Channel DC Input for AUX.................................................-0.35V to VDD solute maximum rating conditions for extended periods may
ESD, HBM............................................................................................±2000V affect reliability.
ESD, CDM............................................................................................ ±1000V

Recommended Operation Conditions

Parameter Min. Typ. Max. Unit

Ambient Operating Temperature -40 +105 °C
Power Supply Voltage (Measured in Respect to GND) 3.0 3.3 3.6 V

Static Characteristics

Symbol Parameter Conditions Min. Typ. Max. Unit

VDD Supply Voltage 3.0 3.3 3.6 V
VDD = 3.3V
350 400 μA
all Conf[2:0] states except [000]
IDD VDD Supply Current
VDD = 3.3V
10 30 μA
Conf[2:0] = 000
VDD = 0V
VIO(USB 3.2 Gen 2) = 0V
IOFF I/O Leakage When Power is Off VIO(DP 2.1) = 0V 50 µA
VIO(AUX) = 0V to 3.6V
VIO(SBU) = 0V to 3.6V
Control pin (MODE, MODE1)
VIH = VDD
IIH High-Level Digital Input Current 5 µA
VDD = 3.6V
VIL = GND
IIL Low-Level Digital Input Current 5 µA
VDD = 3.6V
VIH High-Level Digital Input Voltage VDD = 3.6V 0.75 × VDD V
VIL Low-Level Digital Input Voltage VDD = 3.6V 0.6 V

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PI3USB31532Q

Symbol Parameter Conditions Min. Typ. Max. Unit

Control/I2C pin (A0, A1, SDA, SCL, when MODE = H, MODE1 = H)
VIH = VDD
IIH High-Level Digital Input Current 5 uA
VDD = 3.6V
VIL = GND
IIL Low-Level Digital Input Current 5 µA
VDD = 3.6V
VIH High-Level Digital Input Voltage VDD = 3.6V 0.75 × VDD V
VIL Low-Level Digital Input Voltage VDD = 3.6V 0.6 V
Control/I2C pin (A0, A1, SDA, SCL, when MODE = H, MODE1 = L)
VIH = VDD
IIH High-Level Digital Input Current 5 µA
VDD = 3.6V
VIL = GND
IIL Low-Level Digital Input Current 5 µA
VDD = 3.6V
VIH High-Level Digital Input Voltage VDD = 3.6V 1.2 V
VIL Low-Level Digital Input Voltage VDD = 3.6V 0.4 V
Control pin (CONF[2:0], when MODE = L)
VIH = VDD
IIH High-Level Digital Input Current 5 µA
VDD = 3.6V
VIL = GND
IIL Low-Level Digital Input Current 5 µA
VDD = 3.6V
VIH High-Level Digital Input Voltage VDD = 3.6V 1.2 V
VIL Low-Level Digital Input Voltage VDD = 3.6V 0.4 V
I/O pin (TX+, TX-, RX+, RX-, TX1+, TX1-, RX1+, RX1-, TX2+, TX2-, RX2+, RX2-DP0+, DP0-, DP1+, DP1-, DP2+,
DP2-, DP3+, DP3-) (AUX+, AUX-, SBU1, SBU2)
USB 3.2 Gen 2/DP 1.4 switch OFF VIO = GND
COFF 1.2 pF
capacitance f = 1MHz
USB 3.2 Gen 2/DP 1.4 switch ON VIO = GND
CON 2.3 pF
capacitance f = 1MHz
AUX+/AUX- switch OFF capaci- VIO = GND
COFF 4.0 pF
tance f = 1MHz
AUX+/AUX- switch ON capaci- VIO = GND
CON 7.0 pF
tance f = 1MHz
VDD = 3.6V,
I/O leakage for TX_to_TX1/TX2,
RX_to_RX1/RX2 DPx_to_TX/ VIO (USB 3.2 Gen 2) = 0V,
IOZL 1 5 μA
RX(x = 0, 1, 2, 3) AUX_to_SBUy(y VIO (DP 2.1) = 0V,
= 1, 2)
VIO (AUX) = 0V

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PI3USB31532Q

Symbol Parameter Conditions Min. Typ. Max. Unit

VDD = 3.6V,
I/O leakage for TX_to_TX1/TX2,
RX_to_RX1/RX2 DPx_to_TX/ VIO (USB 3.2 Gen 2) = 1.2V,
IOZH 1 15 μA
RX(x = 0, 1, 2, 3) AUX_to_SBUy(y VIO (DP 2.1) = 1.2V,
= 1, 2)
VIO (AUX) = 4.0V
Linear Region for Analog Switch
Linear Region for Analog Switch VDD = 3.3V,
Vp_IO TX_to_TX1/TX2, RX_to_RX1/ 1.4 1.6 V
RX2 DPx_to_TX/RX(x = 0, 1, 2, 3) Ipass = 10mA
Linear Region for Analog Switch VDD = 3.3V,
Vp_IOSB 4.0 4.2 V
AUX_to_SBUx(x = 1, 2) Ipass = 10mA

Dynamic Characteristics
Min and Max apply for TA between -40°C to 105°C. Typical values are referenced to TA = 25°C.
Symbol Parameter Test Conditions Min. Typ. Max. Units
Supply voltage valid or (*) the device is pow-
tstartup Startup Time ered up & channel is turn on to its specified 10 20
characteristics VDD = 3V µs
Conf[2:0] change to channel specified operat-
trcfg Reconfiguration Time 1 2
ing characteristics
tpd Propagation Delay 1 From input port to output port USB/DP 80 ps
tpd Propagation Delay 2 From input port to output port AUX 150 ps
From input port to output USB/DP Bit to bit
tsk Skew Time 1 10 ps
skew
tsk Skew Time 2 From input port to output AUX Bit to bit skew 20 ps
VI_usb_dp USB/DP Input Signal USB/DP switch analog signal -0.3 1.2 V
AUX+/AUX- Input
VI_aux AUX switch analog signal -0.35 VDD V
Signal
* Conf[2:0] changes from [000] to [001]/[010]/[011]/[100]/[101]/[110]/[111]

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 A Product Line of
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PI3USB31532Q

Switch AC Electrical Characteristics

Min and Max apply for TA between -40°C to 105°C and TJ up to +125°C (unless otherwise noted). Typical values are referenced to TA
= +25°C, VDD = 3.3V.
Symbol Parameter Frequency/Vcom Typ. Units
BW_USB -3dB bandwidth of USB 3.2 Gen 2 8.3 GHz
BW_DP -3dB bandwidth of DP 2.1 6.9 GHz
5GHz/0V USB 3.2 Gen 2 -1.7
IL Differential Insertion Loss 5Ghz/0V DP 2.1 -2.3
4.05GHz/ 0V DP 1.4 -1.6
5GHz/0V USB 3.2 Gen 2 -15
RL Differential Return Loss 5Ghz/0V DP 2.1 -12
4.05GHz/ 0V DP 1.4 -14 dB
5GHz/0V USB 3.2 Gen 2 -38
Xtalk Differential Crosstalk 5Ghz/0V DP 2.1 -30
4.05GHz/ 0V DP 1.4 -33
5GHz/0V USB 3.2 Gen 2/DP 2.1 -22
Xoff Off Isolation
4.05GHz/ 0V DP 1.4 -25

I2C Electrical Characteristics

Standard Mode Fast Mode Fast Mode Plus

Symbol Parameter (100kHz) (400kHz) (1MHz) Units

Min Max Min Max Min Max
f SCL SCL Clock Frequency 0 100 0 400 0 1000 kHz
tHD:STA Hold Time (repeated) START Condition 4.0 0.6 0.26 μs
tLOW LOW Period of the SCL Clock 4.7 1.3 0.5 μs
tHIGH HIGH Period of the SCL Clock 4.0 0.6 0.26 μs
tSET:STA Setup Time for a Repeated START Condition 4.7 0.6 0.26 μs
tHD:DAT Data Hold Time 0 3.45 0 0.9 0 0.33 μs
tSET:DAT Data Setup Time 250 100 50 ns
tf Fall Time of both SDA and SCL Signals 300 300 120 ns
tr Rise Time of both SDA and SCL Signals 1000 300 120 ns
tSET:STO Setup Time for STOP Condition 4.0 0.6 0.26 μs

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 A Product Line of
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PI3USB31532Q

Part Marking

Pericom Product Family

Device/Pkg Type

PI3USB31
532Q2ZLCE
YYWWXX
YY: Year
WW: Workweek
1st X: Assembly Code
2nd X: Fab Code

Device Naming Information

PI 3 USB 31532 Q2 ZLC E X

Blank = Tube;
X = Tape & Reel
Blank = Standard;
E = Pb-free & Green

Package Code

AEC-Q100, Grade2

Device Number

Family
USB = USB Product

Voltage Info: 2 = 1.2V to 1.8V; 3 = 3.3V

PI = Pericom

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 A Product Line of
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PI3USB31532Q

Packaging Mechanical
40-TQFN (ZLC)

DATE: 07/02/21

NOTE :
1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES DESCRIPTION: 40-Pin, TQFN 3X6mm (W-QFN3060-40)
2. COPLANARITY APPLIES TO THE EXPOSED THERMAL PAD AS WELL AS THE TERMINALS
3. REFER JEDEC MO-220 PACKAGE CODE: ZLC (ZLC40)
4. RECOMMENDED LAND PATTERN IS FOR REFERENCE ONLY
5. THERMAL PAD SOLDERING AREA (MESH STENCIL DESIGN IS RECOMMENDED) DOCUMENT CONTROL #: PD-2233 REVISION: A
21-1406

For latest package information:

See http://www.diodes.com/design/support/packaging/pericom-packaging/packaging-mechanicals-and-thermal-characteristics/.

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PI3USB31532Q

IMPORTANT NOTICE

1. DIODES INCORPORATED (Diodes) AND ITS SUBSIDIARIES MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH RE-
GARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MER-
CHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes’ products described
herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described
herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes’ products. Diodes’ prod-
ucts may be used to facilitate safety-related applications; however, in all instances customers and users are responsible for (a) selecting the appropriate
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which incorporate Diodes’ products, comply the applicable legal and regulatory requirements as well as safety and functional-safety related standards,
and (d) ensuring they design with appropriate safeguards (including testing, validation, quality control techniques, redundancy, malfunction prevention,
and appropriate treatment for aging degradation) to minimize the risks associated with their applications.

3. Diodes assumes no liability for any application-related information, support, assistance or feedback that may be provided by Diodes from time
to time. Any customer or user of this document or products described herein will assume all risks and liabilities associated with such use, and will hold
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4. Products described herein may be covered by one or more United States, international or foreign patents and pending patent applications.
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5. Diodes’ products are provided subject to Diodes’ Standard Terms and Conditions of Sale (https://www.diodes.com/about/company/terms-
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6. Diodes’ products and technology may not be used for or incorporated into any products or systems whose manufacture, use or sale is prohib-
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expenses, and attorney fees arising out of, directly or indirectly, any claim relating to any noncompliance with the applicable laws and regulations, as well
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7. While efforts have been made to ensure the information contained in this document is accurate, complete and current, it may contain technical
inaccuracies, omissions and typographical errors. Diodes does not warrant that information contained in this document is error-free and Diodes is under
no obligation to update or otherwise correct this information. Notwithstanding the foregoing, Diodes reserves the right to make modifications, enhance-
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8. Any unauthorized copying, modification, distribution, transmission, display or other use of this document (or any portion hereof) is prohibited.
Diodes assumes no responsibility for any losses incurred by the customers or users or any third parties arising from any such unauthorized use.

9. This Notice may be periodically updated with the most recent version available at https://www.diodes.com/about/company/terms-and-conditions/
important-notice

The Diodes logo is a registered trademark of Diodes Incorporated in the United States and other countries.
All other trademarks are the property of their respective owners.
© 2024 Diodes Incorporated. All Rights Reserved.

www.diodes.com

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