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MC Class 2-3 Computer Architecture

The document provides an overview of computer architecture, focusing on data sizes, memory organization, and the internal workings of CPUs. It explains the roles of buses, registers, and the arithmetic/logic unit (ALU) in data processing, as well as the relationship between the CPU, RAM, and ROM. Additionally, it includes a detailed example of CPU instruction execution and memory interaction.

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Abhishek Anand
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0% found this document useful (0 votes)
15 views20 pages

MC Class 2-3 Computer Architecture

The document provides an overview of computer architecture, focusing on data sizes, memory organization, and the internal workings of CPUs. It explains the roles of buses, registers, and the arithmetic/logic unit (ALU) in data processing, as well as the relationship between the CPU, RAM, and ROM. Additionally, it includes a detailed example of CPU instruction execution and memory interaction.

Uploaded by

Abhishek Anand
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Microcontrollers [3 1 0 4]

(ICE 2222)

Computer Architecture

Bipin Krishna
Assistant Professor (Sr.)
ICE Department
Manipal Institute of Technology
MAHE, Karnataka, India
Computer Architecture
The unit of data size:
Bit : a binary digit that can have the value 0 or 1
Byte : 8 bits
Nibble : half of a bye, or 4 bits
Word : two bytes, or 16 bits
The terms used to describe amounts of memory are:
Kilobyte (K): 2^10 bytes
Megabyte (M) : 2^20 bytes, over 1 million
Gigabyte (G) : 2^30 bytes, over 1 billion
Terabyte (T) : 2^40 bytes, over 1 trillion
Computer Architecture
Internal Organization of Computers:
Computer Architecture
Internal Organization of Computers:
Computer Architecture
Internal Organization of Computers:
The CPU is connected to memory and I/O through strips of wire called
a bus
Carries information from place to place
• Address bus
• Data bus
• Control bus
Computer Architecture
Internal Organization of Computers:
Computer Architecture
Internal Organization of Computers:

More about Data bus:


 The more data buses available, the better the CPU
 Think of data buses as highway lanes
 More data buses mean a more expensive CPU and computer
 The average size of data buses in CPUs varies between 8 and
64
 Data buses are bidirectional - To receive or send data
 The processing power of a computer is related to the size of
its buses.
Computer Architecture
Internal Organization of Computers:

More about Address bus:


 The more address buses available, the larger the number of devices that
can be addressed
 The number of locations with which a CPU can communicate is always
equal to 2^x, where x is the address lines, regardless of the size of the data
bus
 ex. a CPU with 24 address lines and 16 data lines can provide a total of
224 or 16M bytes of addressable memory
 Each location can have a maximum of 1 byte of data, since all general-
purpose CPUs are byte addressable
 The address bus is unidirectional
Computer Architecture
Internal Organization of Computers:
CPU’s Relation to RAM and ROM:
For the CPU to process information, the data must be stored in RAM or
ROM, which are referred to as primary memory
ROM provides information that is fixed and permanent
Tables or initialization program
RAM stores information that is not permanent and can change with
time
Various versions of OS and application packages
CPU gets information to be processed
 first form RAM (or ROM)
 if it is not there, then seeks it from a mass storage device, called
secondary memory, and transfers the information to RAM
Computer Architecture
Internal Organization of Computers:
Inside CPU:
Computer Architecture
Internal Organization of Computers:
Inside CPU:
ALU (arithmetic/logic unit):
 Performs arithmetic functions such as add, subtract, multiply, and divide,
and logic functions such as AND, OR, and NOT
Registers:
 The CPU uses registers to store information temporarily
Values to be processed
Address of value to be fetched from memory
 In general, the more and bigger the registers, the better the CPU
Registers can be 8-, 16-, 32-, or 64-bit
The disadvantage of more and bigger registers is the increased cost of
such a CPU
Computer Architecture
Internal Organization of Computers:
Inside CPU:
Program counter (PC):
 Points to the address of the next instruction to be executed
As each instruction is executed, the program counter is incremented to
point to the address of the next instruction to be executed
Instruction decoder:
 Interprets the instruction fetched into the CPU
A CPU capable of understanding more instructions requires more
transistors to design
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
A CPU has registers A, B, C, and D and it has an 8-bit data bus and a 16-bit
address bus.
The CPU can access memory from addresses 0000 to FFFFH
Assume that the code for the CPU to move a value to register A is B0H and
the code for adding a value to register A is 04H
The action to be performed by the CPU is to put 21H into register A, and
then add to register A values 42H and 12H
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
 The actions performed by CPU are as follows:
1. The program counter is set to the value 1400H, indicating the address of
the first instruction code to be executed
2. Following steps happens
 The CPU puts 1400H on address bus and sends it out
 The memory circuitry finds the location
 The CPU activates the READ signal, indicating to memory that it wants the
byte at location 1400H
 This causes the contents of memory location 1400H, which is B0, to
be put on the data bus and brought into the CPU
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
3.
 The CPU decodes the instruction B0
 The CPU commands its controller circuitry to bring into register A of the
CPU the byte in the next memory location
 The value 21H goes into register A
 The program counter points to the address of the next instruction to be
executed, which is 1402H
 Address 1402 is sent out on the address bus to fetch the next
instruction
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
4.
 From memory location 1402H it fetches code 04H
 After decoding, the CPU knows that it must add to the contents of register
A the byte sitting at the next address (1403)
 After the CPU brings the value (42H), it provides the contents of register A
along with this value to the ALU to perform the addition
 It then takes the result of the addition from the ALU’s output and
puts it in register A
 The program counter becomes 1404, the address of the next
instruction
Computer Architecture
Internal Organization of Computers:
Internal Working of Computers:
Example:
5.
 Address 1404H is put on the address bus and the code is fetched into the
CPU, decoded, and executed
 This code is again adding a value to register A
 The program counter is updated to 1406H
6.
 The contents of address 1406 are fetched in and executed
 This HALT instruction tells the CPU to stop incrementing the program
counter and asking for the next instruction
References:
• Muhammad Ali Mazidi, Janice Gillispie Mazidi, Rolin McKinlay, The
8051 Microcontroller and Embedded Systems Using Assembly and C,
Pearson Education, (2e), 2007.
• Kenneth J. Ayala, The 8051 Microcontroller, Cengage Learning, (3e),
2004.

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