Emc Insights and Solutions Myth Busting Emc Techniques in Power Converter Design
Emc Insights and Solutions Myth Busting Emc Techniques in Power Converter Design
converter design
April 2022
Agenda
Introduction
Study Methodology
Shielded Inductors
Conclusions
Introduction
1
Methodology
In order to accurately study the effect of each individual design technique we have designed a
set of PCB that share a similar layout but each featuring a specific change.
43XX
MPQ43XX
3 Test setup
Symmetric Input Capacitors: What is the myth about?
When placing the input capacitors symmetrically, creating 2 opposing
current loops, the magnetic fields created by the dI/dt cancel each
other as they have opposite directions.
5
Symmetric Input Capacitors: How was it tested?
2dB
3dB
2dB
9
Ground plane splitting: What is the myth about?
Return currents in the GND plane are mostly concentrated next to their source
conductor, but part of them is spread over a wider surface of the plane. These
larger current loops form a magnetic antenna and will radiate. By cutting the
GND portion of the hot loop from the rest of the board’s GND, these current
loops are forced to be smaller and thus, the emission will be lower.
Plane cuts
Current density is low, but not 0
10
Ground plane splitting: How was it tested?
Top layer PGND cut Top layer PGND cut PGND cut
GND cut GND cut
No cut on top layer
Internal layer GND cut Solid internal layer GND Solid internal layer GND Solid internal layer GND
TB6 TB11 TB12 TB13
11
Ground plane splitting: Test results
CISPR25 Class 5: CE Average measurements
Cutting the GND in several locations makes things worse. The best case is
when making a local cut to the PGND.
The difference between cutting PGND or not is minimal in most bands.
13
Ground plane splitting: Mythbusting
14
Copper under the inductor: What is the myth about?
The magnetic fields emitted by the inductor create eddy currents when they hit
perpendicular to a conductor.
These eddy currents create losses in the form of heat and reduce the effective
inductance. However, the eddy currents also generate magnetic fields which
oppose the inductor’s one. By placing copper under the inductor, most magnetic
field is captured and converted to eddy currents so the emissions are lower.
15
Copper under the inductor: How was it tested?
TB6 TB8
TB9 TB10
16
Copper under the inductor: Test results
CISPR25 Class 5: CE Average measurements
5dB
4dB 9dB
TB6: Copper under L
TB11: Removing Top
copper
TB12: Removing Internal1
and Top copper
TB13: Removing all
copper
17mm2
1.7pF 6mm2
19
Copper under the inductor: Mythbusting
20
Shielded inductors: What is the myth about?
21
Shielded inductors: How was it tested?
Changed the standard molded inductor used in all other test MPL-AL4020-1R0
to the semi-shielded MPL-SE4030-1R0
Cp=8pF Cp=3pF
22
Shielded inductors: Test results
CISPR25 Class 5: CE Average measurements
ACR
ACR
Cp=8pF Cp=3pF
26
Shielded inductors: Mythbusting
In this particular test, the shielded inductor exhibits worse EMI than the
semi-shielded. This is due to the construction of the inductor.
Each design is unique, you have to test in the early stages and evaluate
which components are best. Not all inductors are built equal.
27 Lower radiation
Credit. Christian Kueck
Extra measurement: Changing the filter from Inductor to Ferrite
CISPR25 Class 5: CE Average measurements
• Many EMC recommendations given in seminars are not valid across all designs.
There are several variables at play (PCB size, load type, harnesses…).
• The way to ensure if a design is going in the right direction is through testing in the
early stages of development.
• Start the design following the typical EMC good practices like symmetrical input
capacitance, adding a 100nF capacitor, choosing a good inductor…
• Test the initial design and see what are its shortcomings. Then come up with a plan
to fix the issues in the identified frequencies.
• Execute the improvement plan, then repeat the testing to check if the new system
is on the right track.
30
Q&A
Let us know your questions