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Emc Insights and Solutions Myth Busting Emc Techniques in Power Converter Design

The document discusses various myths related to Electro-Magnetic Compatibility (EMC) techniques in power converter design, emphasizing that common recommendations may not universally apply. Through a series of tests on different design techniques such as symmetrical input capacitors, ground plane splitting, and the use of shielded inductors, it concludes that many traditional practices require reevaluation based on specific design contexts. The document advocates for early-stage testing to identify and address EMC issues tailored to individual designs.

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0% found this document useful (0 votes)
14 views33 pages

Emc Insights and Solutions Myth Busting Emc Techniques in Power Converter Design

The document discusses various myths related to Electro-Magnetic Compatibility (EMC) techniques in power converter design, emphasizing that common recommendations may not universally apply. Through a series of tests on different design techniques such as symmetrical input capacitors, ground plane splitting, and the use of shielded inductors, it concludes that many traditional practices require reevaluation based on specific design contexts. The document advocates for early-stage testing to identify and address EMC issues tailored to individual designs.

Uploaded by

nibbolian88
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 33

Myth busting EMC Techniques in power

converter design
April 2022
Agenda

Introduction

Study Methodology

Symmetrical Input Capacitors

Splitting Ground Planes

Having Copper Under the Inductor

Shielded Inductors

Ferrite Beads as Input Filter

Conclusions
Introduction

In many seminars we are presented with a suite of techniques to improve the


Electro-Magnetic Compatibility (EMC) of our designs.

These techniques don’t often come with accurate A to B comparisons to evaluate


if they are true, or “quantify” the impact of a particular implementation.

EMC is a very “design specific” topic, there are general


physics laws that always apply, but things that are good for
a particular design may not be optimal for a different one.

This presentation shows our efforts at trying to myth bust


some of the most common EMC tips given in seminars.

1
Methodology

In order to accurately study the effect of each individual design technique we have designed a
set of PCB that share a similar layout but each featuring a specific change.

43XX

2 Standard Reference PCB


Methodology
All PCB share the same schematics, but in some cases the components were populated in
different footprints.

MPQ43XX

3 Standard Reference Schematics


Methodology
The input harness follows CISPR25 standard. The output resistor is connected with short
cables to the PCB

3 Test setup
Symmetric Input Capacitors: What is the myth about?
When placing the input capacitors symmetrically, creating 2 opposing
current loops, the magnetic fields created by the dI/dt cancel each
other as they have opposite directions.

5
Symmetric Input Capacitors: How was it tested?

Symmetric Cin Symmetric Cin Non-symmetric Non-symmetric


w/o HF cap Cin w/o HF cap Cin w/ HF cap
6
TB6 TB6’ TB3’ TB3
Symmetric Input Capacitors: Test results
CISPR25 Class 5: CE Average measurements

2dB
3dB
2dB

TB6: Symmetric Cin with


100nF
TB6’: Symmetric Cin
removing 100nF
TB3’: Asymmetric Cin
removing 100nF
TB3: Asymmetric Cin
with 100nF

In the FM band Symmetric Cin is always better. No difference at


Having the 100nF capacitor is always better. low frequencies
7
Symmetric Input Capacitors: Test results
CISPR25 Class 5: RE Log Average measurements (Vertical)

TB6: Symmetric Cin with


100nF
TB6’: Symmetric Cin 2
removing 100nF 3
TB3’: Asymmetric Cin 1 4
removing 100nF
TB3: Asymmetric Cin
with 100nF
In 1 and 3 the symmetric Cin is ~8dB better.
In 2 the symmetric Cin is ~8dB worse. In 4 it is ~3dB worse.
8 The 100nF capacitor is always better
Symmetric Input Capacitors: Mythbusting
• The symmetrical input capacitors help improve the EMI in the critical FM band
for the Conducted Emissions test.
• In the Radiated Emissions test, they improve the emissions in most bands,
while in others they degrade the performance. This is probably due to the
decrease of the parasitic L, which moves the resonances to higher frequencies.
• The 100nF capacitors are helpful in almost all frequencies.
• The more problematic bands for the symmetrical capacitors can be improved
by other methods like using a Ferrite bead or the next topics.

9
Ground plane splitting: What is the myth about?

Return currents in the GND plane are mostly concentrated next to their source
conductor, but part of them is spread over a wider surface of the plane. These
larger current loops form a magnetic antenna and will radiate. By cutting the
GND portion of the hot loop from the rest of the board’s GND, these current
loops are forced to be smaller and thus, the emission will be lower.

Plane cuts
Current density is low, but not 0

10
Ground plane splitting: How was it tested?
Top layer PGND cut Top layer PGND cut PGND cut
GND cut GND cut
No cut on top layer

Internal layer GND cut Solid internal layer GND Solid internal layer GND Solid internal layer GND
TB6 TB11 TB12 TB13
11
Ground plane splitting: Test results
CISPR25 Class 5: CE Average measurements

TB6: All GND cuts


TB11: Removing Internal
GND cut
TB12: Removing Internal
and Top GND cut
TB13: Removing all cuts

Lower frequency also looks the same


No difference! but that was expected
12
Ground plane splitting: Test results
CISPR25 Class 5: RE Log Average measurements (Vertical)

TB6: All GND cuts


TB11: Removing Internal
GND cut
TB12: Removing Internal
and Top GND cut
TB13: Removing all cuts

Cutting the GND in several locations makes things worse. The best case is
when making a local cut to the PGND.
The difference between cutting PGND or not is minimal in most bands.
13
Ground plane splitting: Mythbusting

• Splitting the GND plane in the power


converter circuit does not have a significant
improvement of EMI (<1 dBµV/m).

• Cutting the GND plane in multiple areas


degrades the GND impedance, making the
board worse.

• Cutting the PGND close to the IC increases


the thermal RJ-A .

14
Copper under the inductor: What is the myth about?

The magnetic fields emitted by the inductor create eddy currents when they hit
perpendicular to a conductor.
These eddy currents create losses in the form of heat and reduce the effective
inductance. However, the eddy currents also generate magnetic fields which
oppose the inductor’s one. By placing copper under the inductor, most magnetic
field is captured and converted to eddy currents so the emissions are lower.

15
Copper under the inductor: How was it tested?

TB6 TB8

TB9 TB10

16
Copper under the inductor: Test results
CISPR25 Class 5: CE Average measurements

5dB

TB6: Copper under L


8dB
TB11: Removing Top
copper
TB12: Removing Internal
and Top copper
TB13: Removing all
copper

The board with Top copper under the inductor is


better in the fundamental and following harmonics
17
Copper under the inductor: Test results
CISPR25 Class 5: RE Log Average measurements (Vertical)

4dB 9dB
TB6: Copper under L
TB11: Removing Top
copper
TB12: Removing Internal1
and Top copper
TB13: Removing all
copper

The board with Top copper under the inductor is


worse in most high frequency bands
18
Copper under the inductor: Analysis
VIN
CLp 8pF
Q1 V
The copper area under the inductor in top
L
SW t layer is Vout. The eddy currents are induced
CSWp COUT there. The Parasitic Capacitance between
Q2
CDS
CPCB SW and Vout is increased by this extra area.

17mm2
1.7pF 6mm2

19
Copper under the inductor: Mythbusting

The test results in CE show a reduction in the emitted noise when


having copper directly under the inductor.

The test results in RE show an increase in the emitted noise when


having copper directly under the inductor. This may be caused by the
copper being Vout instead of GND.

20
Shielded inductors: What is the myth about?

Shielded inductors are regarded as to always have better EMC performance


compared to non-shielded or semi-shielded inductors.

Shielded (molded) Semi-Shielded (epoxy coating)

21
Shielded inductors: How was it tested?

Changed the standard molded inductor used in all other test MPL-AL4020-1R0
to the semi-shielded MPL-SE4030-1R0

Cp=8pF Cp=3pF

22
Shielded inductors: Test results
CISPR25 Class 5: CE Average measurements

TB6: Molded Inductor


9dB
TB15: Semi-Shielded
Inductor

The semi-shielded inductor is much better at


23 low frequency and helps at the FM band.
Shielded inductors: Test results
CISPR25 Class 5: Monopole Average measurements

TB6: Molded Inductor


4dB
TB15: Semi-Shielded
Inductor

The semi-shielded inductor emits less E-field


24
Shielded inductors: Test results
CISPR25 Class 5: RE Log Average measurements (vertical)

TB6: Molded Inductor


TB15: Semi-Shielded
Inductor

Overall the semi-shielded looks better except


25 for the resonance at 320MHz.
Shielded inductors: Analysis

Larger area for


E-field radiation

Shielded (molded) Semi-Shielded (epoxy coating)

ACR
ACR

Cp=8pF Cp=3pF

26
Shielded inductors: Mythbusting

From previous experience, it is true that in some cases shielded


inductors improve the EMC results.

In this particular test, the shielded inductor exhibits worse EMI than the
semi-shielded. This is due to the construction of the inductor.

Each design is unique, you have to test in the early stages and evaluate
which components are best. Not all inductors are built equal.

27 Lower radiation
Credit. Christian Kueck
Extra measurement: Changing the filter from Inductor to Ferrite
CISPR25 Class 5: CE Average measurements

TB15: L2 as 1uH inductor


TB15: L2 as ferrite bead

The ferrite bead provides less attenuation at the


28 fundamental frequency, but is similar in the FM band.
Extra measurement: Changing the filter from Inductor to Ferrite
CISPR25 Class 5: RE Log Average measurements (vertical)

TB15: L2 as 1uH inductor


TB15: L2 as ferrite bead

The ferrite bead provides improves Radiated EMI


29 across all bands.
Conclusions

• Many EMC recommendations given in seminars are not valid across all designs.
There are several variables at play (PCB size, load type, harnesses…).

• The way to ensure if a design is going in the right direction is through testing in the
early stages of development.

• Start the design following the typical EMC good practices like symmetrical input
capacitance, adding a 100nF capacitor, choosing a good inductor…

• Test the initial design and see what are its shortcomings. Then come up with a plan
to fix the issues in the identified frequencies.

• Execute the improvement plan, then repeat the testing to check if the new system
is on the right track.

30
Q&A
Let us know your questions

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