PAI – UNIT 2

1. Explain the concept of a microprocessor and its significance in modern computing?

Ans. A microprocessor is an integrated circuit that is also known as the central processing unit (CPU)
of a computer. It consists of three main components: the arithmetic logic unit (ALU), the control unit,
and registers. These components work together to perform calculations, fetch data, control the flow
of information, and output data.

Parts of microprocessor:
1) Arithmetic Logic Unit: This unit performs all the arithmetical and logical operations given to CPU.

2) Control Unit: Directs the operation of the processor, coordinating the activities of the ALU, memory,
and I/O devices.

3) Registers: This are the fastest memory present in entire system, which stores the data on temporary
basis.

4). Cache Memory: A small amount of high-speed memory that stores frequently accessed data to
speed up processing.

5). Bus Interface: This helps in connecting the microprocessor to other components like memory and
I/O devices.

Significance:

1. Processing Power: Microprocessors execute instructions and perform calculations at high speeds,
enabling complex computations and data processing tasks essential for applications ranging from
simple calculators to advanced scientific simulations.

2. Integration: They integrate multiple functions into a single chip, including arithmetic logic units
(ALUs), control units, and memory management, reducing the physical size and power consumption
of computing systems.
3. Versatility: Microprocessors can be found in a wide range of devices, from personal computers and
smartphones to embedded systems in appliances, automotive electronics, and industrial machines,
demonstrating their adaptability to various applications.

4. Cost Efficiency: The miniaturization and mass production of microprocessors have significantly
reduced costs, making computing accessible to a broader audience and enabling the proliferation of
technology in everyday life.

5. Software Development: Microprocessors support diverse operating systems and applications,

facilitating software development and innovation. This has led to the growth of a vast ecosystem of
software products and services.

6. Artificial Intelligence and Machine Learning: Modern microprocessors are designed to handle
complex algorithms required for AI and ML, driving advancements in automation, data analysis, and
intelligent systems.
2. What are some of the most commonly used microprocessors today, and what are their primary
applications?

Ans.

1) Intel Processors (i3, i5, i7): Intel Core i-series processors are widely used in personal computing,
including desktops and laptops for everyday tasks and gaming. They are also utilized in workstations
for graphic design and video editing, entry-level servers for small businesses, and embedded systems
in various applications.

2) AMD Ryzen: AMD Ryzen processors are well-liked for their good performance and value in different
uses. They are commonly found in personal computers, gaming systems, and workstations, offering
great multi-core performance for tasks such as content creation and video editing. Ryzen processors
are also popular for budget gaming builds and are used in servers and embedded systems because
they use less power and have many cores.

3) ATmega328: The ATmega328 microcontroller is primarily used in Arduino projects, making it popular
for DIY electronics and educational purposes. It's also found in robotics for motor and sensor control,
as well as in home automation systems for managing devices like lights and appliances. Additionally, it
is used in sensor monitoring and prototyping applications.

4). Qualcomm Snapdragon: Qualcomm Snapdragon processors are primarily used in smartphones and
tablets for high-performance computing and graphics. They are also integrated into wearable devices
for health tracking, automotive systems for infotainment and navigation, and Internet of Things (IoT)
applications to enable connectivity and smart functionalities.

5). Apple M Series: The Apple M processors are primarily used in Apple's Mac computers and iPads,
providing high performance and energy efficiency for tasks such as video editing, graphic design, and
software development. They also power applications in creative workflows, gaming, and professional
software, while enabling advanced features like machine learning and enhanced graphics processing.
3. Draw and explain functional block diagram of 8086

Ans. The 8086 microprocessor uses a pipelined architecture and is divided into two units: the
Execution Unit (EU) and the Bus Interface Unit (BIU). This division allows the two units to operate
separately.

Execution Unit Bus Interface Unit

Function of Execution Unit: EU executes instructions that have already been fetched by the BIU

Function of Bus Interface Unit: BIU fetches instructions, reads data from memory and I/O ports, writes
data to memory and I/ O ports.

1) General-Purpose Registers:

AH, AL, BH, BL, CH, CL, DH, DL: These are 8-bit registers.

AX, BX, CX, DX: You can combine the 8-bit registers to make 16-bit registers. These registers are used
for basic tasks like math operations and handling data.

SP, BP, SI, DI: These are 16-bit registers.

SP (Stack Pointer): Points to the top of the stack (a special area in memory).

BP (Base Pointer): Helps access data in the stack, like function parameters.
SI (Source Index) and DI (Destination Index): Used for string operations, indicating where to read from
(source) and where to write to (destination).

2) Segment Registers:

CS (Code Segment): Holds the starting address of the code segment, which contains the executable
instructions.

DS (Data Segment): Stores the starting address of the data segment, where program data is kept.

SS (Stack Segment): Holds the starting address of the stack segment, which is used for managing
function calls and local variables.

ES (Extra Segment): Stores the starting address of an additional data segment, often used for extra
data storage.

IP (Instruction Pointer): A 16-bit register that keeps track of the address of the next instruction that
the CPU will execute.

3) ALU (Arithmetic Logic Unit): The ALU performs arithmetic and logical operations. It's one of the
most critical components of the CPU.

4) Temporary Registers: These registers are used by the CPU during operations to temporarily store
data and intermediate results.

5) Flag Register: This register indicates the status of the processor after an operation. It consists of
various flags, such as the Zero flag, Carry flag, Sign flag, etc., that provide information about the result
of the last operation.

6) Internal Control System: This block controls the operations of the processor, including instruction
decoding, sequencing, and execution.

7) Bus Control Logic: This manages the flow of data and instructions between the CPU and memory or
I/O devices through the data, address, and control buses.

8) Address Generation Unit: This unit is responsible for generating the effective address that is used
to access memory or I/O devices. It combines segment registers and offset values to calculate physical
memory addresses.

9) Internal Communication Registers: These registers facilitate communication within the

microprocessor by holding intermediate values during the execution of instructions.
4. Discuss in detail role of BIU in 8086 architecture using suitable diagram

Ans. Role of Bus Interface Unit: BIU fetches instructions, reads data from memory and I/O ports, writes
data to memory and I/ O ports.

BIU (Bus Interface Unit)

BIU takes care of all data and addresses transfers on the buses for the EU like sending addresses,
fetching instructions from the memory, reading data from the ports and the memory as well as writing
data to the ports and the memory. EU has no direction connection with System Buses so this is possible
with the BIU. EU and BIU are connected with the Internal Bus.

Adder: An adder is used for address generation, and it consists of converting a logical address into a
physical address. A logical address consists of a segment base address and an offset address, both 16
bits each, while a physical address is 20 bits.

This address translation involves two steps:

1. The 16-bit segment base address is converted into a 20-bit address by inserting the least
significant hex digit (shifting the segment left by 4 bits).

2. The 16-bit offset address is then added to the 20-bit segment base address obtained from the first
step.
Ex.

It has the following functional parts −

1) Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of next instructions
and stores them in the instruction queue. When EU executes instructions and is ready for its next
instruction, then it simply reads the instruction from this instruction queue resulting in increased
execution speed. Fetching the next instruction while the current instruction executes is
called pipelining.

2) Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of
instructions and data in memory, which are used by the processor to access memory locations. It also
contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU.

a) CS − It stands for Code Segment. It is used for addressing a memory location in the code segment of
the memory, where the executable program is stored.

b) DS − It stands for Data Segment. It consists of data used by the program andis accessed in the data
segment by an offset address or the content of other register that holds the offset address.

c) SS − It stands for Stack Segment. It handles memory to store data and addresses during execution.

d) ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to hold
the extra destination data.

3) Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be
executed.
5. Discuss in detail role of EU in 8086 architecture using suitable diagram.
Ans.

From Instruction
queue

EU (Execution Unit)

EU executes instructions that have already been fetched by the BIU. Its function is to control operations
on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown
in the above figure, it performs operations over data through BIU.

1) ALU: It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.

2) Flag Register: It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to
the result stored in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional
Flags and Control Flags.

3) Conditional Flags: It represents the result of the last arithmetic or logical instruction executed.
a) Carry flag − This flag indicates an overflow condition for arithmetic operations.

b) Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower
nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4
is AF flag. The processor uses this flag to perform binary to BCD conversion.

c) Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of
the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity
Flag is reset.

d) Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set
to 0.

e) Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative,
then the sign flag is set to 1 else set to 0.

f) Overflow flag − This flag represents the result when the system capacity is exceeded.

4) Control Flags: Control flags controls the operations of the execution unit.

a) Trap flag − It is used for single step control and allows the user to execute one instruction at a time
for debugging. If it is set, then the program can be run in a single step mode.

b) Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of
a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition.

c) Direction flag − It is used in string operation. As the name suggests when it is set then string bytes
are accessed from the higher memory address to the lower memory address and vice-a-versa.

5) General purpose register: There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and
DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16bit
data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the
AX, BX, CX, and DX respectively.

5) Stack pointer register: It is a 16-bit register, which holds the address from the start of the segment
to the memory location, where a word was most recently stored on the stack.
6. Determine the contents of the flag register after execution of the instruction for performing the
addition of the numbers given below. (0110 0111 0010 1001)2& (0011 01010100 1011)2.

Ans.

1. Perform the addition.

2. Analyze the result to determine the flags.

Step 1: Perform the addition

0110 0111 0010 1001

+ 0011 0101 0100 1011

-------------------------

1000 1100 0111 0100

Step 2: Analyze the result to determine the flags

1. Zero Flag (Z): Set if the result is zero.

The result is 1000 1100 0111 0100, which is not zero.

Z = 0.

2. Sign Flag (S): Set if the result is negative (for signed numbers).

Since we are using the MSB (most significant bit) as the sign bit, and the result is 1 in the MSB
(indicating a negative number for signed interpretation),

S = 1.

3. Carry Flag (C): Set if there was a carry out of the most significant bit.

The addition did not produce a carry since the most significant bit of both numbers was 0 and the sum
is less than 216.

C = 0.

4. Overflow Flag (O): Set if there is an overflow in signed arithmetic.

Overflow occurs when the sign of the two operands is the same, and the sign of the result is different.
Here, both operands are positive, but the result is interpreted as negative.

O = 1.

The contents of the flag register after the execution of the addition are:

Flags: C = 0, Z = 0, S = 1, O = 1.
7. Discuss the register organization of 8086 processor & explain the function of each register.
Ans.

Code Segment Register

1) CS contains the base or start of the current code segment; IP contains the distance or offset from
this address to the next instruction byte to be fetched.

2) BIU computes the 20-bit physical address by logically shifting the contents of CS 4-bits to the left
and then adding the 16-bit contents of IP.

3) That is, all instructions of a program are relative to the contents of the CS register multiplied by 16
(or 10H) and then offset is added provided by the IP.

Data Segment Register

1) Points to the current data segment; operands for most instructions are fetched from this segment.

2) The 16-bit contents of the Source Index (SI) or Destination Index (DI) or a 16-bit displacement are
used as offset for computing the 20-bit physical address.

Stack Segment Register

1) Points to the current stack.

2) The 20-bit physical stack address is calculated from the Stack Segment (SS) and the Stack Pointer
(SP) for stack instructions such as PUSH and POP.

3) In based addressing mode, the 20-bit physical stack address is calculated from the Stack segment
(SS) and the Base Pointer (BP).

Extra Segment Register

1) Points to the extra segment in which data (in excess of 64K pointed to by the DS) is stored.

2) String instructions use the ES and DI to determine the 20- bit physical address for the destination.

Instruction Pointer

1) Always points to the next instruction to be executed within the currently executing code segment.
So, this register contains the 16-bit offset address pointing to the next instruction code within the 64Kb
of the code segment area.

2) Its content is automatically incremented as the execution of the next instruction takes place.

General Purpose Registers: (GPRs) are a set of registers in a CPU used to store temporary data and
perform various operations during program execution.

1) AX (Accumulator Register):

a) AH [8]: High byte of the accumulator.

b) AL [8]: Low byte of the accumulator.

Used for arithmetic, logic, and data transfer operations.

2) BX (Base Register):

a) BH [8]: High byte of the base register.

b) BL [8]: Low byte of the base register.

Primarily used as a base pointer for memory access.

3) CX (Counter Register):

a) CH [8]: High byte of the counter.

b) CL [8]: Low byte of the counter.

Used in loop and shift/rotate operations.

4) DX (Data Register):

a) DH [8]: High byte of the data register.

b) DL [8]: Low byte of the data register.

Used in input/output operations and multiplication/division.

Segment Registers: Segment Registers are a specialized set of registers in a CPU, particularly in x86
architecture, that are used to manage memory segmentation.

1) ES [16] (Extra Segment Register): Used for addressing memory locations in the extra segment.

2) CS [16] (Code Segment Register): Points to the segment containing the currently executing code.

3) DS [16] (Data Segment Register): Points to the segment containing data or variables.

4) SS [16] (Stack Segment Register): Points to the segment containing the stack.

Segment Offset Pointers: Segment Offset Pointers are used in conjunction with segment registers to
form a complete memory address in segmented memory architectures, such as x86.

1) SP [16] (Stack Pointer): Points to the top of the stack in the stack segment.

2) BP [16] (Base Pointer): Used to access parameters passed to a subroutine.

3) SI [16] (Source Index): Used as a source pointer for string operations.

4) DI [16] (Destination Index): Used as a destination pointer for string operations.

5) IP [16] (Instruction Pointer): Points to the next instruction to be executed.

The Program Status Word: (PSW), also known as the Flag Register in many CPU architectures, is a
special-purpose register that holds the current state of the processor.

1) Flag [16]: Contains status flags that reflect the outcome of operations. There are different types of
flag like Zero flag, Carry flag, Sign flag.
8. Draw and explain Programmer’s model of 8086 Microprocessor.
Ans.

General Purpose Registers:

1) AX (Accumulator Register):

a) AH [8]: High byte of the accumulator.

b) AL [8]: Low byte of the accumulator.

Used for arithmetic, logic, and data transfer operations.

2) BX (Base Register):

a) BH [8]: High byte of the base register.

b) BL [8]: Low byte of the base register.

Primarily used as a base pointer for memory access.

3) CX (Counter Register):

a) CH [8]: High byte of the counter.

b) CL [8]: Low byte of the counter.

Used in loop and shift/rotate operations.

4) DX (Data Register):

a) DH [8]: High byte of the data register.

b) DL [8]: Low byte of the data register.

Used in input/output operations and multiplication/division.

Segment Registers:

1) ES [16] (Extra Segment Register): Used for addressing memory locations in the extra segment.

2) CS [16] (Code Segment Register): Points to the segment containing the currently executing code.

3) DS [16] (Data Segment Register): Points to the segment containing data or variables.

4) SS [16] (Stack Segment Register): Points to the segment containing the stack.

Segment Offset Pointers:

1) SP [16] (Stack Pointer): Points to the top of the stack in the stack segment.

2) BP [16] (Base Pointer): Used to access parameters passed to a subroutine.

3) SI [16] (Source Index): Used as a source pointer for string operations.

4) DI [16] (Destination Index): Used as a destination pointer for string operations.

5) IP [16] (Instruction Pointer): Points to the next instruction to be executed.

Program Status Word (Flag Register):

1) Flag [16]: Contains status flags that reflect the outcome of operations (e.g., Zero flag, Carry flag,
Sign flag).
9. What do you mean by pipelined architecture? How is it implemented in 8086?
Ans. Pipelined architecture improves system throughput by allowing multiple instructions to be
processed simultaneously in different stages, similar to an assembly line.

In a pipelined processor, the next instruction starts before the previous one finishes,
increasing parallelism and efficiency. However, pipelining introduces challenges like data,
control, and structural hazards, which can disrupt the smooth flow of instructions.
The Intel 8086 microprocessor, introduced in 1978, features a simple two-stage pipeline with
a Fetch stage that loads instructions into a 6-byte prefetch queue, and an Execute stage that
processes the instructions.
10. Explain the concept of segmented memory? What are its advantages?
Ans.

Segmented memory is a memory management scheme used in some computer architectures,

where the memory is divided into different segments. Each segment can be independently
addressed and managed. This approach was notably used in the Intel 8086 microprocessor,
among others.
Rules in segmentation:
1). Segment size is exactly 64KB.
2). Every memory segment has to begin at an address which is exactly divisible by 16.
3). Memory segments can be disjoin, continuous, overlapping, partially or completely due to
which memory segments can be greater than 24 (in general).

Segments: Memory is divided into logical segments, each up to 64 KB (e.g., in the 8086).
Common segments include the code segment (instructions), data segment (variables), stack
segment (function calls/local variables), and extra segment (additional data).
Segment Registers: The 8086 uses four segment registers: CS (Code Segment), DS (Data
Segment), SS (Stack Segment), and ES (Extra Segment), which hold the base addresses of their
respective segments.
Offset Addressing: A specific memory location within a segment is accessed using an offset.
The physical address is calculated by shifting the segment address left by 4 bits (multiplying
by 16) and adding the offset.
Logical vs. Physical Address: A logical address combines a segment and an offset (e.g., CS:IP
for instructions), while the physical address is derived from the logical address.
Advantages of Segmented Memory:
1. Larger Addressable Memory: Enables addressing up to 1 MB of memory, even with a 16-bit
address, like in the 8086.
2. Modular Organization: Improves program structure by storing code, data, and stack in
separate segments.
3. Efficient Memory Use: Allows flexible and efficient loading and relocation of programs in
memory.
4. Protection and Isolation: Provides memory protection by isolating segments, preventing
unauthorized access between programs.
5. Dynamic Memory Allocation: Facilitates easy management of memory with dynamic
allocation and deallocation.

Updated on 24-08-2024 at 00:54 by Mayur Pagote.