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VHDL

This lab report focuses on VHDL (VHSIC Hardware Description Language) and includes objectives, theory, and practical implementations. It contains VHDL code examples for a 4-to-1 multiplexer, sequential circuit, 2-bit multiplier, and encoder, along with explanations of their structures and functionalities. The report aims to familiarize students with VHDL code structure and its application in designing digital circuits.

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shoojeet adhikari
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8 views

VHDL

This lab report focuses on VHDL (VHSIC Hardware Description Language) and includes objectives, theory, and practical implementations. It contains VHDL code examples for a 4-to-1 multiplexer, sequential circuit, 2-bit multiplier, and encoder, along with explanations of their structures and functionalities. The report aims to familiarize students with VHDL code structure and its application in designing digital circuits.

Uploaded by

shoojeet adhikari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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NATIONAL COLLEGE OF ENGINEERING

(Affiliated to Tribhuvan University)


Talchhikhel, Lalitpur

A LAB REPORT ON
VHDL

Submitted by: Submitted to:

Name: Arudhi Bohora Department of Electronics and


Computer Engineering
Roll No: 06
Date: 2081/11/06
Title: A lab on VHDL Implementation

Objectives:
 To get familiarize with VHDL code structure and architecture.

Theory

VHDL (VHSIC Hardware Description Language) is a programming language used to design and
simulate digital circuits. It was developed in the 1980s as part of the Very High-Speed
Integrated Circuit program. VHDL helps designers describe how a circuit should work and how
different parts connect. It allows designing circuits at different levels, from simple logic gates to
complex systems. Unlike normal programming languages, VHDL works with parallel execution,
meaning multiple tasks happen at the same time, just like real hardware. It is widely used for
designing FPGAs (Field-Programmable Gate Arrays) and ASICs (Application-Specific Integrated
Circuits). With VHDL, engineers can test and refine their designs before making actual
hardware, making it a key tool in modern electronics.

1. Write a VHDL code for a 4-to-1 multiplexer and also


draw result.

Code:

entity Multiplexer is
Port ( A : in STD_LOGIC_VECTOR (3 downto 0);
Y : out STD_LOGIC;
S : in STD_LOGIC_VECTOR (1 downto 0));
end Multiplexer;

architecture Behavioral of Multiplexer is

begin

process(S,A)
begin
if(S="00") then
Y<=A(0);
elsif (S="01") then
Y<=A(1);
elsif (S="10") then
Y<=A(2);
else
Y<=A(3);
end if;
end process;

end Behavioral;
2. Write a VHDL code for Sequential Circuit and also
draw result.

CODE:
entity Sequential_Circuit is
Port ( D : in STD_LOGIC;
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
Q : out STD_LOGIC);
end Sequential_Circuit;
architecture Behavioral of Sequential_Circuit is:
begin
process(RST,CLK,D)
begin
if(RST='0') then
Q<='0';
elsif (CLK='1') then
Q<=D;
end if;
end process;
end Behavioral;
3. Write VHDL code for 2-bit multiplier and also draw
output.

CODE:
entity Two_Bit_Multiplier is
Port ( A : in STD_LOGIC_VECTOR (1 downto 0);
B : in STD_LOGIC_VECTOR (1 downto 0);
C : in STD_LOGIC_VECTOR (1 downto 0);
D : in STD_LOGIC_VECTOR (1 downto 0);
Sel : in STD_LOGIC_VECTOR (1 downto 0);
Z : out STD_LOGIC_VECTOR (1 downto 0));
end Two_Bit_Multiplier;

architecture Behavioral of Two_Bit_Multiplier is

begin
proc: process(A,B,C,D,Sel)
begin
if (Sel="00") then Z<=A;
elsif (Sel="01") then Z<=B;
elsif (Sel="10") then Z<=C;
else Z<=C;
end if;
end process proc;
end Behavioral;
4. Write VHDL code for encoder and also draw result.

CODE:
entity Encoder is
Port ( A : in STD_LOGIC_VECTOR (3 downto 0);
Y : out STD_LOGIC_VECTOR (1 downto 0));
end Encoder;

architecture Behavioral of Encoder is


begin
process(A)
begin
case A is
when "0001"=>
Y<="00";
when "0010"=>
Y<="01";
when "0100"=>
Y<="10";
when "1000"=>
Y<="11";
when others=>
y<="ZZ";
end case;
end process;
end Behavioral;

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