Unit-II

TRANSISTORS
❖ BJT Construction and Working

❖ Modes of operation

❖ Configurations of BJT (CB, CE, CC)

❖ CE Amplifier Analysis

❖ Construction and working of JFET

❖ V I Characteristics of JFET
 Transistor - Overview
After knowing the details about a single PN junction, or simply a diode, let us try to go for the
two PN junction connection. If another P-type material or N-type material is added to a single
PN junction, another junction will be formed. Such a formation is simply called as
a Transistor.
A Transistor is a three terminal semiconductor device that regulates current or voltage flow
and acts as a switch or gate for signals.

Uses of a transistor
• A transistor acts as an Amplifier, where the signal strength has to be increased.
• A transistor also acts as a switch to choose between available options.
• It also regulates the incoming current and voltage of the signals.

Constructional Details of a Transistor

The Transistor is a three terminal solid state device which is formed by connecting two diodes
back to back. Hence it has got two PN junctions. Three terminals are drawn out of the three
semiconductor materials present in it. This type of connection offers two types of transistors.
They are PNP and NPN which means an N-type material between two Ptypes and the other is a
P-type material between two N-types respectively.
The following illustration shows the basic construction of transistors

Fig 1: Construction of Transistor

The three terminals drawn from the transistor indicate Emitter, base and Collector terminals.
They have their functionality as discussed below.

Emitter
• The left-hand side of the above shown structure can be understood as Emitter.
 • This has a moderate size and is heavily doped as its main function is to supply a
number of majority carriers, i.e. either electrons or holes.
• As this emits electrons, it is called as an Emitter.
• This is simply indicated with the letter E.

Base
• The middle material in the above figure is the Base.
• This is thin and lightly doped.
• Its main function is to pass the majority carriers from the emitter to the collector.
• This is indicated by the letter B.

Collector
• The right side material in the above figure can be understood as a Collector.
• Its name implies its function of collecting the carriers.
• This is a bit larger in size than emitter and base. It is moderately doped.
• This is indicated by the letter C.
The symbols of PNP and NPN transistors are as shown below.

Fig 2:Symbol of Transistor

The arrow-head in the above figures indicated the emitter of a transistor. As the collector of a
transistor has to dissipate much greater power, it is made large. Due to the specific functions of
emitter and collector, they are not interchangeable. Hence the terminals are always to be kept
in mind while using a transistor.
In a Practical transistor, there is a notch present near the emitter lead for identification. The PNP
and NPN transistors can be differentiated using a Multimeter. The following image shows how
different practical transistors look like.

We have so far discussed the constructional details of a transistor, but to understand the
operation of a transistor, first we need to know about the biasing.

Transistor Biasing
As we know that a transistor is a combination of two diodes, we have two junctions here. As
one junction is between the emitter and base, that is called as Emitter-Base junction and
likewise, the other is Collector-Base junction.
Biasing is controlling the operation of the circuit by providing power supply. The function of
both the PN junctions is controlled by providing bias to the circuit through some dc supply. The
figure below shows how a transistor is biased.
 Fig 3:Transistor Biasing

By having a look at the above figure, it is understood that

• The N-type material is provided negative supply and P-type material is given positive
supply to make the circuit Forward bias.
• The N-type material is provided positive supply and P-type material is given negative
supply to make the circuit Reverse bias.
By applying the power, the emitter base junction is always forward biased as the emitter
resistance is very small. The collector base junction is reverse biased and its resistance is a bit
higher. A small forward bias is sufficient at the emitter junction whereas a high reverse bias has
to be applied at the collector junction.
The direction of current indicated in the circuits above, also called as the Conventional
Current, is the movement of hole current which is opposite to the electron current.

Operation of PNP Transistor

The operation of a PNP transistor can be explained by having a look at the following figure, in
which emitter-base junction is forward biased and collector-base junction is reverse biased.
 Fig 4: Transistor Biasing Forward bias

The voltage VEE provides a positive potential at the emitter which repels the holes in the P-type
material and these holes cross the emitter-base junction, to reach the base region. There a very
low percent of holes re-combine with free electrons of N-region. This provides very low current
which constitutes the base current IB. The remaining holes cross the collector-base junction, to
constitute collector current IC, which is the hole current.
As a hole reaches the collector terminal, an electron from the battery negative terminal fills the
space in the collector. This flow slowly increases and the electron minority current flows
through the emitter, where each electron entering the positive terminal of VEE, is replaced by a
hole by moving towards the emitter junction. This constitutes emitter current IE.
Hence we can understand that −
• The conduction in a PNP transistor takes place through holes.
• The collector current is slightly less than the emitter current.
• The increase or decrease in the emitter current affects the collector current.

Operation of NPN Transistor

The operation of an NPN transistor can be explained by having a look at the following figure, in
which emitter-base junction is forward biased and collector-base junction is reverse biased.
 Fig 4: Transistor Biasing Reverse bias

The voltage VEE provides a negative potential at the emitter which repels the electrons in the N-
type material and these electrons cross the emitter-base junction, to reach the base region.
There, a very low percent of electrons re-combine with free holes of P-region. This provides
very low current which constitutes the base current IB. The remaining holes cross the collector-
base junction, to constitute the collector current IC.
As an electron reaches out of the collector terminal, and enters the positive terminal of the
battery, an electron from the negative terminal of the battery VEE enters the emitter region. This
flow slowly increases and the electron current flows through the transistor.
Hence we can understand that −
• The conduction in a NPN transistor takes place through electrons.
• The collector current is higher than the emitter current.
• The increase or decrease in the emitter current affects the collector current.

Advantages of Transistors
There are many advantages of using a transistor, such as −

• High voltage gain.

• Lower supply voltage is sufficient.
• Most suitable for low power applications.
• Smaller and lighter in weight.
 • Mechanically stronger than vacuum tubes.
• No external heating required like vacuum tubes.
• Very suitable to integrate with resistors and diodes to produce ICs.
There are few disadvantages such as they cannot be used for high power applications due to
lower power dissipation. They have lower input impedance and they are temperature dependent.

Transistor Configurations
Any transistor has three terminals, the emitter, the base, and the collector. Using these 3
terminals the transistor can be connected in a circuit with one terminal common to both input
and output in three different possible configurations.
The three types of configurations are Common Base, Common Emitter and Common
Collector configurations. In every configuration, the emitter junction is forward biased and the
collector junction is reverse biased.

Common Base (CB) Configuration

The name itself implies that the Base terminal is taken as common terminal for both input and
output of the transistor. The common base connection for both NPN and PNP transistors is as
shown in the following figure.

Fig 6 : Transistor Common Base Configuration

For the sake of understanding, let us consider NPN transistor in CB configuration. When the
emitter voltage is applied, as it is forward biased, the electrons from the negative terminal repel
the emitter electrons and current flows through the emitter and base to the collector to
contribute collector current. The collector voltage VCB is kept constant throughout this.
In the CB configuration, the input current is the emitter current IE and the output current is the
collector current IC.
Current Amplification Factor (α)
The ratio of change in collector current (ΔIC) to the change in emitter current (ΔIE) when
collector voltage VCB is kept constant, is called as Current amplification factor. It is denoted
by α.
α=ΔICΔIEα=ΔICΔIE at constant VCB
Expression for Collector current
Along with the emitter current flowing, there is some amount of base current IB which flows
through the base terminal due to electron hole recombination. As collector-base junction is
reverse biased, there is another current which is flown due to minority charge carriers. This is
the leakage current which can be understood as Ileakage. This is due to minority charge carriers
and hence very small.
The emitter current that reaches the collector terminal is
αIE

Total collector current

IC=αIE+IleakageIC=αIE+Ileakage

If the emitter-base voltage VEB = 0, even then, there flows a small leakage current, which can be
termed as ICBO (collector-base current with output open).
The collector current therefore can be expressed as
IC=αIE+ICBOIC=αIE+ICBO

IE=IC+IBIE=IC+IB

IC=α(IC+IB)+ICBOIC=α(IC+IB)+ICBO

IC(1−α)=αIB+ICBOIC(1−α)=αIB+ICBO

IC=α1−αIB+ICBO1−αIC=α1−αIB+ICBO1−α

IC=(α1−α)IB+(11−α)ICBOIC=(α1−α)IB+(11−α)ICBO

Hence the above derived is the expression for collector current. The value of collector current
depends on base current and leakage current along with the current amplification factor of that
transistor in use.

Characteristics of CB configuration
• This configuration provides voltage gain but no current gain.
 • Being VCB constant, with a small increase in the Emitter-base voltage VEB, Emitter
current IE gets increased.
• Emitter Current IE is independent of Collector voltage VCB.
• Collector Voltage VCB can affect the collector current IC only at low voltages, when
VEB is kept constant.
• The input resistance Ri is the ratio of change in emitter-base voltage (ΔVEB) to the
change in emitter current (ΔIE) at constant collector base voltage VCB.
Ri=ΔVEBΔIERi=ΔVEBΔIE at constant VCB
• As the input resistance is of very low value, a small value of VEB is enough to produce a
large current flow of emitter current IE.
• The output resistance Ro is the ratio of change in the collector base voltage (ΔVCB) to the
change in collector current (ΔIC) at constant emitter current IE.
Ro=ΔVCBΔICRo=ΔVCBΔIC at constant IE
• As the output resistance is of very high value, a large change in VCBproduces a very little
change in collector current IC.
• This Configuration provides good stability against increase in temperature.
• The CB configuration is used for high frequency applications.

Common Emitter (CE) Configuration

The name itself implies that the Emitter terminal is taken as common terminal for both input
and output of the transistor. The common emitter connection for both NPN and PNP transistors
is as shown in the following figure.

Fig 6 : Transistor Common emitter Configuration

Just as in CB configuration, the emitter junction is forward biased and the collector junction is
reverse biased. The flow of electrons is controlled in the same manner. The input current is the
base current IB and the output current is the collector current IC here.

Base Current Amplification factor (β)

The ratio of change in collector current (ΔIC) to the change in base current (ΔIB) is known
as Base Current Amplification Factor. It is denoted by β.
β=ΔICΔIBβ=ΔICΔIB

Relation between β and α

Let us try to derive the relation between base current amplification factor and emitter current
amplification factor.
β=ΔICΔIBβ=ΔICΔIB

α=ΔICΔIEα=ΔICΔIE

IE=IB+ICIE=IB+IC

ΔIE=ΔIB+ΔICΔIE=ΔIB+ΔIC

ΔIB=ΔIE−ΔICΔIB=ΔIE−ΔIC

We can write
β=ΔICΔIE−ΔICβ=ΔICΔIE−ΔIC

Dividing by ΔIE
β=ΔIC/ΔIEΔIEΔIE−ΔICΔIEβ=ΔIC/ΔIEΔIEΔIE−ΔICΔIE

We have
α=ΔIC/ΔIEα=ΔIC/ΔIE

Therefore,
β=α1−αβ=α1−α

From the above equation, it is evident that, as α approaches 1, β reaches infinity.

Hence, the current gain in Common Emitter connection is very high. This is the reason this
circuit connection is mostly used in all transistor applications.

Expression for Collector Current

In the Common Emitter configuration, IB is the input current and IC is the output current.
We know
IE=IB+ICIE=IB+IC

And
IC=αIE+ICBOIC=αIE+ICBO

=α(IB+IC)+ICBO=α(IB+IC)+ICBO

IC(1−α)=αIB+ICBOIC(1−α)=αIB+ICBO

IC=α1−αIB+11−αICBOIC=α1−αIB+11−αICBO

If base circuit is open, i.e. if IB = 0,

The collector emitter current with base open is ICEO
ICEO=11−αICBOICEO=11−αICBO

Substituting the value of this in the previous equation, we get

IC=α1−αIB+ICEOIC=α1−αIB+ICEO

IC=βIB+ICEOIC=βIB+ICEO

Hence the equation for collector current is obtained.

Knee Voltage
In CE configuration, by keeping the base current IB constant, if VCE is varied, IC increases
nearly to 1v of VCE and stays constant thereafter. This value of VCE up to which collector
current IC changes with VCE is called the Knee Voltage. The transistors while operating in CE
configuration, they are operated above this knee voltage.

Characteristics of CE Configuration
• This configuration provides good current gain and voltage gain.
• Keeping VCE constant, with a small increase in VBE the base current IBincreases rapidly
than in CB configurations.
• For any value of VCE above knee voltage, IC is approximately equal to βIB.
• The input resistance Ri is the ratio of change in base emitter voltage (ΔVBE) to the
change in base current (ΔIB) at constant collector emitter voltage VCE.
Ri=ΔVBEΔIBRi=ΔVBEΔIB at constant VCE
 • As the input resistance is of very low value, a small value of VBE is enough to produce a
large current flow of base current IB.
• The output resistance Ro is the ratio of change in collector emitter voltage (ΔVCE) to the
change in collector current (ΔIC) at constant IB.
Ro=ΔVCEΔICRo=ΔVCEΔIC at constant IB
• As the output resistance of CE circuit is less than that of CB circuit.

• This configuration is usually used for bias stabilization methods and audio frequency
applications.

Common Collector (CC) Configuration

The name itself implies that the Collector terminal is taken as common terminal for both input
and output of the transistor. The common collector connection for both NPN and PNP
transistors is as shown in the following figure.

Fig 8 : Transistor Common CollectorConfiguration

Just as in CB and CE configurations, the emitter junction is forward biased and the collector
junction is reverse biased. The flow of electrons is controlled in the same manner. The input
current is the base current IB and the output current is the emitter current IE here.

Current Amplification Factor (γ)

The ratio of change in emitter current (ΔIE) to the change in base current (ΔIB) is known
as Current Amplification factor in common collector (CC) configuration. It is denoted by γ.
γ=ΔIEΔIBγ=ΔIEΔIB
 • The current gain in CC configuration is same as in CE configuration.
• The voltage gain in CC configuration is always less than 1.
Relation between γ and α
Let us try to draw some relation between γ and α
γ=ΔIEΔIBγ=ΔIEΔIB

α=ΔICΔIEα=ΔICΔIE

IE=IB+ICIE=IB+IC

ΔIE=ΔIB+ΔICΔIE=ΔIB+ΔIC

ΔIB=ΔIE−ΔICΔIB=ΔIE−ΔIC

Substituting the value of IB, we get

γ=ΔIEΔIE−ΔICγ=ΔIEΔIE−ΔIC

Dividing by ΔIE
γ=ΔIE/ΔIEΔIEΔIE−ΔICΔIEγ=ΔIE/ΔIEΔIEΔIE−ΔICΔIE

=11−α=11−α

γ=11−αγ=11−α

Expression for collector current

We know
IC=αIE+ICBOIC=αIE+ICBO

IE=IB+IC=IB+(αIE+ICBO)IE=IB+IC=IB+(αIE+ICBO)

IE(1−α)=IB+ICBOIE(1−α)=IB+ICBO

IE=IB1−α+ICBO1−αIE=IB1−α+ICBO1−α

IC≅IE=(β+1)IB+(β+1)ICBOIC≅IE=(β+1)IB+(β+1)ICBO

The above is the expression for collector current.

Characteristics of CC Configuration
• This configuration provides current gain but no voltage gain.
• In CC configuration, the input resistance is high and the output resistance is low.
 • The voltage gain provided by this circuit is less than 1.
• The sum of collector current and base current equals emitter current.
• The input and output signals are in phase.
• This configuration works as non-inverting amplifier output.
• This circuit is mostly used for impedance matching. That means, to drive a low
impedance load from a high impedance source.

Transistor Regions of Operation

The DC supply is provided for the operation of a transistor. This DC supply is given to the two
PN junctions of a transistor which influences the actions of majority carriers in these emitter
and collector junctions.
The junctions are forward biased and reverse biased based on our requirement. Forward
biased is the condition where a positive voltage is applied to the p-type and negative voltage is
applied to the n-type material. Reverse biased is the condition where a positive voltage is
applied to the n-type and negative voltage is applied to the p-type material.

Transistor Biasing
The supply of suitable external dc voltage is called as biasing. Either forward or reverse biasing
is done to the emitter and collector junctions of the transistor.
These biasing methods make the transistor circuit to work in four kinds of regions such
as Active region, Saturation region, Cutoff region and Inverse active region (seldom used).
This is understood by having a look at the following table.

Emitter Junction Collector Junction Region of Operation

Forward biased Forward biased Saturation region

Forward biased Reverse biased Active region

Reverse biased Forward biased Inverse active region

Reverse biased Reverse biased Cut off region

Among these regions, Inverse active region, which is just the inverse of active region, is not
suitable for any applications and hence not used.

Active Region
This is the region in which transistors have many applications. This is also called as linear
region. A transistor while in this region, acts better as an Amplifier.
The following circuit diagram shows a transistor working in active region.

This region lies between saturation and cutoff. The transistor operates in active region when the
emitter junction is forward biased and collector junction is reverse biased.
In the active state, collector current is β times the base current, i.e.
IC=βIBIC=βIB

Where IC = collector current, β = current amplification factor, and IB = base current.

Saturation Region
This is the region in which transistor tends to behave as a closed switch. The transistor has the
effect of its collector and emitter being shorted. The collector and emitter currents are maximum
in this mode of operation.
The following figure shows a transistor working in saturation region.
The transistor operates in saturation region when both the emitter and collector junctions are
forward biased.
In saturation mode,
β<ICIBβ<ICIB

As in the saturation region the transistor tends to behave as a closed switch,

IC=IEIC=IE

Where IC = collector current and IE = emitter current.

Cutoff Region
This is the region in which transistor tends to behave as an open switch. The transistor has the
effect of its collector and base being opened. The collector, emitter and base currents are all
zero in this mode of operation.
The figure below shows a transistor working in cutoff region.
The transistor operates in cutoff region when both the emitter and collector junctions are reverse
biased.
As in cutoff region, the collector current, emitter current and base currents are nil, we can write
as
IC=IE=IB=0

here IC = collector current, IE = emitter current, and IB = base current

CE Amplifier
The amplifier circuit that is formed using a CE configured transistor combination is called as
CE amplifier.

Construction
The common emitter amplifier circuit using NPN transistor is as shown below, the input signal
being applied at emitter base junction and the output signal being taken from collector base
junction.

Fig 9 : Common Emitter Amplifier

The emitter base junction is forward biased by VEE and collector base junction is reverse biased
by VCC. The operating point is adjusted with the help of resistors Re and Rc. Thus the values of
Ic, Ib and Icb are decided by VCC, VEE, Re and Rc.
Operation
When no input is applied, the quiescent conditions are formed and no output is present. When
positive half of the signal is being applied, the voltage between base and emitter Vbe is increased
because it is already positive with respect to ground.
As forward bias increases, the base current too increases accordingly. Since IC= βIB, the
collector current increases as well.
The following circuit diagram shows a CE amplifier with self-bias circuit.

The collector current when flows through RC, the voltage drop increases.
VC=ICRCVC=ICRC

As a consequence of this, the voltage between collector and emitter decreases. Because,
VCB=VCC−ICRCVCB=VCC−ICRC

Thus, the amplified voltage appears across RC.

Therefore, in a CE amplifier, as the positive going signal appears as a negative going signal, it
is understood that there is a phase shift of 180o between input and output.
CE amplifier has a high input impedance and lower output impedance than CB amplifier. The
voltage gain and power gain are also high in CE amplifier and hence this is mostly used in
Audio amplifiers.

Field Effect Transistors

A Field Effect Transistor (FET) is a three-terminal semiconductor device. Its operation is based
on a controlled input voltage. By appearance JFET and bipolar transistors are very similar.
However, BJT is a current controlled device and JFET is controlled by input voltage. Most
commonly two types of FETs are available.

• Junction Field Effect Transistor (JFET)

• Metal Oxide Semiconductor FET (IGFET)
Junction Field Effect Transistor
The functioning of Junction Field Effect Transistor depends upon the flow of majority carriers
(electrons or holes) only. Basically, JFETs consist of an N type or P type silicon bar containing
PN junctions at the sides. Following are some important points to remember about FET −
• Gate − By using diffusion or alloying technique, both sides of N type bar are heavily
doped to create PN junction. These doped regions are called gate (G).
• Source − It is the entry point for majority carriers through which they enter into the
semiconductor bar.
• Drain − It is the exit point for majority carriers through which they leave the
semiconductor bar.
• Channel − It is the area of N type material through which majority carriers pass from the
source to drain.
There are two types of JFETs commonly used in the field semiconductor devices: N-Channel
JFET and P-Channel JFET.

N-Channel JFET
It has a thin layer of N type material formed on P type substrate. Following figure shows the
crystal structure and schematic symbol of an N-channel JFET. Then the gate is formed on top of
the N channel with P type material. At the end of the channel and the gate, lead wires are
attached and the substrate has no connection.
When a DC voltage source is connected to the source and the drain leads of a JFET, maximum
current will flow through the channel. The same amount of current will flow from the source
and the drain terminals. The amount of channel current flow will be determined by the value of
VDD and the internal resistance of the channel.
A typical value of source-drain resistance of a JFET is quite a few hundred ohms. It is clear that
even when the gate is open full current conduction will take place in the channel. Essentially,
the amount of bias voltage applied at ID, controls the flow of current carriers passing through
the channel of a JFET. With a small change in gate voltage, JFET can be controlled anywhere
between full conduction and cutoff state.
 Fig 10 : Symbol of FET

P-Channel JFETs
It has a thin layer of P type material formed on N type substrate. The following figure shows the
crystal structure and schematic symbol of an N-channel JFET. The gate is formed on top of the
P channel with N type material. At the end of the channel and the gate, lead wires are attached.
Rest of the construction details are similar to that of N- channel JFET.
Normally for general operation, the gate terminal is made positive with respect to the source
terminal. The size of the P-N junction depletion layer depends upon fluctuations in the values of
reverse biased gate voltage. With a small change in gate voltage, JFET can be controlled
anywhere between full conduction and cutoff state.

Parameters of JFET
The main parameters of JFET are −

• AC drain resistance (Rd)

• Transconductance
• Amplification factor
AC drain resistance (Rd) − It is the ratio of change in the drain source voltage (ΔVDS) to the
change in drain current (ΔID) at constant gate-source voltage. It can be expressed as,
Rd = (ΔVDS)/(ΔID) at Constant VGS
Transconductance (gfs) − It is the ratio of change in drain current (ΔID) to the change in gate
source voltage (ΔVGS) at constant drain-source voltage. It can be expressed as,
gfs = (ΔID)/(ΔVGS) at constant VDS
Amplification Factor (u) − It is the ratio of change in drain-source voltage (ΔVDS) to the
change in gate source voltage (ΔVGS) constant drain current (ΔID). It can be expressed as,
u = (ΔVDS)/(ΔVGS) at constant ID
The gate to source p-n junction of a JFET is always reverse biased and supply voltage is given
across the drain to source terminal.

Working of Junction Field Effect Transistor:

Operation with gate to source voltage VGS= 0

If an n-channel JFET is biased as explained above and the gate to source voltage is kept zero,
due to the positive drain to source voltage few electrons which are available for conduction in the
n-type material will start flowing from the narrow passage (channel) from source to drain. This
current is called as drain current ID. As the channel has some finite resistance it will cause some
voltage drop across the channel. Hence the depletion region of the p-n junction starts increasing
and penetrates more into the n-type material as it is lightly doped. Due to this the width of the
channel available for conduction is reduced. The penetration of the depletion region into the n-
type region depends on the reverse bias voltage. Maximum drain current ID(MAX) or IDSS will flow
through the device when the channel is widest i.e. when VGS is zero.

Operation with negative gate to source voltage:

As a negative voltage is applied to the gate to source p-n junction the depletion region increases
and penetration of the depletion region into the n-type channel further increases. If the negative
gate to source voltage is further increased the depletion region spreads more and more inside the
n-type bar. Due to this less and less number of charge carries (electrons) can pass through the
channel and the drain current reduces. Hence, with increase in negative gate to source voltage
drain current reduces. At a certain value of this voltage the depletion region from both the ends
will increase and touch each other and the drain current will become zero. This gate to source
voltage at which drain current is cutoff is called as VGS(OFF). Since the VGS controls ID. Hence,
JFET is a voltage controlled device. The relationship between ID and VGS is given by Shockley’s
equation

OR

Where, VP is the pinch off voltage which is the value of drain to source VDS at which drain
current reaches its constant saturation value. Any further increase in VDS does not affect ID.
Characteristics of JFET:
The characteristics curve of an N channel JFET transistor shown below is the graph of
the drain current, ID versus the gate-source voltage, VGS.

This curve represents the transconductance, or simply the gain, of the transistor i.e. how much
current the transistor outputs based on the voltage input into the gate terminal.

It is observed from the curve that as the negative voltage to the gate increases, the gain
decreases.
The Regions that make up a transconductance curve are the following:
Cutoff Region: This is the region where the JFET transistor is off, meaning no drain current,
ID flows from drain to source.
Ohmic Region: This is the region where the JFET transistor begins to show some resistance to
the drain current, ID that is beginning to flow from drain to source. This is the only region in
the curve where the response is linear.
Saturation Region- This is the region where the JFET transistor is fully operation and
maximum current, for the voltage, VGS, that is supplied is flowing. During this region, the
JFET is ON and active.
Breakdown Region- This is the region where the voltage, VDD that is supplied to the drain of the
transistor exceeds the necessary maximum. At this point, the JFET loses its ability to resist
current because too much voltage is applied across its drain-source terminals. The transistor
breaks down and current flows from drain to source.
Pinch off voltage: The drain to source voltage VDS at which drain current reaches its constant
saturation value is called Pinch off voltage VP.

Transfer Characteristic:

The transfer characteristic for a JFET can be obtained by keeping drain- source
voltage, VDS constant and determining drain current, ID for various values of gate-source
voltage, VGS.

The curve plotted between gate-source voltage, VGS and drain current, ID, is shown in figure
From the curve it is observed that:

(i) Drain current decreases with the increase in negative gate-source bias
(ii) Drain current, ID = IDSS when VGS = 0
(iii) Drain current, ID = 0 when VGS = VD