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Lecture 5

The document provides an overview of the 8086 microprocessor architecture, including its execution unit and flag register functionalities. It details various addressing modes used in programming the 8086, such as register, immediate, direct, and indirect addressing. Additionally, it categorizes the internal registers and explains their roles in memory operations.

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shreybansal1165
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3 views

Lecture 5

The document provides an overview of the 8086 microprocessor architecture, including its execution unit and flag register functionalities. It details various addressing modes used in programming the 8086, such as register, immediate, direct, and indirect addressing. Additionally, it categorizes the internal registers and explains their roles in memory operations.

Uploaded by

shreybansal1165
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Microprocessors programming

and Interfacing
CS/EEE/ECE/INSTR F241
Prof.Meetha V Shenoy/Prof. Vinay Chamola

BITS Pilani
Pilani Campus

BITS Pilani, Pilani Campus


Block Diagram of 8086

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8086 Microprocessor
Architecture Execution Unit (EU)
Auxiliary Carry Flag
Carry Flag
Flag Register This is set, if there is a carry from the
This flag is set, when there is
lowest nibble, i.e, bit three during
addition, or borrow for the lowest a carry out of MSB in case of
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.

Sign Flag Zero Flag Parity Flag

This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

OF DF IF TF SF ZF AF PF CF

Trap Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction
Direction Flag Interrupt Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto incrementing mode. 3
P1: 44+52

2CH , 34H

1 1 1 1
0 0 1 0 1 1 0 0 Auxiliary Carry – 1
0 0 1 1 0 1 0 0
0 1 1 0 0 0 0 0 No Carry
Result Not Zero
Positive Number
No overflow
Parity - Even
8086 registers
categorized
into 4 groups

7
8086 Internal registers

AX, BX, CX and DX are two


bytes wide and each byte can
be accessed separately

These registers are used as


memory pointers.

Flags

Segment registers are used


as base address for a segment
in the 1 M byte of memory
Buses
MOV instruction

Addressing modes in the 8086 microprocessor define how


the microprocessor accesses data stored in memory or in
registers.

They determine the location of operands (data) to be used in


an instruction.

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Addressing Modes

• Register Addressing

• Both operands (source and destination) are registers.

eg: MOV AX, BX

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Addressing Modes
• Immediate Addressing

• The operand is specified directly in the instruction as a constant


value.

eg: MOV AX, 1420H

MOV AL,’A’

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Addressing Modes
• Direct Addressing

• The address of the operand is given in the instruction.

eg: MOV AX, [2340H ]


MOV CS, [2340H ]
MOV CH,DS:[1000H]

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Addressing Modes

• Register Indirect Addressing

• The address of the operand is contained in a register.

eg: MOV AX, [BX]


MOV [AX], BX

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Default segment-offset combinations

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Addressing Modes
• Base Plus Index Addressing

eg: MOV AX, [BX+SI]


MOV CX,[BX+DI]
MOV CH,[BP+SI]
MOV [BP+DI],AH

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Addressing Modes

• Register relative addressing

eg: MOV AX,[DI+100H]


MOV DI,[AX+10H]

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Addressing Modes

• Base relative plus indexed addressing

eg: MOV AX,[BX+SI+100H]

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