Encoder Interface v4.

2 User Guide

Introduction (Ask a Question)

Incremental encoder is the most common sensor used for Field Oriented Control (FOC) of Permanent Magnet Brush
Less DC (BLDC) or Permanent-Magnet Synchronous Motor (PMSM). This sensor gives relative angular position as
the output in the form of pulses. A quadrature encoder, typically produces two outputs, which have pulses phase
shifted by 90°, as shown in Figure 1. The phase shift between the two signals A and B represents the direction of
rotation. The encoder interface logic uses edge detection on rising edge and falling edge of A and B, as shown in
Figure 2. This gives a resolution that is four times the encoder resolution and produces a very high resolution from a
low cost encoder.
The following figure shows the encoder signals in clockwise and counter-clockwise directions.
Figure 1. Encoder Signals in Clockwise and Counter-Clockwise Directions

Clockwise

Counter-Clockwise

The following figure shows the edge detection of encoder pulses for higher resolution.
Figure 2. Edge Detection of Encoder Pulses for Higher Resolution

Edge
Detect

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After the edge detection, counters are used to get a rotor angular position in terms of an electrical angle so that, it
can be directly used for FOC. The Angle_count_max value represents the total number of edges that will be detected
in one mechanical rotation of the rotor. The angle output ranges from 0 to 262143, where 262143 represents 360°.
The variation of angle output with respect to the edges is shown in Figure 3 for positive speed and Figure 4 for
negative speed. The speed output is calculated based on the rate of change of angular position.
Three parameters are used to configure the encoder interface:

The following figure shows the Theta output for the positive direction.
Figure 3. Theta Output for Positive Direction
A

B angle_count_max_i * angle_factor_i / 256

The following figure shows the Theta output for the negative direction.

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Figure 4. Theta Output for Negative Direction

angle_count_max_i * angle_factor_i / 256

Summary (Ask a Question)

The following table provides a summary of the Encoder Interface IP characteristics.
Core Version This document applies to Encoder Interface v4.2.
Supported Device • PolarFire® SoC
Families • PolarFire
• RTG4™
• IGLOO® 2
• SmartFusion® 2
Supported Tool Requires Libero® SoC v11.8 or later releases.
Flow
Licensing Complete encrypted RTL code is provided for the core, enabling the core to be instantiated
with SmartDesign. Simulation, Synthesis, and Layout can be performed with Libero software.
Encoder Interface is licensed with encrypted RTL that must be purchased separately. For more
information, see Encoder Interface.

Features (Ask a Question)

Encoder Interface has the following key features:

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 • Computes the relative angular position
• Computes the filtered speed output

Implementation of IP Core in Libero Design Suite (Ask a Question)

IP core must be installed to the IP Catalog of the Libero® SoC software. This is done automatically through the IP
Catalog update function in the Libero SoC software, or the IP core can be manually downloaded from the catalog.
Once the IP core is installed in the Libero SoC software IP Catalog, the core can be configured, generated, and
instantiated within the SmartDesign tool for inclusion in the Libero project list.

Device Utilization and Performance (Ask a Question)

The following table lists the device utilization used for Encoder Interface.
Table 1. Encoder Interface Utilization

Device Details Resources Performance RAMs Math Blocks Chip Globals

Family Device LUTs DFF (MHz) LSRAM μSRAM
PolarFire® SoC MPFS250T 398 285 200 0 0 2 0
PolarFire MPF300T 387 285 200 0 0 2 0
SmartFusion® 2 M2S150 400 285 140 0 0 2 0

Important:
1. The data in this table is captured using typical synthesis and layout settings. CDR reference clock
source was set to Dedicated with other configurator values unchanged.
2. Clock is constrained to 200 MHz while running the timing analysis to achieve the performance
numbers.

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Table of Contents
Introduction.....................................................................................................................................................1
Summary.................................................................................................................................................3
Features.................................................................................................................................................. 3
Implementation of IP Core in Libero Design Suite.................................................................................. 4
Device Utilization and Performance........................................................................................................ 4

1. Functional Description.............................................................................................................................6

2. Encoder Interface Parameters and Interface Signals............................................................................. 7

2.1. Inputs and Outputs Signals.......................................................................................................... 7

3. Timing Diagrams..................................................................................................................................... 8

4. Testbench................................................................................................................................................9
4.1. Simulation.....................................................................................................................................9

5. Revision History.....................................................................................................................................11

Microchip FPGA Support..............................................................................................................................12

Microchip Information................................................................................................................................... 12
The Microchip Website..........................................................................................................................12
Product Change Notification Service.................................................................................................... 12
Customer Support................................................................................................................................. 12
Microchip Devices Code Protection Feature.........................................................................................12
Legal Notice.......................................................................................................................................... 13
Trademarks........................................................................................................................................... 13
Quality Management System................................................................................................................ 14
Worldwide Sales and Service................................................................................................................15

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 Functional Description

1. Functional Description (Ask a Question)

The following figure shows the block diagram of encoder interface.
Figure 1-1. System-Level Block Diagram of Encoder Interface

reset_i

sys_clk_i

fil_trig_i

direction_config_i

clear_buffer_i
dir_o
sensor_reset_i
omega_out_o
qa_i encoder_interface
angle_out_o
qb_i
line_count_o
speed_factor_i

angle_factor_i

angle_count_max_i

speed_window_i

filter_factor_i

The encoder interface block converts signals received from QA, QB into its corresponding angle and speed. The
block counts encoder edges till the angle_count_max_i value is attained and then starts counting from zero again.
The angle generated is scaled to 262144 by multiplying it with the angle_factor_i. Speed is measured by counting
the number of encoder events in a constant time period defined by speed_window_i input. A filter is used to filter the
quantization noise from speed measurement. The filter time constant can be configured using the filter_factor_i value
using the following equation:

The sensor_reset_i input is used to find motor electrical angle by injecting constant current for a small duration.
When the motor has aligned to the injected angle, the encoder output is initialized with 90° or 270° based on initial
direction of rotation. The encoder edge counting is expected to start after the falling edge of the sensor_reset_i input
is detected.
The clear_buffer_i input can be used to reset the filter buffer, as the filter buffer is expected to be reset when the
motor stops.
The direction_config_i input is used to initially detect the motor direction. Once the motor starts running, the motor
direction is detected from the encoder signals and used in generating the angle.

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 Encoder Interface Parameters and Interface Signals

2. Encoder Interface Parameters and Interface Signals (Ask a Question)

This section discusses the parameters in the Encoder Interface GUI configurator and I/O signals.

2.1 Inputs and Outputs Signals (Ask a Question)

The following table lists the input and output ports of Encoder Interface.

Signal Name Direction Description

reset_i Input Active Low Asynchronous Reset Signal
sys_clk_i Input System Clock
fil_trig_i Input Filter trigger input. A timing pulse of one clock cycle width must be provided at this
input. The periodicity of the pulse determines the sampling time.
direction_config_i Input Direction configuration bit - used at calibration time to align the rotor. When 1,
aligns rotor for counter clockwise starting or when 0, aligns rotor for clockwise
starting.
clear_buffer_i Input Clears the filter buffer generally when the motor is stopped.
A pulse of one clock cycle width must be input each time the motor stops.

sensor_reset_i Input Sensor Reset signal:

When set to 1, rotor angle is reset to the equivalent of 90° or 270° as determined
by the direction_config_i input.
When set to 0 (zero), normal operation.

qa_i Input Encoder input A

qb_i Input Encoder input B
speed_factor_i Input Speed output scaling multiplier
angle_factor_i Input Angle output scaling multiplier
angle_count_max_i Input Maximum angle count value in terms of encoder pulse events.
speed_window_i Input The time window for speed computation, specified in multiples of 10 µs. Larger
time window gives better speed resolution but has higher latency. Smaller time
window must be used for high dynamic speed response.
filter_factor_i Input Filter factor value for filter – if value is n, the filter time constant is 2^n times the
sampling time of the filter defined by filt_trig_i.
dir_o Output Direction signal generated based on encoder input signals.
speed_done_o Output Indicates speed computation is ready for filtering (at the end of speed window). A
pulse of one sys_clk_i cycle width is generated.
speed_filter_done_o Output Indicates speed output after filtering is valid (at omega_out_o output port). A pulse
of one sys_clk_i cycle width is generated.
omega_out_o Output Rotor speed output after filtering - suitable for use as speed feedback in speed
control operation.
angle_out_o Output Electrical angle output suitable for FOC.
line_count_o Output Specifies the rotor position in terms of number of encoder lines (increments) since
the last sensor reset. Suitable for use with position control operations.

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 Timing Diagrams

3. Timing Diagrams (Ask a Question)

This section discusses encoder interface timing diagram.
The following figure shows the timing diagram of encoder interface.
Figure 3-1. Encoder Interface Timing Diagram
CLOCK

qa_i

qb_i

angle_out_o 0 1 2 3 65

omega_out_o 0 45 300

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 Testbench

4. Testbench (Ask a Question)

A unified testbench is used to verify and test Encoder Interface called as user testbench. Testbench is provided to
check the functionality of the Encoder Interface IP.

4.1 Simulation (Ask a Question)

The following steps describe how to simulate the core using the testbench:
1. Open Libero SoC, click Catalog tab, and then click Solutions-MotorControl.
2. Double-click Encoder Interface and then click OK. The documentation associated with the IP are listed under
Documentation.

Important: If you do not see the Catalog tab, click View, open Windows menu, and then click
Catalog to make it visible.

Figure 4-1. Encoder Interface IP Core in Libero SoC Catalog

3. On the Stimulus Hierarchy tab, click the testbench (encoder_interface_tb.v), point to Simulate Pre-
Synth Design, and then click Open Interactively.

Important: If you do not see the Stimulus Hierarchy tab, click View, open Windows menu, and
then click Stimulus Hierarchy to make it visible.

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 Testbench

Figure 4-2. Simulating Pre-Synthesis Design

ModelSim opens with the testbench file as shown in the following figure.
Figure 4-3. ModelSim Simulation Window

Important: If the simulation is interrupted due to the runtime limit specified in the .do file, use the run
-all command to complete the simulation.

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 Revision History

5. Revision History (Ask a Question)

The revision history describes the changes that were implemented in the document. The changes are listed by
revision, starting with the most current publication.
Table 5-1. Revision History

Revision Date Description

A 03/2023 The following are the list of changes in revision A of the document:
• Migrated the document to the Microchip template.
• Updated the document number to DS00004913A from 50200659.
• Added 3. Timing Diagrams.
• Added 4. Testbench.

3.0 — The following is a summary of changes made in this revision:

• Added the IP version to the document title.
• Added speed_done_o and speed_filter_done_o output signals.
• Removed Configuration Parameter section from Hardware Implementation.

2.0 — Updated the document with the new output signals.

1.0 — Revision 1.0 was the first publication of this document.

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