Chapter -3

Instuction Set of 8086

(16 MARKS)

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 Instuction Set of 8086

3.1 Language Instruction format,

3,2 addressing modes
3.3 Instruction set, Groups of Instructions
Arithmetic Instructions, Logical Instructions, Data transfer instructions, Bit
manipulation instructions,String Operation Instructions, Program control
transfer or branching Instructions, Process control Instructions

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 Instruction set of 8086
 Machine Language Instruction Format:

 There are one or more fields in machine language instruction format.

 The first field is called operation code (or opcode) field. It indicates the

operation to be performed by microprocessor.

 There are other fields known as operand fields.

 The microprocessor performs different operations on these fields. The length of

an instruction is determined by opcode & operand fields.

 The length an instruction may vary from one byte to six bytes. There are six

general formats of instructions in 8086 instruction set.

 These are described below.

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 Instruction set of 8086
1. One Byte Instruction
2. Register to register
3. Register to/from memory with no displacement
4. Register to/from memory with displacement
5. Immediate operand to register
6. Immedite operand to memory with 16-bit displacement

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 Machine Language Instruction Format:
1. One byte instruction:
 This format is one byte long.

 It may have the implied data or register operands.

 Three least significant bits (LSB) of opcode are used to specify the register
operand if any, otherwise, all 8 bits form an opcode and operands are implied.

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 Machine Language Instruction Format:
2. Register to Register:
This format is two byte long. The first byte of instruction gives the opcode and

size of operand (16 bit/8 bit) with help of w bit. The second byte of instruction
gives the register operands and R/M fields.
D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
D7
Opcode w 1 1 REG R/M

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 Addressing modes of 8086

1.Immediate addressing mode

2. Direct addressing mode
3. Register addressing mode
4. Register indirect addressing mode
5. Indexed addressing mode
6. Register relative addressing mode
7. Base indexed addressing mode
8.Relative base indexed addressing mode
9. Implicit or implied addressing mode

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 Addressing modes of 8086

1. Immediate addressing mode

 In this type of addressing mode, data is available in the instruction itself
 So immediate data may 8 bit (byte)or 16 bit(word) in length
 e.g.
 MOV AL, 46H - AL loaded with 8-bit immediate data 46H
 MOV BX, 1234H -BX loaded with 16-bit immediate data 1234H
2. Direct addressing mode-

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 Direct addressing mode
 In this addressing mode a 16 bit offset(memory address) address is directly
specified in the instruction
 The offset of displacement may be either 8 bit or 16-bit which follows the
instruction op-code
 e.g.
 MOV AX, [5000H] -AX will be loaded with content of memory
loction whose offset is 5000H from base address
 AND AX,[8000H] -

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 Register addressing mode
1) In this mode, data is stored in registers and it is referred using registers
2) Registers may be source operands, destination operands, or both
3) Register may be 8-bit or 16 bit
4) e.g.
 MOV AX, BX – copies the contents of BX register to AX register

 ADD AL, BL-ANDing the content of BL with AL,store result in AL

 ROR AL,CL-Rotate the contents of AL CL times

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 Register Indirect Addressing mode
 In this mode, the operand is specified indirectly using some register.

 The contents of register point to some memory location in Data Segment or

Extra Segment.

 The registers used to specify memory location are BX, SI, DI, BP e.g.
 MOV AX, [BX]

 In the above instruction, the contents of register BX will be used as offset in

data segment. From that offset two bytes will be transferred to AX.
 INC BYTE PTR [SI]

 In the above instruction, the contents of memory location pointed by SI in data

segment will be incremented by 1.

 Suppose SI = 1000H

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 Register Indirect Addressing mode

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 Indexed Addressing mode
 In this mode offset of operand is stored in either SI or DI register.

 This is a form of register indirect addressing mode

 e.g.

 MOV AL, [SI] -copies the byte from memory location whose offset is in index

register SI to AL

 MOV AX,[DI+8] - copies the word from memory location whose offset will be

calculated by adding 8with the content of DI register

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 Register Relative Addressing mode
 In this addressing mode, effective address of data is formed by adding 8 bit

or 16 bit displacementwith the contents of BX, BP, SI, or DI registers

 e.g.

1. MOV AX, 50H [BX]-Copies the word from memory location whose offset
will be calculated by adding the 50 with the content of BX register

2. ADD AX,5000[BP]- Copies the word from memory location whose offset will
be calculated by adding the 5000H to the content of BP register

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 Based Indexed Addressing mode
 In this addressing mode, the effective address of data is formed by adding

contents of base register(BX or BP) to the contents of an index register (SI,

DI)

 e.g.
1. MOV AX, [BX] [SI]-Copies the word from memory location whose offset
will be calculated by adding the content of BX with the content of SI
register
2. ADD AL,[BX][DI]-Copies the byte from memory location whose offset will
be calculated by adding the content of BX with the content of DI register

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 Relative Based Indexed Addressing mode
 In effective address of data, in this mode, is formed by adding an 8 bit / 16 bit

displacement to the sum of contents of any one base register(BX or BP) and any
one index register (SI or DI)

 e.g.

1. MOV AX, 1000H [BX] [SI]- copies the word from memory location whose
offset will be calculated by adding the1000H with the content of BX and SI
registeri.e.[1000+BX+SI]

2. MOV AX,60[BX][SI]-

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 Implicit or Implied Addressing mode
 Instruction using this mode have no operands

 In this instruction itself will specify the data to be operated by the instruction

 e.g.

1. CLC-This clears carry flag to zero

2. DAA- Perform operation on AL Register

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 Addressing mode
 Identify the addressing mode of following instructions.
 (i) INC [4712H]
 (ii) ADD AX, 4712H
 (iii) DIV BL
 (iv) MOV AX, [BX + SI]
v) MUL AL, BL
(vi) MOV AX, 2100 H
(vii) MOV AL, DS : [SI]
(vii) MOV AX, BX

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 Instruction set of 8086
 The instructions of 8086 microprocessor are categorized into following
main types:
1. Data transfer/copy Instructions
2. Arithmetic and logical Instructions
3. Branch instructions
4. Loop Instructions
5. Machine control Instructions
6. Flag Manipulation Instructions
7. Shift and Rotate Instuctions
8. String Instructions

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 Instruction set of 8086
 The instructions of 8086 microprocessor are categorized into following
main types:
1) Data copy/transfer instructions:
 These instructions are used to transfer data from source to destination. All

move, load, store, input and output instructions belong to this category.
2) Arithmetic and logical instructions:
 Instructions of this type are used to perform arithmetic, logical, increment,

decrement, compare etc. operations.

3) Branch instructions:
These instructions transfer execution control to specified address. Cal, jump,
return and interrupt instructions belong to this category.

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 Instruction set of 8086
 The instructions of 8086 microprocessor are categorized into following
main types:
4) Loop instructions:
 These instructions are used to implement conditional or unconditional loops.

The loop count is stored in CX register e.g. LOOP, LOOPZ, LOOPNZ

instructions.

5) Control instructions:

 These instructions are used to control 8086 microprocessor itself e.g. NOP,

HLT, WAIT and LOCK instructions.

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 Instruction set of 8086
 The instructions of 8086 microprocessor are categorized into following
main types:
6) Flag manipulation instructions:
 These instructions are used to set or reset flags of 8086 e.g. STC, CLC, CMC,

STI, CLI, CLD, STD instructions.

7) Shift and Rotate instructions:
 These instructions are used to shift or rotate the bits of operand in either right
or left direction.
 CL register can be used to store the count of shift/rotate operation.
8) String instructions:
 These instructions are used to perform string manipulation operations such as

load, move, store, scan, compare etc.

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 Instruction set of 8086
 Data transfer / copy instructions:
 MOV-Move
 PUSH
 POP
 XCHG
 IN
 OUT
 XLAT
 LEA
 LDS/LES
 LAHF
 SAHF
 PUSHF
 POPF
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 Instruction set of 8086
 Data transfer / copy instructions:
 MOV: Move
 General form:
MOV destination, source
 This instruction copies a word or byte from source to destination.
 The destination can be a register or memory location.
 The source can be a register, a memory location or an immediate data.
 Both, source and destination can not be memory locations.
 If source is immediate data, destination can not be a segment register.
 Size of source and destination must be same.
 No flags are affected after execution of MOV instruction

 Operation: Destinaton<-source

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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:
 MOV CX, 1234H ;Immediate addressing mode,Where 1234h is
immediate data copied to CX register
 MOV AL, [5000H] –Direct Addressing mode,where the data from
memory location 5000H is copied to AL register
 MOV AX,BX -Register addressing mode,where the content of BX
register copied to AX register
 MOV AH,50H[BX]-Base Register relative Addressing mode,where
the displacement 50H is added to BX register to get effective address
from which data is copied to AH register
 MOV AL,[SI]-Indirect Addressing mode, where the data from
memory location addressed by SI Register

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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:

 MOV AL,[SI]-Indirect Addressing mode, where the data from

memory location addressed by SI Register
 MOV AL,[BX][SI]-Base Indexed addressing mode,where the
effective address is calculated by the adding content Of BX and SI
Register and data is copied to AL register
 MOV AL,50H[BX][DI]-Relative Base Indexed addressing mode,
where the effective address is calculated by the adding the
displacement 50H to the sum of the content of BX and DI Register
and data is copied to AL register

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 Instruction set of 8086
 Data transfer / copy instructions:
 PUSH-: Push to stack
➢ General form: PUSH source
➢ This instruction stores the contents of source on to the stack.
➢ The source can be a general purpose register, segment register or memory.

➢ When this instruction is executed, the stack pointer, which points to the top of
stack, is decremented by 2 and contents of source are copied on to the stack.
The higher byte of source is stored at higher address and lower byte is stored at
lower address.
➢ No flags are affected by this instruction
Operation-
SP=SP-2
SS:[SP]<-MSB OF SOURCE
SS:[SP-1]<-LSB OF SOURCE
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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:
 PUSH AX ; Let AX = 1122H, SS = 2000H, SP = FFFFH

 PUSH DS-Decrement SP by 2,copy DS to stack

 PUSH [2000H]-Decrement SP by 2 ,copy word from memory
location to stack
 PUSH AL ; Not allowed since AL is 8 bit register, ALWAYS a
WORD can be pushed on stack.

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 Instruction set of 8086
 Data transfer / copy instructions:
 POP: Pop from stack

➢ General form: POP destination

➢ This instruction copies a word from stack segment pointed by
SP to destination.

➢ The destination can be a general purpose register, a segment

register or a memory location. After copying, SP is automatically
incremented by 2.
➢ No flags are affected by POP instruction
➢ Operation-
SP=SP+2
LSB OF DESTINATION<-SS:[SP]
MSB OF DESTINATION<-SS:[SP+1]
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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:
 POP AX ; Let SS = 2000H and SP = FFFDH

 POP DS-Copy word from top of the stack to DS register,SP=SP+2

 POP CS ; This is not allowed

 POP [5000H]-Copy a word from top of stack to memory location 8000H and
80001H
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 Instruction set of 8086
 Data transfer / copy instructions:
1) XCHG: Exchange
➢ General form: XCHG destination, source
➢ This instruction exchanges contents of source and destination.
➢ Source and destination both cannot be memory locations.
➢ Source and destination must be of same size (i.e. both must be
bytes or both must be words).
➢ Segment register cannot be used with this instruction.
➢ No flags are affected by this instruction.
➢ Operation:
➢ Destination<->source

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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:
 XCHG AX, DX –Exchange the word in AX with word in BX
 XCHG BL, CH – Exchange the byte in AX with word in BX
 XCHG AX ,[5000H]- Exchange the word in AX with memory i.e AH
with the content of 5000H memory location and AL with the content of
7001H memory location

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 Instruction set of 8086
 Data transfer / copy instructions:
• IN: Copy data from a port
➢ General form: IN Accumulator (AX or AL),Port
➢ This instruction copies data from a port to AL or AX register.
➢ If an 8 bit port is read, the data will go into AL.
➢ If a 16 bit port is read, the data will go to AX.
➢ The port can be a fixed port (having 8 bit port address) or a variable port
(having 16 bit port address). For variable type port, the port address is
loaded in DX register.
➢ No flags are affected.

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 Instruction set of 8086
 Data transfer / copy instructions:
 Examples:
➢ Fixed port (8 bit port address)
 IN AL, 80H –Input a byte from port whose port address is 80H
 IN AX, 45H-Input a word from port whose port address is 45H
➢ Examples: Variable port (16 bit port address)
1) MOV DX, 8000H ; move port address into DX

IN AL, DX -Input a byte from 8-bit port whose address is in DX to AL

2) MOV DX, 8080H ; move port address into DX

IN AX, DX- Input a word from 16-bit port whose address is in DX to AL

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 Instruction set of 8086
 Data transfer / copy instructions:
1) OUT::Output a byte or word to a port
➢ General form: OUT Port, Accumulator (AX or AL)
➢ This instruction copies a byte from Al to a port or a word from AX to a
port.
➢ The port can be a fixed port (having 8 bit port address) or a variable port
(having 16 bit port address in DX register).
➢ For fixed port, the 8 bit address is directly given in the instruction
➢ For variable port, the port address is first loaded in DX register.
➢ No flags are affected.

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 Instruction set of 8086
 Data transfer / copy instructions: :
 Examples-
 For fixed port, the 8 bit address is directly given in the instruction
OUT 81H, AL -copy the content of AL to port 81H
OUT 46H, AX -copy the content of AL to port 46H
 For variable port, the port address is first loaded in DX register.
 Examples:
MOV DX,6000H -Initialise DX with 16-bit port address
OUT DX, AL -copy the content of AL to port
MOV DX,8181H
OUT DX,AX -copy the content of AX to port 81H

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 Data transfer / copy instructions
 XLAT: Translate a byte in AL
➢ General form:XLAT
➢ This instruction is used to translate a byte from one code to another code.
➢ It replaces a byte in AL register with a byte pointed by BX in a lookup table
in memory.
➢ Before using this instruction lookup table must be present in memory.
Starting address of table is loaded in BX register. The byte to be translated
is loaded in AL.
 AL <- DS : [ BX + AL ]
➢ The value in AL is added to BX. This new value will be used as pointer in
data segment.
➢ From the location, pointed by [BX+AL], data will be transferred to AL.
➢ No flags are affected by this instruction.
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 Data transfer / copy instructions
 Following example shows how to find ASCII value of a decimal digit (0 – 9)
present in AL.
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
ASCII_CODES DB 30H,31H,32H,33H,34H,35H,36H,37H,38H,39H
DIGIT DB 05 ; Find ASCII code of 5
RES DB ? ; To store the result i.e. ASCII code
DATA ENDS
CODE SEGMENT
MAIN:
MOV AX, DATA ; Initialize data segment MOV DS, AX
MOV BX, OFFSET ASCII_CODES ; Find offset of table MOV AL, DIGIT ; Move code to AL
XLAT ; Find new code
MOV RES, AL ; Store result
MOV AH, 4CH ; Terminate the program INT 21H
CODE ENDS
END MAIN

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 Data transfer / copy instructions
 LEA: Load Effective Address
General form: LEA Register, source
 This instruction loads the effective address of destination operand into
the source register.
 No flags are affected.
 Example:
 LEA BX, NUM1-Load BX with the offset of variable NUM1


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 Data transfer / copy instructions
 LDS/LES-
1) LDS: Load Register and DS with words from memory
2) LES: Load Register and ES with words from memory
➢ General form: LDS Register, Memory address of first word
➢ This instruction copies a word from memory into register specified. It then
copies a word from next two consecutive memory locations into DS/ES.
➢ No flags are affected.
➢ Example:
 LDS BX,1234H-copy the contents of memory location 1234H in BL,contents of
1235H to BH and the contents of 1236H and 1237H in DS register
 LES BX,[1234H]-copy the contents of memory location 1234H in BL,contents of
1235H to BH and the contents of 1236H and 1237H in ES register

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 Data transfer / copy instructions
 LAHF-
 LAHF: Load AH from lower byte of flag
➢ General form: LAHF
➢ This instruction copies lower byte of flag register to AH register.
➢ No flags are affected.
➢ Example: LAHF

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 Data transfer / copy instructions
 SAHF: Store AH register to lower byte of flag register
➢ General form: SAHF
➢ This instruction copies contents of AH register to lower byte of flag register.
➢ Depending upon the bits of AH register, the flags in the lower byte of flag
register will be set or reset.
➢ Example: SAHF

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 Data transfer / copy instructions
 PUSHF: Push flags to stack
➢ General form: PUSHF
➢ This instruction pushes the flag register contents on to the stack. Higher byte
of flag is stored first and then lower byte of the flag is stored.
➢ The SP is decremented by 2.
➢ No flags are affected.
➢ Example: PUSHF

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 Data transfer / copy instructions
 POPF: Pop flags from stack
➢ General form: POPF
➢ This instruction loads the flag register from stack.
➢ SP is incremented by 2.
➢ All flags will be affected by this instruction.
➢ Example:
 POPF

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 Arithmetic instructions
 ADD: Add
 ADC: Addition with carry
 SUB:Subtract
 SBB:Subtract with borrow
 INC:Incement
 DEC:Decrement
 CMP:compare
 DAA:Decimal Adjust Accumulator
 DAS:Decimal adjust after subtraction
 NEG:Compliment of destination
 MUL:
 IMUL:
 DIV: -AAA(ASCII Adjust after addition)
 IDIV: -AAS(ASCII Adjust after subtraction)
 CBW: convert byte to word -AAM(ASCII adjust after Multiplication)

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 CWD: convert word to double word -AAD(ASCII Adjust before division)
 Arithmetic instructions:
 ADD: Add
General form: ADD destination, source
 This instruction adds a number from source to destination. The result is available
in destination.
 The source may be an immediate number, a register or a memory location.
 The destination may be a register or a memory location.
 Both source and destination cannot be memory locations.
 The size of source and destination must be same i.e. both must be bytes or both
must be words.
 Segment registers cannot be used.
 Flags affected: All condition flags (AF, CF, OF, PF, SF, ZF).
 Examples:
ADD AL,67H
 ADD DX,BX
 ADD AX,[SI]
 ADD BX,[5000H]
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 Arithmetic instructions:
 ADC: Add with Carry
 General form: ADC destination, source
 The operation of this instruction is same as ADD instruction except it
adds carry flag bit to the result.
 If CF=1 (set), 1 is added to the addition result.
 If CF=0 (reset), 0 is added to the addition result.
 All condition flags are affected by this instruction
 Example-
ADC AX,BX
ADC AH,67H
ADC BX,[SI]
ADC CX,[5000H]

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 Arithmetic instructions:
 SUB: Subtract
 SBB: Subtract with Borrow
➢ General form: SUB destination, source
SBB destination, source
➢ These instructions subtract a number in source from number in
destination.
➢ The source may be an immediate number, a register or a memory
location.
➢ The destination can be a register or a memory location.
➢ Both source and destination can not be memory locations.
➢ The size of source and destination must be same i.e. both must be
bytes or both must be words.

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 Arithmetic instructions:
➢ In case of SBB, borrow flag (i.e. Carry flag) and source will be
subtracted from destination and result is placed in destination.
➢ In case of SUB, only source will be subtracted from destination and
result is placed in destination.
 destination = destination - source
➢ All condition flags are affected by these instructions(AF, CF, OF, PF, SF,
ZF)
➢ Examples:
 SUB AX, BX
 SUB AH, 67H

 SUB BX, [SI]

 SUB CX, [5000H]

 SBB AX,1234H
 SBB AX,BX
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 Arithmetic instructions:
 INC: Increment
➢ General form: INC destination
➢ This instruction increments the destination by 1.
➢ The destination may be a register or a memory location.
➢ Immediate operand is not allowed.
➢ Flags affected: AF, OF, PF, SF and ZF.
➢ Carry flag is not affected by this instruction.
➢Operation:- Destination=Destination+1
 INC AX -Increment the contents of AX by 1
 INC CX
 INC BYTE PTR [BX]

 INC WORD PTR [BX]

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 Arithmetic instructions:
1) DEC: Decrement
➢ General form: DEC destination
➢ This instruction subtracts 1 from destination.
➢ The destination may be a register or a memory location.
➢ Immediate operand cannot be used.
➢ Flags affected: AF, OF, PF, SF and ZF.
➢ Carry flag is not affected by this instruction.
➢ Operation:- Destination=Destination-1
 Examples:
 DEC CL -decrement the contents of CL by 1
 DEC [2000] –decrement the content of memory location 2000H by 1
 DEC BYTE PTR [SI]

 DEC WORD PTR [BX]

 DEC COUNT ; COUNT is a variable

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 Arithmetic instructions:
 CMP: Compare
General form: CMP destination, source
 This instruction compares destination and source.
 Both can be byte operands or both can be word operands.
 The source can be an immediate number, a register or a memory locatin.
 The destination can be a register or a memory location.
 Both operands cannot be memory operands.
 Comparison is done by subtracting the source from destination (destination – source).
Source and destination remain unchanged.
 All condition flags are affected to indicate the result of operation (AF, CF, OF, PF, SF, ZF)
 For example,
CMP CX ,BX
i) If CX = BX(if Destination=source) CF = 0, ZF = 1, SF = 0
ii) If CX > BX (if Destination>source) CF = 0, ZF = 0, SF = 0
iii) If CX < BX (if Destination<source) CF = 1, ZF = 0, SF = 1
CMP AL, 01H
CMP BH, CL
CMP DX, NUM1
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 Arithmetic instructions:
 DAA: Decimal Adjust Accumulator
General form: DAA
 This instruction is used to convert the result of addition of two packed BCD numbers to a
valid BCD numbers.
 The result has to be only in AL.
 DAA only works on AL register,so DAA instruction must be used after the ADD/ADC
instruction
 The ADD/ADC instruction adds the two BCD number in hexadecimal format and DAA
instruction convert this hexadecimal result to BCD result
 Operation-
1. If lower nibble of AL>9 OR AF=1,
Then AL=AL+06
2. If higher nibble of AL>9 OR CF=1,
Then AL=AL+60
3. If both above conditions are satisfied then
AL=AL+66
 Flags affected: SF, ZF, AF, PF, CF

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 Arithmetic instructions:
 Following examples explains this instruction.
i)Let AL = 99BCD, BL = 99BCD
ADD AL, BL ; 1001 1001 =AL
DAA 1001 1001 =BL

 0011 0010=AL=32H and CF=1 AF=1

 Now in above e.g after addition ,carry flag &auxiliary carry flag are set
 So DAA instruction adds 6 to higher as well as lower nibble of AL register to get correct BCD
result i.e.198BCD of which 98 in AL and CF=1
 After execution of DAA instruction,the result is
 CF=1 00110010 AL=32H AF=1
 0110 1000
10011000=AL=98 in BCD form

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 Arithmetic instructions
 DAS: Decimal Adjust after Subtraction
General form: DAS
This instruction is used after subtracting two packed BCD numbers. The result
of subtraction must be in AL
 DAS only works on AL register, so DAS instruction must be used after the
SUB/SBB instruction
 The SUB/SBB instruction adds the two BCD number in hexadecimal format and
DAS instruction convert this hexadecimal result to BCD result
 Operation-
1. If lower nibble of AL>9 OR AF=1,
Then AL=AL-06
2. If higher nibble of AL>9 OR CF=1,
Then AL=AL-60
3. If both above conditions are satisfied then
AL=AL-66
 Flags affected: SF, ZF, AF, PF, CF
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 Arithmetic instructions:
 Following examples explains this instruction.
i)Let AL = 55BCD, BL = 49BCD
SUB AL, BL ; 0101 0101 =AL
DAS 0100 1001 =BL

0000 1100=AL=OCH and CF=0 AF=1

 Now in above e.g after subtraction , The value of lower nibble of AL >9 as well as AF=1,So
DAS instruction subtracts 6 from lower nibble of AL register to get correct BCD result
i.e.06BCD
 After execution of DAS instruction, the result is
 CF=1 00001100 AL=0CH AF=1
 0000 0110
00000110=AL=06 in BCD form

56
 Arithmetic instructions:
 NEG: Negate (Find 2’s complement)
 General form: NEG destination
 This instruction finds 2’s complement of destination
 For finding 2’s complement, it subtracts the contents of destination from zero.
 The result is stored in destination.
 The destination may be a register or a memory location.
 If operation cannot be completed then OF=1.
 All conditional flags are affected(OF,CF,PF,AF,SF,ZF)
Destination=2 ndCompliment of destination

 Example-

 NEG AX Replace the number in AX with its 2’s compliment

 NEG BYTE PTR[BX] -Replace the Byte at offset [BX]in with its 2’s compliment

57
 Arithmetic instructions:
 MUL: Unsigned multiplication of byte or word
General form: MUL source
 This instruction multiplies an unsigned byte by contents of AL or an unsigned word by
contents of AX.
 The source can be a register or memory location. Immediate data cannot be used as source.
 When a byte is multiplied by AL, the result is put in AX.
 When a word is multiplied by AX, the result can be as large as 32 bits. The most significant
word (upper 16 bits) of result is placed in DX. The least significant word (lower 16 bits) of
result is placed in AX.
 If the most significant byte of 16 bit result or the most significant word of 32 bit result is 0,
CF and OF will be 0
 AF, PF, SFand ZF flags are undefined.
 Examples:
MUL BL ; AX = AL * BL -Multiply AL by BL, result in AX
MUL CX ; DX : AX = AX * CX –Multiply AX by CX,result in DX:AX
MUL BYTE PTR [BX] -Multiply AL by byte in DS pointed by [BX],result in AX
MUL WORD PTR [SI]

58
 Arithmetic instructions
 IMUL: Multiply signed numbers

 General form: IMUL source

 This instruction multiplies a signed byte by AL or a signed word by contents of AX.

 The source can be a register or memory location. Immediate data can not be used as source.

 When a byte is multiplied by AL, the signed result is put in AX.

 When a word is multiplied by AX, the signed result is put in registers DX and AX with upper
16 bits in DX and lower 16 bits in AX.

 If upper byte of 16 bit result or upper word of 32 bit result contains only sign bits (all 0s for
positive result and all 1s for negative result) then CF = OF = 0 (reset).

 If upper byte of 16 bit result or upper word of 32 bit result contains part of the product, CF =
OF = 1 (set).

 AF, PF, SF, ZF flags undefined.

 Examples:
IMUL BX -Multiply AX by BX ,result in AX
IMUL AX
IMUL WORD PTR [SI]

59
 Arithmetic
DIV: Unsigned Divide
instructions

 General form: DIV source

 This instruction is used to divide an unsigned word by a byte or an unsigned double word
by a word.

 The source can be a register or memory location.

 When a word is divided by byte, the word must be in AX. After division, AL will contain an 8
bit result (quotient) and AH will contain an 8 bit remainder.

 If a number is divided by zero or if result is greater than FFH, 8086 will automatically
generate a type 0 interrupt.

 When a double word is divided by a word, the most significant word must be in DX and least
significant word must be in AX. After division, AX will contain the 16 bit result and DX will
contain 16 bit remainder.

 If a number is divided by 0 or if the result is greater than FFFFH, type 0 interrupt is

generated.

 All flags are undefined after a DIV instruction

 Examples:

 DIV BL ;( AX / BL) Divide word in AX by Byte inBL,Quotient in AL And remainder in AH

 DIV CX ; DX : AX / CX

60
 Arithmetic instructions
 IDIV: Signed division
 General form: IDIV source register or memory
 This instruction is used to divide a signed word by a signed byte or a signed
double word by a signed word.
 When a signed word is divided by signed byte, the word must be in AX. After
division, AL will contain signed result (quotient) and AH will contain signed
remainder.
 If a number is divided by zero or if result is greater than 127 or result is less than -
127, type 0 interrupt is generated.
 When a signed double word is divided by a signed word, the most significant word
must be in DX and least significant word must be in AX. After division, AX will
contain the 16 bit result and DX will contain 16 bit remainder.
 If a number is divided by 0, or if the result is greater than 7FFFH, or if the result is
less than 8001H, type 0 interrupt is generated.
 All flags are undefined.
 Examples:
IDIV BL -Divide a signed word in AX by a signed byte in BL,Quotient in AL,Remainder in AH
IDIV CX - Divide a signed double word in DX by a signed word in CX ,Quotient in
61
AX,Remainder in DX
IDIV BYTE PTR[BX] - Divide a signed word in AX by a signed byte in BX in memory location
 Arithmetic instructions
 AAA: ASCII Adjust after Addition
General form: AAA
➢This instruction is generally used after an ADD instruction. AH must be
cleared before ADD operation.
➢This instruction converts the contents of AL to unpacked decimal digits.
➢This instruction examines the lower 4 bits of AL whether it contains a value in
the range 0 to 9.
➢If it is between 0 – 9 and AF=0, this instruction sets 4 higher bits of AL to zero.
➢If lower 4 bits of AL are in the range 0 – 9 and AF=1, 06H is added to AL. The
upper four bits of AL are cleared and AH is incremented by 1.
➢If lower nibble (lower 4 bits) of AL is greater than 9, AL is incremented by 6
and AH is incremented by 1. The upper nibble of AL is cleared and AF=CF=1.
➢Flags affected: AF, CF

62
 Arithmetic instructions
 Examples:

1)LET AH=00H AL=0BH After Execution, AH=01H ,AL=O1H

2) Let BL = 34H
AL = 33H
Then
ADD AL, BL ; AL = 33 + 34 = 67H
AAA ; AL = 07H
2) Let BL = 34H
AL = 36H
Then
ADD AL, BL ; AL = 33 + 34 = 6AH
AAA ; Since lower 4 bits of AL = A > 9
therefore AL = AL + 06H
= 10H
AL = 00H, AH = 01H

63
 Arithmetic instructions
 AAS: ASCII Adjust after Subtraction
➢ General form: AAA
➢ This instruction corrects the result in AL register. This instruction is used
after subtraction operation.

➢ If lower nibble of AL is greater than 9 or if AF = 1, AL is decremented by 6

and AH is decremented by 1. The CF and AF are set to 1.
 Example-
AAS
Before the execution of AAS Suppose AH=02H
AL=0BH
After execution of AAS AH=01H
AL=05H

64
 Arithmetic instructions
 AAM: ASCII Adjust after Multiplication
➢ General form: AAM
➢ This instruction converts the product available in unpacked BCD format.
➢ This instruction is used after multiplication operation in which two
unpacked BCD operands are multiplied.
➢ Flags affected: SF, ZF, PF
➢ Example-
AL=06 BL=08
MUL BL AX=30H(48 in decimal)
AAM AH=04 and AL=08

65
 Arithmetic instructions
 AAD: ASCII Adjust before Division
➢ General form: AAM
➢ This instruction converts two unpacked BCD digits in AH and AL to
equivalent binary number and stores it in AL.
➢ Flags modified: SF, ZF, PF
➢ This instruction is used before DIV instruction.
➢ Example:
➢ Let AX = 19H(25 in decimal) BL=07H(7 in decimal)
AAD
DIV BL ; AL = O3H Quotient and AH=04 Remainder

66
 Arithmetic instructions
 CBW: Convert signed Byte to signed Word.
➢ General form: CBW
➢ This instruction copies the sign bit of a byte in AL to all bits in AH.
➢ No flags are affected.
Operation -
AH=Filled with 8 bit of AL
Example-
AX=00000000 10011011
CBW convert signed byte in AL to signed word in AX
AX=11111111 10011011

67
 Arithmetic instructions
 CWD: Convert signed Word to signed Double word
➢ General form: CWD
➢ This instruction copies the sign bit of a word in AX to all bits of DX register.
➢ No flags are affected
Operation -
DX=Filled with 16 bit of AX
Example-
DX=00000000 00000000
AX=11110000 11000111
CWD convert signed word in AX to signed double word in DX
Result after the execution of CWD
DX=11111111 11111111
AX=11110000 11000111

68
 Logical instructions/Bit manipulation Instructions


AND: Logical AND
General form: AND destination, source


This instruction ANDs bits of destination and source. The result is stored in destination.


The source can be immediate number, a register or memory location.


The destination can be a register or a memory location.


Both operands cannot be memory locations.


The size of operand must be same.
Flags affected: OF = CF = 0 (reset)
PF, SF and ZF flags are modified.
A F(Auxiliary Carry) flag is undefined.


Destination=Destination AND Source
Examples:
AND AX, 8000H - AND word in AX with immediate data 8000H
AND BH, CL -AND byte in CL with byte in BH ,result in BH

69
 Logical instructions:
OR: Logical OR
➢General form: ORdestination, source
➢This instruction performs OR operation on bits of source and destination. The
result is stored in destination.
➢The source can be immediate number, a register or memory location.
➢The destination can be a register or a memory location.
➢Both operands cannot be memory locations.
➢The size of operand must be same.
➢Flags affected:
 OF = CF = 0 (reset)
 PF, SF and ZF flags are modified.
 AF(Auxiliary Carry) flag is undefined
 Destination=Destination OR Source
➢Examples:

 OR BX, CX -OR word in CX with word in BX ,result in BX

70  OR BH, CL -OR byte in CL with byte in BH ,result in BH
 Logical instructions:
 Logical Exclusive OR
➢ General form: XOR destination, source
➢ This instruction performs logical exclusive OR operation on bits of source and
destination. The result is stored in destination.
➢ The source can be immediate number, a register or memory location.
➢ The destination can be a register or a memory location.
➢ Both operands cannot be memory locations.
➢ The size of operand must be same.
➢ Flags affected:
 OF = CF = 0 (reset)
 PF, SF and ZF flags are modified.
 A F(Auxiliary Carry) flag is undefined
 Destination=Destination XOR Source
➢ Examples:
XOR AL, BL -XOR byte in BL with byte in AL,result in AL
XOR CX, DX - XOR word in CX with word in DX,result in CX
71
XOR BX, 5000
 Logical instructions:
 Logical Exclusive OR
➢ General form: XOR destination, source
➢ This instruction performs logical exclusive OR operation on bits of source and
destination. The result is stored in destination.
➢ The source can be immediate number, a register or memory location.
➢ The destination can be a register or a memory location.
➢ Both operands cannot be memory locations.
➢ The size of operand must be same.
➢ Flags affected:
 OF = CF = 0 (reset)
 PF, SF and ZF flags are modified.
 A F(Auxiliary Carry) flag is undefined
 Destination=Destination XOR Source
➢ Examples:
XOR AL, BL -XOR byte in BL with byte in AL,result in AL
XOR CX, DX - XOR word in CX with word in DX,result in CX
72
XOR BX, 5000
 Logical instructions:
 NOT: Invert each bit of operand
➢ General form: NOT destination
➢ This instruction complements the contents of destination.
➢ The destination can be register or memory location.
➢ No flags are affected
➢ Destination=NOT Destination
➢ Examples:
NOT BX -Compliment the contents of BX
NOT BYTE PTR[BX]-Compliment the contents of memory location pointer by[BX]
NOT WORD PTR[SI]-Compliment the contents of memory location pointer by[SI]
NOT CL –Compliment the contents of CL

73
 Logical instructions:
 TEST: AND operands to update flags.
➢ General form: TEST destination, source
➢ This instruction logically ANDs the bits of source and destination.
➢ No operand will change, only flags are updated.
➢ Flags affected:
 OF = CF = 0 (reset)
 PF, SF and ZF flags are modified.
 A (Auxiliary Carry) flag is undefined
➢ Examples:
 TEST AX, BX –AND byte in AX with byte in BX, no result, update PF,SF,ZF
 TEST BX, 00FFH–AND word in BX with immediate data 00FFH,no result, update PF,SF,ZF
 TEST BH, CL- AND byte in CL with byte in BH, no result, update PF,SF,ZF

74
 Difference Between AND and TEST
AND TEST

 Destructive AND instruction  Non-destructive AND

means destination is modified instruction means destination
after the execution instruction is not modified after the
execution of instruction
 Flag
Affected:CF=0,OF=0,PF,SF,ZF  Flag Affected: CF, OF, PF, SF, ZF

 Operation:  Operation:

Destination=Destination AND Flags=Set for result of

source (Destination AND Source)

75
 Shift/Rotate instructions:
1.
SHL/SAL-Shift left

2.
SAR-Shift Right

3.
SHR-Shift Right

4.
ROR-Rotate Right

5.
ROL-Rotate Left

6.
RCR-Rotate Right with Carry

7.
RCL-Rotate left with carry

76
 Shift/Rotate instructions:
 SHL/SAL-Shift Left
1) SHL: SHift operand bits Left
2) SAL: Shift Arithmetic Left operand bits
➢ General form: SHL destination, count
SAL destination, count
➢ These instructions shift the destination bits to the left.
➢ Zero is inserted at the least significant bit position (i.e. bit 0). Most
Significant Bit is transferred to Carry flag.
➢ Destination can be a register or a memory location.
➢ The count can be 1 or specified by register CL.
➢ Flags affected- AF flag is undefined.OF, SF, ZF, PF and CF flags are
modified

77
 Shift/Rotate instructions:
 For example,
1) Let AL = 79H = 0111 1001B
SHL AL, 1
SAL AL, 1

AL before execution:

AL after execution:

2) SAL BP, CL ; CL contains shift count

78
 Shift/Rotate instructions:
3) SHR: SHift Right
General form: SHR destination, count

 This instructions shift the destination bits to the right.

 Zero is filled in the most significant bit position. Least Significant Bit is transferred to Carry flag.

 Destination can be a register or a memory location.

 The count can be 1 or specified by register CL.

 Flags affected: AF flag is undefined . OF, SF, ZF, PF and CF flags are modified.

For example, 1) Let AL = 79H = 0111 1001B

SHR AL, 1

79
 Shift/Rotate instructions:

 For example, 1) Let AL = 79H = 0111 1001B

SHR AL, 1

AL before execution:

AL after execution:

2) SHR DX, CL

80
 Shift/Rotate instructions:

SAR: Shift Arithmetic Right
General form: SHR destination, count


This instructions shift the destination bits to the right.


It inserts the most significant bit of operand in new position.


Destination can be a register or a memory location.


The count can be 1 or specified by register CL.


Flags affected: A flag is undefined O, S, Z, P and C flags are modified

For example, 1) Let AL = 1DH = 0001 1101B

SAR AL, 1 ; AL = 0000 1110B and Carry flag =1
2) BH = F3H = 1111 0011B
CL=02h
SAR BH, CL ; BH = 1111 1100B and Carry flag = 1

81
 Shift/Rotate instructions:

ROR: Rotate Right without carry
General form: ROR destination, count


This instruction rotates the bits of destination to the right.


The LSB is transferred to MSB as well as to carry flag.


The destination can be a register or a memory location.


The count can be 1 or specified by CL register.


Flags affected: OF and CF flags are modified.

Example-
1)CF=0 BL=00111011
ROR BL,1 Rotate all bits in BL right by one bit position
CF=1 BL=10011101

82
 Shift/Rotate instructions:

ROL: Rotate Left without carry
General form: ROL destination, count


This instruction rotates the bits of destination to the left.


The MSB is transferred to LSB as well as to carry flag.


The destination can be a register or a memory location.


The count can be 1 or specified by CL register.


Flags affected: OF and CF flags are modified


Example-
1)CF=0 BL=10111010
ROL BL,1 Rotate all bits in BL left one bit position
CF=1 BL=01110101

83
 Shift/Rotate instructions:
• RCR: Rotate Right through Carry flag:
General form: RCR destination, count
• The CF bit is transferred to MSB of destination.
• The LSB is transferred to carry flag

• The destination can be a register or a memory location.

• The count can be 1 or specified by CL register.
• Flags affected: OF and CF flags are modified.
Examples:
1)CF=0 BL=00111011
RCR BL, 1 Rotate all bits in BL right by one bit position
CF=1 BL=0001 1101

2)MOV CL, 04H

RCR DX, CL

84
 Shift/Rotate instructions:
 RCL: Rotate Left through Carry flag
General form: RCL destination, count
 This instruction rotates the bits of destination to left through Carry Flag
(CF).
 The MSB of destination is transferred to carry flag
 The CF bit is transferred to LSB of destination

 The destination can be a register or a memory location

 The count can be 1 or specified by CL register
 Flags affected: OF and CF flags are modified.
Examples:
1)CF=1 BL=00111011
RCL BL,1 Rotate all bits in BL left by one bit position
CF=0 BL=01110111
85
2)MOV CL, 03H 3)RCR WORD PTR [BX], 1
RCR AX, CL
 Flag manipulation instructions:
 These instructions are used to set or reset flags. Only that flag will be
affected on which thisinstruction will operate
1) CLC: Clear Carry flag, after execution CF = 0.
2) CMC: Complement Carry flag, after execution CF will be complemented.
3) STC: Set Carry Flag, after execution CF = 1.
4) CLD: Clear Direction flag, after execution DF = 0.
5) STD: Set Direction flag, after execution DF = 1.
6) CLI: Clear Interrupt flag, after execution IF = 0. If IF is reset, INTR will be
masked.
7) STI: Set Interrupt flag, after execution IF =1.

86
 Processor / Machine control instructions:
 These instructions are used to control the microprocessor.

1) WAIT: When this instruction is executed, microprocessor goes into wait state
until TEST pin goes low.
2) HLT: Halt the processor. To make it come out of halt, state reset it or interrupt it.
3) NOP: No operation, microprocessor will not perform any operation for 4 clock
cycles. IP will be incremented by 1. This instruction can be used in delay loops.
4) ESC: Escape to external device like 8087
5) LOCK: Lock the bus
➢ It is a prefix, when used with some instruction, the buses are locked till the
instruction is executed completely. No other bus master can gain the access of
buses.

➢ E.g LOCK IN AL,80H

87
 Branch and control transfer instructions:
 Unconditional branch instructions:
1) CALL: Call a procedure

➢ This instruction is used to transfer execution to a subprogram or procedure

(subroutine).
➢ There are two types of CALL: near and far

➢ A near CALL is a call to a procedure which is in the same code segment. The value of IP
register is stored on stack when call is executed.

➢ A far call is a call to a procedure which is in different code segment. When call is
executed, value of CS and IP registers is stored on stack.
➢ Examples:

 CALL ascending ; ascending is the name of procedure CALL BX ;

BX is copied into IP
 CALL WORD PTR[BX] ; [BX] and [BX+1] contents copied into IP.
 CALL DWORD PTR[BX] ; [BX], [BX+1] à CS
88  [BX+2], [BX+3] à IP
 Branch and control transfer instructions:
 Unconditional branch instructions:
 2) RET: Return from the procedure
 This instruction returns execution from a procedure to the next instruction after
call instruction.
 If procedure is near procedure then value of IP is restored from stack.
 If procedure is far procedure then value of IP as well as CS is restored from stack.

89
 Branch and control transfer instructions:
 Unconditional branch instructions:
1) INT N: Interrupt type N

➢ General form: INT N

➢ N can be a value between 00H to FFH.
➢ When INT N is executed, N is multiplied by 4. the result will be used as offset and
value 0000H will be used as code segment value.

➢ The address 0000 : N*4 will be used to find new values of IP and CS in order to
execute an Interrupt Service Routine (ISR).
➢ Example:
 INT 21H 21H * 4 = 84H
 0084H is an offset in CS = 0000H.

90
 Branch and control transfer instructions:
 Unconditional branch instructions:
 4) INTO: Interrupt on Overflow
 General form: INTO
 This instruction is executed when OF=1.
 the address of ISR is found (i.e. value of CS and IP) from memory location 0000 :
0016. this is equivalent to INT 04H.
 This instruction will generate type4 interrupt

91
 Branch and control transfer instructions:
 Unconditional branch instructions:
 5) IRET: Return to Interrupted program
General form: IRET
 The IRET instruction is used at the end of interrupted service procedure to
return the execution to the interrupted program
 During Execution of this instruction ,the 8086 copies the saved value of IP from
the stack to IP, the saved value of CS from the stack to CS and saved value of
flags back to the flag register
 Functions performed by this instruction are:
1. IP is popped from the stack then SP=SP+2
2. CS is popped from the stack then SP=SP+2
3. Flag Register is popped from the stack then SP=SP+2

92
 Branch and control transfer instructions:
 JMP: Unconditional jump
➢ This instruction unconditionally transfers the control of execution to specified address.
➢ If control is transferred within same code segment it is called near jump or intra segment
jump.
➢ If control is transferred to another code segment, it is called far jump or inter segment
jump.
➢ No flags are affected.
➢ Examples:

 JMP continue ; transfer execution to instruction having a label continue

 JMP DOWN

 JMP WORD PTR SKIP

 JMP DWORD PTR[BX]

93
 Difference between Inter AND Intra segment
jump
Inter-segment jump Intra-segment jump
 Inter-segment jump can  Intra-segment jump can
transfer control to a transfer control to a
instructions in a different instructions in a same
code segment code segment
 It is called as FAR jump  It is also called as NEAR
 It requires code segment jump
register CS and instruction  It requires only the
pointer IP to be changed to instruction pointer IP to
transfer to the target be changed to transfer to
location the target location
 E.g JMP adds32 :direct  E.g JMP disp16 :direct
intersegment intrasegment
94
 Branch and control transfer instructions:
 LOOP: Loop unconditionally
General form: LOOP label
 This instruction executes instruction from the label upto LOOP instruction
CX times.
 At each iteration, CX is automatically decremented.
 No flags are affected.
 Examples:
MOV AL ,00H
MOV CX, 0010
next: ADD AL, CL
LOOP next

95
 Branch and control transfer instructions:
1) LOOPE / LOOPZ: Loop while CX ≠ 0 and ZF = 1 (set)
➢ This instruction executes the loop when CX ≠ 0 and ZF = 1.
➢ If ZF becomes 0 or CX = 0, the loop is terminated.

1) LOOPNE / LOOPNZ: Loop while CX ≠ 0 and ZF = 0 (reset)

➢ This instruction executes the loop when CX ≠ 0 and ZF = 0.
➢ If ZF becomes 1 or CX = 0, the loop is terminated.

96
 Branch and control transfer instructions:
Conditional branch instructions:
 These instructions transfer the execution control to given label if some condition is
satisfied.
 The target address must be in the range -80H to 7FH (or -128 to 127) bytes from
branch instruction.
 No flags are affected.
S. No. Instruction Operation
1 JZ / JE label Jump to label if ZF = 1
2 JNZ / JNE label Jump to label if ZF = 0
3 JS label Jump to label if SF = 1
4 JNS label Jump to label if SF = 0
5 JO label Jump to label if OF = 1
6 JNO label Jump to label if OF = 0
7 JP / JPE label Jump to label if PF = 1
8 JNP label Jump to label if PF = 0
9 JB / JNAE /JC label Jump to label if CF = 1
10 JNB / JAE / JNC label Jump to label if CF = 0
11 JBE / JNA label Jump to label if CF = 1 or ZF = 1
12 JNBE / JA label Jump to label if CF = 0 or ZF = 0
13 JL / JNGE label Jump if neither SF = 1 nor OF = 1
14 JNL / JGE label Jump if neither SF = 0 nor OF = 0
15 JLE / JNG label Jump to label if ZF = 1 or neither SF = 1 nor OF = 1
16 JNLE / JG label Jump to label if ZF = 0 or at least any of SF & OF is 1
97 17 JCXZ label Jump to label if CX = 0
 Difference between JNC2000H and JMP2000H

98
 Difference between JMP and CALL

99
 String manipulation instructions:
 A string is contigious block of bytes or words can used to hold any type of
data or information that will fit into bytes or words
 There are number of operation performed with string
 The 8086 microprocessor supports string instruction for string
movement, scan, comparison,load and store
 MOVS: Move string
 MOVSB: Move string byte
 MOVSW: Move string word

100
 String manipulation instructions:
1) MOVSB / MOVSW: Move String Byte or String Word
➢ General form:MOVSB or REP MOVSB
➢ MOVSW or REP MOVSW

➢ This instruction copies a byte or a word from a location in the data segment to a
location in the extra segment.
➢ The offset of source byte/word in data segment must be in SI register.
➢ The offset of destination in extra segment must be in DI register.
For multiple byte/multiple word moves, the number of elements to be moved is put in
CX register. It acts as counter.
➢ After a byte/word move, SI and DI are automatically adjusted to point to next source
and destination byte/word.

➢ If Direction Flag (DF) = 0, SI and DI will be automatically incremented by 1 for byte

move (MOVSB) and incremented by 2 for word move (MOVSW)
➢ If DF = 1, then SI and DI will be automatically decremented by 1 for byte move (MOVSB)
and decremented by 2 for word move (MOVSW)
➢ No flags are affected
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 String manipulation instructions:
Operation- ES:[DI]=DS:[SI]
If byte Movement
For DF=0 SI=SI+1 and DI=DI+1
For DF=1 SI=SI-1 and DI=DI-1
If Word Movement
For DF=0 SI=SI+2 and DI=DI+2
For DF=1 SI=SI-2 and DI=DI-2
Example-
MOV AX,DATA
MOV DS,AX
MOV ES,AX
CLD
MOV SI,OFFSET S_STRING
MOV DI,OFFSET D_STRING
▪ MOV S_STRING,D_STRING
▪ MOVSB
▪ MOVSW

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 String manipulation instructions:
 CMPSB / CMPSW: Compare String Byte or Word
General form: CMPSB or REPE CMPSB
CMPSW or REPE CMPSW
 This instruction is used to compare two strings of byte or word.
 The length of string is stored in CX register.
 One string is stored in data segment and its offset is stored in SI.
 Second string is stored in extra segment and its offset is stored in DI.
 Comparison is done by subtracting the byte/word of destination from the byte/word of
source. Neither source nor destination is changed.
 All condition flags are affected(AF,CF,SF,ZF,OF,ZF)
 If DF = 0, after comparison SI and DI are automatically incremented by 1 or 2 (for CMPSB 1,
for CMPSW 2).
 If DF = 1, after comparison SI and DI are automatically decremented by 1 or 2 (for CMPSB 1,
for CMPSW 2).

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 String manipulation instructions:
Operation- Example-
1.If Destination string byte/word>source
string byte /word then CF=0,ZF=0,SF=0 MOV AX,DATA
2. If Destination string MOV DS,AX
byte/word<source string byte /word
then CF=1,ZF=0,SF=1 MOV ES,AX
3.If Destination string byte/word=source CLD
string byte /word then CF=0,ZF=1,SF=0 MOV SI,OFFSET S_STRING
If byte Comparision
MOV DI,OFFSET D_STRING
For DF=0 SI=SI+1 and DI=DI+1
 CMPS S_STRING,D_STRING
For DF=1 SI=SI-1 and DI=DI-1
 CMPSB
If Word Comparison
 CMPSW
For DF=0 SI=SI+2 and DI=DI+2
For DF=1 SI=SI-2 and DI=DI-2

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 String manipulation instructions:
 SCANSB / SCANSW: Scan a String Byte or String Word.
 General form: SCASB or REPNE SCASB
SCASW or REPNE SCASW
 This instruction compares a byte in AL or word in AX with a byte or word pointed to by DI in
extra segment.
 If DF = 0, then DI will be incremented.
 If DF = 1, then DI will be decremented.
 If a match is found in the string Zero flag is set.
 Flags affected: All condition flags(AF,CF,OF,PF,SF,ZF)
Operation- Example-
If byte scan MOV AX,DATA
For DF=0 DI=DI+1 MOV DS,AX
For DF=1 DI=DI-1 MOV ES,AX
If Word scan CLD
For DF=0 DI=DI+2 MOV DI,OFFSET D_STRING
For DF=1 DI=DI-2 MON AL.’V’
SCAS D_STRING
105 SCASB
SCASW
 String manipulation instructions:
 LODSB / LODSW: Load String Byte into AL or Load String Word in AX
➢ General form: LODSB or LODSW
➢ This instruction loads a byte/word into AL/AX from contents of a string pointed to by
DS : SI.

➢ SI is modified depending upon DF. If DF = 0, SI is incremented and if DF=1, SI is

decremented.
➢ No flags are affected.
Operation-AL=DS:[SI] Example-
If byte load MOV AX,DATA
For DF=0 SI=SI+1 MOV DS,AX
For DF=1 SI=SI-1 MOV ES,AX
If Word load CLD
For DF=0 SI=SI+2 MOV SI,OFFSET S_STRING
For DF=1 SI=SI-2 LODS S_STRING
MOV ES,AX LODSB
LODSW

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 String manipulation instructions:
 STOSB / STOSW: Store a Byte or Word in String
➢ General form: STOSB or STOSW
➢ This instruction stores AL/AX contents to a location in string pointed by ES : DI.
➢ DI is modified depending upon DF.
➢ If DF = 0, DI is incremented by 1 for STOSB and incremented by 2 for STOSW
instruction.
➢ No flags are affected by this instruction.
Operation-ES:[DI] =AL Example-
If byte Movement MOV AX,DATA
For DF=0 DI=DI+1 MOV DS,AX
For DF=1 DI=DI-1 MOV ES,AX
If Word Movement CLD
For DF=0 DI=DI+2 MOV DI,OFFSET D_STRING
For DF=1 DI=DI-2 STOS D_STRING
MOV ES,AX STOSB
STOSW

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 String manipulation instructions:
 REP: Repeat instruction prefix
➢ This is used as a prefix to other instructions.

➢ The instruction to which REP prefix is used, is executed CX times.

➢ At each iteration CX is automatically decremented by 1.

➢ there are two more repeat instruction prefix: REPE / REPZ i.e. Repeat if
equal/zero and REPNE / REPNZ i.e. Repeat if not equal/not zero.

108
 Write an instruction of 8086 to perform
following operation
(i) Shift the content of BX register'3 bit toward left.
MOV CL,O3
SHL AL,CL
(ii) Move 1234H in DS register
MOV AX,1234H
MOV DS,AX
iii)Multiply AL register contents by 4 using shift instructions
MOV CL,02
SHL AL,CL
(iv) Move 2000 H into CS register
MOV AX,2000H
MOV CS,AX

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 Write an instruction of 8086 to perform
following operation
i)Rotate register BH left 4 times-MOV CL,4 ROL BL,CL or RCL BL,CL

ii)Multiply AL by 08H-MOV BL,08H MUL BL

iii)Signed division of BL and AL- MOV BL,5 IDIV BL

iv)Move 4000H in BX register- MOV BX,4000H

v)Load offset 1000H in register BX-LEA BX,[1000H]

vi)Rotate BX to left 4 times through carry-MOV CX,4 ROL BX,CX

110