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10 Ed-Mosfet

The document discusses the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and its underlying component, the MOS capacitor, detailing its structure, operation regions (accumulation, depletion, inversion), and capacitance calculations. It explains how gate voltage affects the semiconductor behavior, charge distribution, and capacitance in different operational states. Additionally, it provides equations for calculating threshold voltage, depletion width, and doping concentration in the substrate.

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0% found this document useful (0 votes)
14 views37 pages

10 Ed-Mosfet

The document discusses the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) and its underlying component, the MOS capacitor, detailing its structure, operation regions (accumulation, depletion, inversion), and capacitance calculations. It explains how gate voltage affects the semiconductor behavior, charge distribution, and capacitance in different operational states. Additionally, it provides equations for calculating threshold voltage, depletion width, and doping concentration in the substrate.

Uploaded by

f20230424
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Metal Oxide Semiconductor Field Effect

Transistor

October 6, 2017
MOS capacitor

MOS capacitor is a two terminal device useful in


understanding the MOSFET. An combination of Metal,
Insulator(Oxide) and Semicondcutor,
G

Metal
Oxide

Semiconductor
p(substrate)

B
Ideal MOS capacitor- Energy band band diagram
The energy band diagram of a MOS capacitor under zero
applied voltage VG = 0. For an ideal mos capacitor, the
metak and senicondcutor work functions are equal
φm = Φs
VG =0 E0

qΦs

qφm Ec

Ei
EF EF
Ev
MOS capacitor-Goal

To understand the regions of operation of the MOS


capacitor for different gate voltages
to derive the threshold voltage of the MOS device
To compute the capacitance value in these different
regions
To study the variation of the MOS capacitabce as a
function of the gate voltage
MOS capacitor

Three main regions of operations a) Accumulation b)


depletion c) Inversion
VG <0 0<VG<VTH
Accumulation
Depletion

p(substrate) p(substrate)

VG>VTH
Inversion

p(substrate)
MOS capacitor-Accumulation
WHen the gate voltgae is negative compared to the bulk,
then the MOS capacitor is said to be in Accumulation
region.
VG <0
Accumulation

p(substrate)
Accumulation

VG < 0V A negative voltage on the gate attracts positive


charges in the semiconductor towards the si − siO2
junction
The semiconductor regions behaves like a low resisitve
metal plate. Thus a capacitor is formed between the gate
and the secmiconductor region
This region has the maximum capacitance, given by
ǫox
Cox =
tox
tox is the oxide thickness and it is a technology dependent
number
MOS capacitor-Accumulation
MOS capacitor in the accumulation region bahaves like a
parallel plate capacitor with the metal as one plate and the
highly ocnductive semiconductor surface as the other other
plate
ǫox
C = Cox =
tox
VG <0 VG

Cox

p(substrate)
MOS capacitor-Accumulation
Energy band diagram in accumulation region. Most of the
voltage drops across the oxide region, a small voltage
drops across the semiconductor region. The fermi level is
constant throughout the semicondutor as there is no
current through the semiconductor

E0
VG <0

qΦs
qφm
Ec

EF Ei
EF
MOS capacitor-Accumulation
Charge density, electric field and potential across the MOS
capacitor in accumulation region. It can be seen that most
of the voltage drops across the oxide region
ρ(x)

E(x)
M M O S
O S

M O S

V(x)
VG
MOS capacitor-Depletion
WHen the gate voltgae is positve compared to the bulk, the
semiconductor surface is depleted of holes as they are
pushed away by the field. Then the MOS capacitor is said
to be in Depletion region.
0<VG<VTH

Depletion

p(substrate)
Depletion

0 < VG < VTH A positive voltage on the gate attracts


negative mobile electrons towards the si − siO2 junction
These electrons are provided by the external voltage
source
The excess electrons in the semiconductor will recombine
with the holes near the interface, thus reducing the hole
concentration near the interface
Thus the region is depleted of mobile holes and the
capacitance extends into the semiconductor region as well.
The applied voltage will drop across the depletion region
as well
Calculation of capacitance and voltage distribution across
the Metal-oxide-semiconductor is of interest
Depletion

The capacitance can now be seen as a series of two


capacitors, one with oxide as a dielectric and the other with
the SC as the dielectric
ǫs
Cd =
W
The total capacitance in the depletion region is given by

Cox Cd
CT =
Cox + Cd
0<VG<VTH

Vox Cox

Vd Cd
p(substrate)
MOS capacitor-Depletion

The charge density, electric field and potential across the


MOS capacitor in depletion region.

ρ(x) E(x)
W

M O S M O S

-qNa
V(x)
VG
φs
M O S
Electric field in the oxide region

The electric field is constant in the oxide region as it is


depleted of charges.

δE ρv
=
δx ǫ
δ(ǫE)
= ρv = 0
δx
Hence ǫE = constant and we have

ǫs Es = ǫox Eox

ǫox = 3.9ǫo and ǫs = 11.7ǫo . (ǫs ≈3ǫox )


There is a discontinuity in the electric field in the si − siO2
interface
Depletion
W is the depletion width which varies with the applied
voltage VG and the voltage drop (φs ) across the
semiconductor region.
From the equilibrium diagram, we can easily compute the
depltion widht using the depletion approximation to be
s
2ǫs φs
W =
qNa
The peak electric field in the semiconductor region is given
by E0 = qNa W /ǫs . The potential drop across the
semiconductor surface is given by
1 qNa W 2
φs = E0 W =
2 2ǫs
s
2ǫs φs
=⇒ W =
qNa
φs is the surface potential which determines the electron
concentration near the surface.
MOS capacitor-Depletion
Energy band diagram of the MOS capacitor under a
postive gate voltage.
E0

VG >0 qΦs

qφm Ec

Ei
EF
qVG Ev
EF
MOS capacitor-computing φs
When the positve voltage is increased, the drop across the
semicondcutor also increases, at one point the intrinisic
level corsses the fermi level and at that point the surface is
said to be inverted. There will be free electrons available at
the surface.

Ec

Ei
qφs EF
Ev
Depletion-computing φs
Let ns represent the inversion electron concentration at the
surface, the under weak inversion conditions, the
semiconductor potential φs can be expressed as
   
ns Na
qφs = kT ln + kT ln
ni ni

Ec
Ei
qφs kT ln(Na/ni)
EF
{
Ev
kT ln(ns/ni)
Depletion-computing φs
Depletion-computing φs
The maximum drop across the SC happens when the
depletion width is maximum. This condiction occurs when
the electron concentrtion at the interface becomes equal to
the hole concentration
The MOS capacitor is said to be in strong inversion when
the inversion charge density or the surface electron
concetration (ns ) equals the hole density in bulk

ns = Na

Thus the volateg across the semiconductor surface can be


computed from the total bending of the intrinsic level
 
Na
qφs = 2kT ln
ni
 
Na
∴ φs = 2VT ln
ni
Depletion voltage

Na
φs = 2VT ln( ) and the maximum depletion width is given
ni
by v
Na
u
u ǫs VT ln( )
u
ni
Wm = 2
t
qNa
The voltage across the oxide region Vox = −Qd /Cox . The
depletion charge Qd = −qNa W
Thus
−Qd Na
VG = VTH = Vox + φs = + 2VT ln( )
Cox ni
r
Na
ǫs Na kT ln( )
ni Na
=2 + 2VT ln( )
Cox ni
Depletion capacitance

The depletion capacitance is minimum when the depletion


width is maximum and hence the total capacitance is also
minimum
1 1 1
= +
CT Cox Cd
tox Wm
= +
ǫox ǫs
The MOS capacitor in depletion region depends on
temperature, but not in accumulation region
the depletion capacitance depends both on the applied
voltage and the temperature. Hence the total capacitance
also depends on T and VG
MOS capacitor-Inversion

When VG > VTH , the MOS capacitor is said to be


inversion region.
VG>VTH
Inversion

p(substrate)
MOS capacitor-Inversion
Mobile electrons start moving very slowly towards the
surface and the depletion width reduces. Most of the
volatge then drops across the oxide.

0<VG <VT VG >VT

VG >>VT Immobile
ions
Mobile e-
MOS capacitor-Inversion
MOS capacitor-Inversion
The semiconductor surface, being populated with mobile
electrons behaves like a conducting plate of the parallel
plate capcitor and hence the voltage drops entirely across
the oxide. Thus the capacitance is given by
ǫox
C = Cox =
tox
VG>VTH
VG
Inversion

Cox

p(substrate)
MOS capacitor- CV characterisitcs

Ideal MOS capacitance vs applied gate voltage, showing


accumulation, depletion and inversion regions.

Cox Depletion

Strong Strong
Inversion
Accumulation

0 VT VG
MOS capacitor under applied bias
Find the capacitance seen at the gate for the follwing
cases. It is given that VTH = 1.5
Compare the capacitance to Cox

+ VG =1 V + VG =1 V
− −

p(substrate) p(substrate)

+ VB =2V + VB =1V
− −

+ VG =0 V + VG =-2 V
− −

p(substrate) p(substrate)

+ VB =-1V + VB =-5V
− −
MOS capacitor under applied bias
MOS capacitor under applied bias

VGB = VG − VB = −1 V < 0 Hence CT = Cox as the MOS


capacitor is in accumulation region
VGB = VG − VB = 0 V Hence CT = Cox as the MOS
capacitor is center of accumulation and depletion region
VGB = VG − VB = 1 V , S0 0 < VTH < VTH Hence
CT < Cox as the MOS capacitor is in depltion region
VGB = VG − VB = 3 V > VFB Hence CT ≈Cox as the MOS
capacitor is in strong inversion region
Q.4-MOS capacitor
The C-V curve of an ideal MOS capacitor with p-substrate
is shown below with the applied voltage on x-axis and the
dc capacitance per unit area on y-axis. The minimum
capacitance occurs at an applied voltage of VX . COX is the
oxide capacitance per unit area. Derive an expression for
the doping concentration in the p-substrate in terms of VX
and COX . If VX = 1.5 V and COX = 1 fF /µm2 . what is the
voltage drop across the oxide and semiconductor regions.
Also calculate the doping concentration in the p-substrate.

Cox

0.5Cox

VX
VGB
Q.4-MOS capacitor

Since the total capacitance is COX /2,

COX Cd C
CTot = = OX =⇒ Cd = COX
COX + Cd 2

the oxide capacitance and the semiconductor capacitance


are exactly same. The oxide capacitance is given by
ǫOX
COX =
tOX

The depletion capacitance per unit area is given by


ǫs
Cd =
W
where W is the depletion width of the bulk region.
Q.4-MOS capacitor

The applied voltage is VX , and at that voltage the MOS


capacitor is in complete depletion region. The voltage
splits across the oxide and the semiconductor bulk regions
VX = VOX + Vd
The voltage across the oxide region is determined by the
charge stored in the gate terminal (which is equal to the
depletion charge in bulk region)

QOX qNa W
VOX = =
COX COX

The voltage across the semiconductor region can be found


by using the relationship between the depletion width (W)
and Vd s
2ǫs Vd qNa W 2
W = =⇒ Vd =
qNa 2ǫs
Q.4-MOS capacitor

The oxide and bulk voltages are

qNa W qNa W 2
VOX = & Vd =
COX 2ǫs

It is also given that Cd = COX . Hence


ǫs
Cd = = COX
W
qNa W qNa W 2
∴ VOX = = = 2Vd
COX ǫs
We can then write VX as

3 qNa W 2 3 qNa ǫs
VX = VOX + Vd = =
2 ǫs 2 COX 2
Q.4-MOS capacitor

The applied voltage can be expressed as

3 qNa ǫs
VX = VOX + Vd =
2 COX 2

From the above equation we have

2 VX COX 2
Na =
3 qNa ǫs

It can also be seen that the VOX = 2Vd

2 1
∴ VOX = VX & VOX = VX
3 3
If VX = 1.5 V

VOX = 1 V & Vd = 0.5 V


Q.4-MOS capacitor

The doping concentration value ,given that


COX = 1 fF /µm2 and VOX = 1.5 V is

2 VX COX 2
Na = = 5.9822x1016 cm−3
3 qNa ǫs

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