Content of the report

The purpose of laboratory work

Are to provide hands-on experience in designing, implementing, and testing digital circuits based on the concepts of combinational and sequential logic.

Description of the object under study

Each lab typically has distinct objectives:

Objective:

Combinational Logic Design and Sequential Logic Design are two fundamental categories in digital circuit design. Here's an overview of each:

1. Combinational Logic Design

● Definition: Combinational logic circuits are those in which the output depends only on the current input values, without any memory of past inputs.
● Key Characteristics:
1. No storage elements (i.e., no memory).
2. Outputs change immediately in response to inputs.
3. It is defined by Boolean expressions (AND, OR, NOT, etc.).
● Examples:
1. Adders (e.g., Half-adder, Full-adder).
2. Multiplexers.
3. Decoders.
4. Encoders.
● Design Process:
1. Define the problem.
2. Derive truth tables.
3. Minimize Boolean expressions (e.g., using Karnaugh maps).
4. Implement the logic gates.

2. Sequential Logic Design

● Definition: Sequential logic circuits are those where the output depends not only on the current inputs but also on the history of past inputs (i.e., they have memory).
● Key Characteristics:
1. Use storage elements like flip-flops or latches to remember past inputs.
2. The circuit has a "state," and the output depends on both the input and the current state.
3. Often synchronized by a clock signal.
● Examples:
1. Flip-flops (e.g., SR, D, JK, T Flip-flops).
2. Counters.
3. Shift Registers.
4. Finite State Machines (FSM).
● Design Process:
1. Identify the required states.
2. Create a state diagram.
3. Derive the state transition table.
4. Choose the appropriate flip-flops.
5. Develop the excitation equations.
6. Implement the logic gates and flip-flops.
Combinational Logic Design and Sequential Logic Design in MATLAB Simulink are fundamental for understanding digital circuit design. Below is a step-by-step guide on how to perform
both types of design in MATLAB Simulink.

Combinational Logic Design in MATLAB Simulink

Combinational logic circuits produce outputs based solely on current inputs, without memory or feedback. Common examples include logic gates, multiplexers, and decoders.

Steps to Simulate Combinational Circuits in Simulink

1. Launch MATLAB and Open Simulink

● Open MATLAB, then type simulink in the command window or click the Simulink button on the MATLAB toolbar to launch Simulink.

2. Create a New Model

● In Simulink, click on File > New > Model to create a new model.
● A blank Simulink canvas will open where you can start building your combinational circuit.

3. Add Logic Blocks

● Go to the Simulink Library Browser (by clicking the "Library Browser" button or typing slLibraryBrowser in the command window).
● In the Library Browser, navigate to Simulink > Logic and Bit Operations.
○ AND, OR, NOT, XOR blocks can be found here.

4. Drag and Drop the Required Logic Gates

● Drag the necessary logic gates (e.g., AND, OR, NOT, XOR) from the Logic and Bit Operations library onto the Simulink canvas. For a combinational circuit like a full adder, you
will need:
○ Two XOR gates (for sum computation).
○ Two AND gates (for carry computation).
○ One OR gate (to combine the intermediate carry outputs).

5. Add Constant Input Blocks

● Go to Sources in the Library Browser and drag Constant blocks for each input of your circuit.
○ For a full adder, you need three inputs: A, B, and C (carry in).

6. Configure the Input Constants

● Double-click on each Constant block and set its value to either 0 or 1. These will serve as the binary input values for the logic gates.
● Alternatively, you can use Step or Pulse Generator blocks for dynamic input.

7. Connect the Blocks

● Click and drag from one block's output to another block's input to create connections between the blocks.
○ For a full adder:
■ Connect the inputs A and B to the first XOR gate to compute the sum.
■ Connect the output of the first XOR gate and carry-in C to the second XOR gate for the final sum.
■ Connect inputs A and B to the first AND gate.
■ Connect carry-in C to the second AND gate with the output from the first XOR gate.
■ Connect the outputs of both AND gates to the OR gate to compute the final carry-out.

8. Add Display Blocks

● Go to Sinks in the Library Browser and drag Display blocks (or Scope blocks if you want a graphical view).
● Connect the output of the final XOR gate to a Display block for the sum output.
● Connect the output of the OR gate to another Display block for the carry output.

9. Run the Simulation

● Once your circuit is fully connected, click the Run button on the Simulink toolbar.
● You will see the outputs of the combinational circuit in the Display blocks.

10. (Optional) Adjust Simulation Time

● If you want to adjust how long the simulation runs, go to Simulation > Model Configuration Parameters and set the Stop Time accordingly.

Example: Full Adder Circuit

For a full adder, the logic gates perform the following operations:

● Sum = A B C (XOR of A, B, and C-in)

● Carry-out = (A B) + (C-in (A B))

To implement this:

1. Use two XOR gates for the sum output.

2. Use two AND gates and one OR gate to compute the carry-out.

Additional Tips:

● You can label your inputs and outputs for clarity by double-clicking the names.
● Use Mux blocks if you want to combine multiple signals into one line.
● After running the simulation, you can double-click on the Scope blocks to view the waveform if you used dynamic inputs (like a Pulse Generator).

This setup will allow you to simulate and observe the behavior of combinational logic circuits like full adders, decoders, multiplexers, etc., using Simulink.

Combinational Logic:
Logic circuits for digital systems may be combinational or sequential. A combinational circuit consists of input variables, logic gates, and output variables.
For n input variables, there are 2n possible combinations of binary input variables .For each possible input Combination, there is one and only one possible output combination. A combinational
circuit can be described by m Boolean functions one for each output variables. Usually the input s comes from flip-flops and outputs go to flip-flops.
Design Procedure:
1. The problem is stated
2. The number of available input variables and required output variables is determined.
3. The input and output variables are assigned letter symbols.
4. The truth table that defines the required relationship between inputs and outputs is derived.
5. The simplified Boolean function for each output is obtained.

Adders:
Digital computers perform variety of information processing tasks, the one is arithmetic operations. And the most basic arithmetic operation is the addition of two binary digits. i.e, 4 basic
possible operations are: 0+0=0, 0+1=1, 1+0=1, 1+1=10
The first three operations produce a sum whose length is one digit, but when augends and addend bits are equal to 1,the binary sum consists of two digits. The higher significant bit of this result
is called a carry. A combinational circuit that performs the addition of two bits is called a halfadder. One that performs the addition of 3 bits (two significant bits & previous carry) is called a full
adder. & 2 half adder can employ as a full-adder.

The Half Adder:

A Half Adder is a combinational circuit with two binary inputs (augends and addend bits and two binary outputs (sum and carry bits.) It adds the two inputs (A and B) and produces the sum (S)
and the carry (C) bits. It is an arithmetic operation of addition of two single bit words.

The Full Adder:

A Full-adder is a combinational circuit that adds two bits and a carry and outputs a sum bit and a carry bit. To add two binary numbers, each having two or more bits, the LSBs can be added by
using a half-adder. The carry resulted from the addition of the LSBs is carried over to the next significant column and added to the two bits in that column. So, in the second and higher columns,
the two data bits of that column and the carry bit generated from the addition in the previous column need to be added. The full-adder adds the bits A and B and the carry from the previous
column called the carry-in Cin and outputs the sum bit S and the carry bit called the carry-out Cout . The variable S gives the value of the least significant bit of the sum. The variable Cout
gives the output carry. The eight rows under the input variables designate all possible combinations of 1s and 0s that these variables may have. The 1s and 0s for the output variables are
determined from the arithmetic sum of the input bits. When all the bits are 0s , the output is 0. The S output is equal to 1 when only 1 input is equal to 1 or when all the inputs are equal to 1. The
Cout has a carry of 1 if two or three inputs are equal to 1.
Full-adder neither can also be realized using universal logic, i.e., either only NAND gates or only NOR gates.
Lab Report:

The Half Adder

Full adder

Half Subtractor

Full Subtractor
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