Priority Interrupt

POLLING | DAISY CHAINING

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Priority Interrupt
POLLING | DAISY CHAINING

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 Priority Interrupt
❖In a typical application a number of IO devices are attached to
the computer, with each device being able to originate an
interrupt request.
❖The first task of the interrupt system is to identify the source
of the interrupt.
❖Several sources may request service simultaneously. In this
case the system must also decide which device to service first

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 Priority Interrupt
❖A priority interrupt is a system that establishes a priority over the
various sources to determine which condition is to be serviced first when
two or more requests arrive simultaneously.
❖The system may also determine which conditions are permitted to
interrupt the computer while another interrupt is being serviced.
❖Devices with highspeed transfers such as magnetic disks are given high
priority, and slow devices such as keyboards receive low priority.
❖ When two devices interrupt the computer at the same time, the
computer services the device, with the higher priority first

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Priority Interrupt
❖2 methods
❖Software →Polling
❖Hardware→ Daisy Chaining, Parallel priority

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 Software Method
❖A polling procedure is used to identify the highest-priority source by
software means.
❖ In this method there is one common branch address for all interrupts.
❖The interrupt handling program begins at the branch address and polls
the interrupt sources in sequence.
❖ The order in which they are tested determines the priority of each
interrupt.
❖ The highest-priority source is tested first, and if its interrupt signal is on,
control branches to a service routine for this source.
❖ Otherwise, the next-lower-priority source is tested, and so on
❖Disadvantage:If there are many interrupt sources, the time required to
poll them can exceed the time available to service the I/O device
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 Hardware priority interrupt
❖It accepts interrupt requests from many sources, determines which
of the incoming requests has the highest priority, and issues an
interrupt request to the computer based on this determination.
❖ To speed up the operation, each interrupt source has its own
interrupt vector to access its own service routine directly.
❖ The hardware priority function can be established by either a serial
or a parallel connection of interrupt lines.
❖The serial connection is also known as the daisy chaining method

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 Daisy Chaining Method
❖ It consists of a serial connection of all devices that request an interrupt.
❖The device with the highest priority is placed in the first position, followed
by lower-priority devices up to the device with the lowest priority, which is
placed last in the chain
Processor data bus
VAD 1 VAD 2 VAD 3

Device 2
“1” PIDevicePO
1
“1” Device 2
PI PO
“0” Device 3
PI PO
To next
Device
Interrupt Request

Interrupt request
INT
CPU
Interrupt acknowledge
INTACK

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 Daisy Chaining Method
❖ The interrupt request line is common
Processor data bus to all devices and forms a wired logic
VAD 1 VAD 2 VAD 3 connection.
“1 Device 1 “1 Device 2 “0 Device 3
To next
❖ If any device has its interrupt signal
”
PI PO
”
PI PO
”
PI PO
Device in the low-level state, the interrupt line
goes to the low-level state and enables
the interrupt input in the CPU.
Interrupt request
INT
CPU
❖ When no interrupts are pending, the
Interrupt acknowledge
INTACK
interrupt line stays in the high-level
state and no interrupts are recognized
by the CPU.

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 Daisy Chaining Method
Processor data bus
❖The CPU responds to an interrupt
VAD 1 VAD 2 VAD 3 request by enabling the interrupt
“1 PIDevicePO1 “1 Device 2
“0 Device 3
To next
acknowledge line.
PI PO PI PO
Device
” ” ”
❖ This signal is received by device 1 at
Interrupt request
INT
its PI (priority in) input.
❖ The acknowledge signal passes on to
CPU
Interrupt acknowledge
INTACK

the next device through the PO

(priority out) output only if device 1 is
not requesting an interrupt.

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 Daisy Chaining Method
❖If device 1 has a pending interrupt, it
Processor data bus
VAD 1 VAD 2 VAD 3
blocks the acknowledge signal from
the next device by placing a 0 in the
“1 Device 1 “1 Device 2 “0 Device 3

”
PI PO
”
PI PO
”
PI PO
To next
Device
PO output.
❖ It then proceeds to insert its own
Interrupt request
INT interrupt vector address (VAD) into
Interrupt acknowledge
CPU
the data bus for the CPU to use during
INTACK
the interrupt cycle.

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 Daisy Chaining Method
❖A device with a 0 in its PI input
Processor data bus generates a 0 in its PO output to
VAD 1 VAD 2 VAD 3 inform the next-lower-priority device
that the acknowledge signal has been
“1 Device 1 “1 Device 2 “0 Device 3
To next blocked.
PI PO PI PO PI PO
” ” ” Device

❖ A device that is requesting an

Interrupt request
interrupt and has a 1 in its PI input
INT
will intercept the acknowledge signal
Interrupt acknowledge
CPU
by placing a 0 in its PO output.
INTACK
❖If the device does not have pending
interrupts, it transmits the
acknowledge signal to the next device
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