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TimeTable-v2

The document is a timetable for the Electronics & Communication Engineering department at Assam University, Silchar, effective from August 26, 2021. It outlines the schedule for various B.Tech and M.Tech courses across different days of the week, detailing the subjects and corresponding time slots. The timetable includes courses such as Electronics Device, Digital System Design, and various labs and projects for different semesters.

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fiscal012
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0% found this document useful (0 votes)
5 views

TimeTable-v2

The document is a timetable for the Electronics & Communication Engineering department at Assam University, Silchar, effective from August 26, 2021. It outlines the schedule for various B.Tech and M.Tech courses across different days of the week, detailing the subjects and corresponding time slots. The timetable includes courses such as Electronics Device, Digital System Design, and various labs and projects for different semesters.

Uploaded by

fiscal012
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

ASSAM UNIVERSITY, SILCHAR


Time Table For All Semester w.e.f. 26-08-2021

9AM 10AM 11AM 12PM 1PM 1.30PM 2.30PM 3.30PM 4.30PM


- - - - - - - - -
DAY SEMESTER
10AM 11AM 12PM 1PM 1.30PM 2.30PM 3.30PM 4.30PM 5.30PM
Electronics Device Digital System Design Mathematics-III Network Theory
B.Tech. III ECE-301 (NS) ECE-303 (RK) ASH-301A (PD) ECE-306 (AD)
Electromagnetic L
B.Tech. V Waves
Computer Archit. DSP
U
Constitution of India
ECE-503 (MJL) ECE-505 (RR) ASH-503 (KP)
ECE-501 (AD) N
MONDAY

Analog VLSI Design Operating System C Embedded System Script Programming Project
B.Tech. VII
EC-CC-25 (GF1) EC-EL-15 (GF1) H EC-EL-12 (VK) CSE-EL-16 (AC) EC-PT-02
Semiconductor
Front end-LAB B Microelectronics Tech.
M.Tech. (1st) Device Physics
MECE-106 (DPD, AB) R MECE-103 (RK)
MECE-101 (RK)
Dissertation Phase – I E Dissertation Phase – I
M.Tech. (3rd ) A
MECE-303 MECE-303
Signal & System Network Theory K E. T. Communication Electronics Device Lab
B.Tech. III
ECE-305 (RR) ECE-306 (AD) ASH-302 (AP) ECE-302 (NS,RB,BD)
PE1:CMOS Design Probability Theory Electromagnetic Waves LAB Management-II
B.Tech. V
ECE-507 (DPD) ECE-504 (NS) ECE-502 (AD, NS, BD) ASH502 (KP)
TUESDAY

Analog VLSI
Project Script Programming Analog VLSI Design LAB
B.Tech. VII Design
EC-PT-02 CSE-EL-16 (AC) EC-CC-26 (GF1, AB)
EC-CC-25 (GF1)
IPR Digital VLSI Design Semiconductor Device Physics
M.Tech. (1st)
MECE-105 (NS) MECE-102 (VK) MECE-101 (RK)
Biomedical Inst. HDL Dissertation Phase – I
M.Tech. (3rd )
MECE-302 (MJL) MECE-301 (DPD) MECE-303
Mathematics-III Signal & System Electronics Device Digital System Design
B.Tech. III
ASH-301A (PD) ECE-305 (RR) ECE-301 (NS) ECE-303 (RK)
Electromagnetic
Computer Archit. DSP LAB
WEDNESDAY

B.Tech. V Waves
ECE-503 (MJL) ECE-506 (RR, AD)
ECE-501 (AD)
Project
Embedded System Operating System Project
B.Tech. VII EC-PT-02
EC-EL-12 (VK) EC-EL-15 (GF1) EC-PT-02
M.Tech. (1st) Digital Signal Microelectronics
Process. Tech.
MECE-104 (RR) MECE-103 (RK)
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING, ASSAM UNIVERSITY, SILCHAR
Time Table For All Semester w.e.f.
Dissertation Phase – I
MECE-303
Dissertation Phase – I
M.Tech. (3rd )
MECE-303

9AM 10AM 11AM 12PM 1.30PM 2.30PM 3.30PM


- - - - - - -
DAY SEMESTER
10AM 11AM 12PM 1PM 2.30PM 3.30PM 4.30PM
Electronics Device E.T. Communication Digital System Design Lab
Network Theory
B.Tech. III ECE-301 (NS) ASH-302 (AP) ECE-304 (RK, BD, RB)
ECE-306 (AD)
Electromagnetic
DSP PE1:CMOS Design Probability Theory Management-II
B.Tech. V Waves
ECE-505 (RR) ECE-507 (DPD) ECE-504 (NS) ASH502 (KP)
ECE-501 (AD)
THURSDAY

Project Analog VLSI Design LAB


B.Tech. VII Seminar Operating System Project
EC-PT-02 EC-CC-26 (GF1, AB)
EC-PT-01 (MJL) EC-EL-15 (GF1) EC-PT-02

IPR Backend Lab Digital VLSI Design Front end-LAB


M.Tech. (1st)
MECE-105 (NS) MECE-107 (DPD, AB) MECE-102 (VK) MECE-106 (DPD, AB)
HDL Biomedical Inst. Dissertation Phase – I
M.Tech. (3rd )
MECE-301 (DPD) MECE-302 (MJL) MECE-303
Basic Electronics Network Theory Lab
B.Tech. III
ASH-305 (PKS) ECE-307 (AD, RB)
FRIDAY

Computer Archit.
Management-II Probability Theory ECE-503 (MJL) PE1:CMOS Design
B.Tech. V
ASH502 (KP) ECE-504 (NS) ECE-507 (DPD)
Analog VLSI
Project Project Embedded System Project
B.Tech. VII Design
EC-PT-02 EC-PT-02 EC-EL-12 (VK) EC-PT-02
EC-CC-25 (GF1)
IPR Digital Signal Process. Backend Lab
M.Tech. (1st)
MECE-105 (NS) MECE-104 (RR) MECE-107 (DPD, AB)
Dissertation Phase – I Dissertation Phase – I
M.Tech. (3rd )
MECE-303 MECE-303

KP – Khemnath Patir (ASH)

HOD, ECE

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